JPS6399717A - Normally monitoring circuit for stational protective relay - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a constant monitoring circuit for a static protective relay composed of a plurality of internal elements. ) This invention relates to a constant monitoring circuit for a static protective relay that is driven by an output and is suitable for a relay that performs automatic inspection of each element.

[Conventional technology]

Conventionally, the final stage trip output and constant monitoring output of a static protective relay composed of a plurality of internal elements are described in Electric Cooperative Research Report Vol. 28, No. 1, page 34.

As described on page 76, the AND output of each element is often configured as a trip output, and the logical sum (hereinafter referred to as OR) output is often configured as a constant monitoring output. Furthermore, a method of configuring these logic circuits using transistors and diodes is often adopted because of the simplicity of one-circuit design.

On the other hand, with the aim of improving the reliability of relays, automatic inspections are increasingly being applied.In order to quickly respond to accidents during inspections, automatic inspections are often performed instead of performing trip locks during each inspection. There are demands to implement it.

[The disadvantages that the invention attempts to solve]

In the above-mentioned AND circuit using transistors, each element constituting the logic circuit is in an open mode, or
No consideration is given to the function to detect short mode failures, and in the system in which the final output is the AND output of two elements, which is the most commonly adopted internal element configuration of static relays, - element There is a problem that if a check input is applied to the other element when one final stage transistor has a short mode failure, the AND condition will be established and the final output will be output.

In addition, when the constant monitoring output is made of two required iOR outputs, the constant monitoring output is output even during normal operation, so in the case of relays that are in continuous operation, such as undervoltage relays, there is a limit to time coordination using an external timer. , other logic circuits are required.

The purpose of the present invention is to eliminate the above-mentioned blind spot in the constant monitoring range that occurs in conventional circuits, prevent unnecessary operation of relays due to inspection,
An object of the present invention is to provide a constant monitoring circuit that can be applied to continuously operating relays.

[Means for solving problems]

The above purpose is to electrically change the state of 0FF-ON of the switching element constituting the AND circuit to a high resistance value -
This resistance value change is a low resistance value, and can be achieved by connecting an appropriate voltage dividing element and detecting this resistance value change as a voltage change.

[Effect]

The voltage level at the connection point of the switching elements that make up an AND circuit will rise if only the switching element with a higher potential in the circuit is conductive, and will fall if only the switching element with a lower potential in the circuit is conductive. do.

By adding a circuit that detects this voltage change to the AND circuit section, each switching element of the AND circuit can be turned on.
, the OFF state can be detected.

Further, the voltage level of the output of the AND circuit decreases only when both switching elements are conductive.

By combining this condition with the operating conditions of each switching element described above, the operation of each switching element can be adjusted to E.
It can be taken out as an X-OR output.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows a block diagram of a static relay composed of two elements, a time-limiting element 1 and a starting element 2. An input signal is applied to each element through an input cadence 3 and a rectifier circuit 4.

Also, the two elements can be driven separately with inspection inputs 5.6.

The output of element 1 is applied to the base of transistor Q1;
The output of element 2 is applied to the base of transistor Q2. Transistors Q1 and Qz constitute an AND circuit, an output relay X is connected to this AND circuit, and its contact output becomes a trip output cuff.

The core emitter of transistor Q1 is connected to resistor R.
1, a resistor R2 is connected between the collector and emitter of the transistor Q2.

The connection point between the emitter of the transistor Ql and the collector of Qz is the (+) terminal of a comparator IC1 of a level detection circuit whose reference level is a voltage VLI obtained by dividing the power supply voltage Vcc by resistors R8 and R4, and 1! ! f1! Pressure Vcc
(-
) is connected to the end.

Further, the outputs of the comparators ICz and ICs are OR-connected by diodes D1 and D2.

On the other hand, the collector of the transistor Q1 (the output of the AND circuit of Qx and Qz) is connected to the (+) terminal of the comparator ICδ of the level detection circuit which uses the voltage L2 as the reference level, and its output is connected to the above-mentioned terminal via the diode D3. It is connected to the output of an OR circuit formed by diodes D1 and D2 to form an AND circuit, and this output is provided to the outside as a constant monitoring output 8.

Normally, an external timer is connected to the constant monitoring output 8, and when this output continues for a predetermined period of time or more, it is determined that the relay is abnormal, and a process such as an alarm is performed.
The resistance value of x is compared with the coil resistance value of output relay X, and is set to a sufficiently large value to prevent output relay X from operating due to leakage current.

The operation of this circuit will be explained below, including the time chart of FIG.

Assuming that the potential at the connection point between transistors Q1 and 02 constituting the AND circuit is V^, and the output potential of the AND circuit is Va, in the operation standby state shown in Fig. 2, V^ = Rx・Vc.
c/(Rt+Rx)=Va=Vcc.

Then, if only time-limiting element 1 operates and transistor Q1 conducts, V^ and VB are respectively V A = V b
V b a = V a xVa = Vcc Here, it becomes.

Furthermore, when only the activation element operates and transistor Q2 conducts, V^ and VB become V^=○■, v^=
Vcc.

Finally, when both elements operate, transistor QL+Q2 conducts, and output relay X operates, V^ and Va become V^= Va= OV.

Here, the reference level voltages VLI and vL2. of the above-mentioned level detection circuit. If the constants of the resistors Rz to Ra are selected so that the following relationship holds true, the operation of each level detection circuit is as follows.

(1) IC1: High output only when Ql is conductive.

(2) ICz: Outputs H when Q2 is conductive, regardless of Qt operation.

(3) ICs: Both Ql and Qa output L when conductive.

As a result, as shown in FIG. 2, the constant monitoring output 8 outputs an H output only when one of the transistors Qz or Q2 is conductive, that is, the transistors Q1.
For the operation of Qz, it is an EX-OR output.

In the circuit diagram of FIG. 1, each resistor indicated by the symbol R is used to limit the current or fix the voltage level, and its resistance value is determined as appropriate.

Also, the trip output cuff is A of transistors Ql and Q2.
There is no question that it will be a ND output.

According to this embodiment, the conduction state of the transistors constituting the AND circuit can be extracted as an EX-OR output and monitored.

〔Effect of the invention〕

According to the present invention, it is possible to constantly monitor the switching elements constituting the AND circuit, and the blind spots of constant monitoring can be eliminated. It does not come out during normal operation, so
The number of applicable relays will increase.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a time chart illustrating the operation of the circuit shown in FIG.

Claims (1)

[Claims] 1. In a static protective relay that drives the final output of an auxiliary relay, etc. by the logical product of the outputs of two internal elements, the voltage level at the connection point of each switching element constituting the logical product circuit. Two level detection circuits are provided to detect the rise and fall of
detecting a drop in the voltage level at the output terminal of the AND circuit;
A third level detection circuit is provided whose output is configured to have a negative logic with respect to the outputs of the two level detection circuits, and this output is connected to the OR circuit to form an exclusive OR. A constant monitoring circuit for a static protective relay, characterized in that the output is an output for constant monitoring.