JPS6397864U - - Google Patents

Info

Publication number
JPS6397864U
JPS6397864U JP19311286U JP19311286U JPS6397864U JP S6397864 U JPS6397864 U JP S6397864U JP 19311286 U JP19311286 U JP 19311286U JP 19311286 U JP19311286 U JP 19311286U JP S6397864 U JPS6397864 U JP S6397864U
Authority
JP
Japan
Prior art keywords
detection circuit
analog
input
horizontal axis
peak
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19311286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19311286U priority Critical patent/JPS6397864U/ja
Publication of JPS6397864U publication Critical patent/JPS6397864U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)
  • Measurement Of Current Or Voltage (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のブロツク図を示し、第2図は
表示波形の例を示す図である。 1:A/Dコンバータ、2:アクイジシヨンメ
モリ、3:ピーク−ピーク検出回路、4:同期検
出回路、5:CPU、6:デイスプレーメモリ、
7:デイスプレーコントローラおよびアンプ、8
:DAC、9:掃引発生回路。
FIG. 1 shows a block diagram of the present invention, and FIG. 2 shows an example of displayed waveforms. 1: A/D converter, 2: Acquisition memory, 3: Peak-to-peak detection circuit, 4: Synchronization detection circuit, 5: CPU, 6: Display memory,
7: Display controller and amplifier, 8
: DAC, 9: Sweep generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ−デイジタルコンバータの出力をピー
ク−ピーク検出回路および周期検出回路に入力し
、そのそれぞれの結果をもとに水平軸位置の補正
データを作成しこれを水平軸アンプの入力に加え
、アナログ−デイジタルコンバータのサンプリン
グクロツクのずれを表示上補正することを特徴と
するデイジタルストレージオシロスコープ。
The output of the analog-to-digital converter is input to the peak-to-peak detection circuit and the period detection circuit, and based on the respective results, correction data for the horizontal axis position is created, and this is added to the input of the horizontal axis amplifier to convert the analog to digital converter. A digital storage oscilloscope characterized by correcting the deviation of a converter's sampling clock on the display.
JP19311286U 1986-12-17 1986-12-17 Pending JPS6397864U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19311286U JPS6397864U (en) 1986-12-17 1986-12-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19311286U JPS6397864U (en) 1986-12-17 1986-12-17

Publications (1)

Publication Number Publication Date
JPS6397864U true JPS6397864U (en) 1988-06-24

Family

ID=31148830

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19311286U Pending JPS6397864U (en) 1986-12-17 1986-12-17

Country Status (1)

Country Link
JP (1) JPS6397864U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5918666A (en) * 1982-07-22 1984-01-31 Mitsubishi Electric Corp Cooling device for water cooled apparatus
JPS5934164A (en) * 1982-07-29 1984-02-24 テクトロニツクス・インコ−ポレイテツド Corrugated take-in device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5918666A (en) * 1982-07-22 1984-01-31 Mitsubishi Electric Corp Cooling device for water cooled apparatus
JPS5934164A (en) * 1982-07-29 1984-02-24 テクトロニツクス・インコ−ポレイテツド Corrugated take-in device

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