JPS6395639A - Tape carrier - Google Patents
Tape carrierInfo
- Publication number
- JPS6395639A JPS6395639A JP61241669A JP24166986A JPS6395639A JP S6395639 A JPS6395639 A JP S6395639A JP 61241669 A JP61241669 A JP 61241669A JP 24166986 A JP24166986 A JP 24166986A JP S6395639 A JPS6395639 A JP S6395639A
- Authority
- JP
- Japan
- Prior art keywords
- center device
- lead
- leads
- semiconductor element
- tape carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 28
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 239000012141 concentrate Substances 0.000 abstract 1
- 238000009434 installation Methods 0.000 abstract 1
- 239000004642 Polyimide Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002985 plastic film Substances 0.000 description 2
- 229920006255 plastic film Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体素子と基板とを接続する場合に使用す
るテープキャリアに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a tape carrier used for connecting a semiconductor element and a substrate.
従来、この種のテープキャリアは第3図に示すように構
成されている。これを同図に基づいて説明すると、同図
において、符号1で示すものは例えばポリイミド等のプ
ラスチックフィルムからなる帯状部材、2はこの帯状部
材1の幅方向中央部に設けられその内部に半導体素子(
図示せず)が臨むセンターデバイス孔、3はこのセンタ
ーデバイス孔2の周囲に設けられ半導体素子(図示せず
)に接続するインナーリード4.アウターリード5およ
びテストバッド6からなるリードである。なお、7はこ
のリード3のインナーリード4を位置決めするサポート
部、8はこのサポート部7と前記帯状部材1とを接続す
る架橋部である。また、9および10はアウターリード
孔とパーフォレーション孔である。Conventionally, this type of tape carrier has been constructed as shown in FIG. To explain this based on the same figure, in the same figure, the reference numeral 1 denotes a band-shaped member made of a plastic film such as polyimide, and the reference numeral 2 denotes a band-shaped member made of a plastic film such as polyimide, and 2 is provided at the center of the band-shaped member 1 in the width direction and has a semiconductor element inside. (
3 is an inner lead 4 provided around the center device hole 2 and connected to a semiconductor element (not shown). This lead consists of an outer lead 5 and a test pad 6. Note that 7 is a support portion that positions the inner lead 4 of this lead 3, and 8 is a bridge portion that connects this support portion 7 and the band-shaped member 1. Further, 9 and 10 are outer lead holes and perforation holes.
次に、このように構成されたテープキャリアに半導体素
子を実装する方法について説明する。Next, a method for mounting semiconductor elements on the tape carrier configured as described above will be explained.
先ず、第4図に示す帯状部材1のセンターデバイス孔2
内にその電極11がインナーリード4に対向するように
半導体素子12を位置決めする。First, the center device hole 2 of the strip member 1 shown in FIG.
The semiconductor element 12 is positioned so that its electrode 11 faces the inner lead 4.
次に、この半4体素子12の電極11とインナーリード
4を第5図に示すように加熱・加圧して接続する。この
とき、電極11とインナーリード4との間には第6図に
示すようにバンプ(金属層)13が介在している。Next, the electrode 11 of this half-quad element 12 and the inner lead 4 are connected by heating and pressurizing as shown in FIG. At this time, a bump (metal layer) 13 is interposed between the electrode 11 and the inner lead 4 as shown in FIG.
このようにしてテープキャリアに半導体素子を実装する
ことができる。In this way, semiconductor elements can be mounted on the tape carrier.
ところで、この種のテープキャリアにおいては、半導体
素子12の電極位置付近にインナーリード4を位置付け
る構造であるため、多数の電極11がその両側縁に集中
する半導体素子12を帯状部材lに実装する場合、イン
ナーリード4が小さいセンターデバイス孔2の両側に集
中して位置付け′られることになり、それだけリードパ
ターンの設計自由度が低下するという問題があった。By the way, this type of tape carrier has a structure in which the inner leads 4 are positioned near the electrode positions of the semiconductor element 12, so when mounting the semiconductor element 12 on the strip member l, in which a large number of electrodes 11 are concentrated on both sides of the semiconductor element 12, There is a problem in that the inner leads 4 are concentrated on both sides of the small center device hole 2, and the degree of freedom in designing the lead pattern is reduced accordingly.
本発明はこのような事情に鑑みなされたもので、多数の
電極が両側に集中する半導体素子を帯状部材に実装する
場合でもセンターデバイス孔の周囲にリードを分散して
位置付けることができ、もってリードパターンの設計自
由度を高めることができるテープキャリアを提供するも
のである。The present invention was developed in view of the above circumstances, and even when a semiconductor element with a large number of electrodes concentrated on both sides is mounted on a strip member, the leads can be distributed and positioned around the center device hole. The present invention provides a tape carrier that can increase the degree of freedom in pattern design.
〔問題点を解決するための手段〕
本発明に係るテープキャリアは、その内部に半導体素子
が臨むセンターデバイス孔およびこのセンターデバイス
孔の周囲に半導体素子に接続するリードを有する帯状部
材からなり、この帯状部材にセンターデバイス孔の開口
部を横切るリードサポート部を一体に設けたものである
。[Means for Solving the Problems] The tape carrier according to the present invention is composed of a band-like member having a center device hole in which a semiconductor element faces and a lead connected to the semiconductor element around the center device hole. A lead support portion that crosses the opening of the center device hole is integrally provided on the band-shaped member.
本発明においては、リードサポート部からセンターデバ
イス孔の開口周縁に向かって延在する部分をもつリード
を帯状部材に取り付けることができる。In the present invention, a lead having a portion extending from the lead support portion toward the opening periphery of the center device hole can be attached to the band-like member.
第1図は本発明に係るテープキャリアを示す斜視図で、
同図以下において第3図〜第6図と同一の部材について
は同一の符号を付し、詳細な説明は省略する。同図にお
いて、符号21で示すものは前記センターデバイス孔2
の開口部2aを横切る平面1字状のリードサポート部で
、前記帯状部材1に一体に設けられており、前記リード
3のうち一部のリード3aを支持可能に構成されている
。FIG. 1 is a perspective view showing a tape carrier according to the present invention,
In the following figures, the same members as in FIGS. 3 to 6 are denoted by the same reference numerals, and detailed explanations will be omitted. In the figure, what is indicated by the reference numeral 21 is the center device hole 2.
This lead support part has a linear shape in a plane that crosses the opening 2a, and is integrally provided with the band member 1, and is configured to be able to support some of the leads 3a.
このように構成されたテープキャリアにおいては、リー
ドサポート部21からセンターデバイス孔2の開口周縁
に向かって延在する部分をもつり−ド3aを帯状部材1
に取り付けることができる。In the tape carrier configured in this manner, the portion extending from the lead support portion 21 toward the opening periphery of the center device hole 2 is held by the band member 1.
It can be attached to.
したがって、多数の電極11がその両側縁に集中する半
導体素子12を帯状部材1に実装する場合でも、センタ
ーデバイス孔2の周囲にリード3゜3aを分散して位置
付けることができる。Therefore, even when a semiconductor element 12 in which a large number of electrodes 11 are concentrated on both sides of the semiconductor element 12 is mounted on the strip member 1, the leads 3.3a can be distributed and positioned around the center device hole 2.
因に、テープキャリアに半導体素子を実装するには、半
導体素子12の電極11とインナーリード4.4aとを
加熱・加圧して接続することにより行う。Incidentally, in order to mount the semiconductor element on the tape carrier, the electrode 11 of the semiconductor element 12 and the inner lead 4.4a are connected by heating and pressurizing.
なお、本実施例においては、リードサポート部21はセ
ンターデバイス孔2の開口部2aを2分するように平面
I字状に形成する例を示したが、本発明はこれに限定さ
れるものではなく、例えば第2図に示すようにセンター
デバイス孔2の開口部2aを4分するようにリードサポ
ート部22を平面十字状に形成するものでも実施例と同
様の効果を奏する。In this embodiment, the lead support portion 21 is formed into an I-shaped plane so as to divide the opening 2a of the center device hole 2 into two, but the present invention is not limited to this. Alternatively, for example, as shown in FIG. 2, the lead support portion 22 may be formed into a planar cross shape so as to divide the opening 2a of the center device hole 2 into four parts, and the same effect as in the embodiment can be obtained.
以上説明したように本発明によれば、その内部に半導体
素子が臨むセンターデバイス孔およびこのセンターデバ
イス孔の周囲に半導体素子に接続するリードを有する帯
状部材からなり、この帯状部材にセンターデバイス孔の
開口部を横切るリードサポート部を一体に設けたので、
リードサポート部からセンターデバイス孔の開口周縁に
向かって延在する部分をもつリードを帯状部材に取り付
けることができる。したがって、多数の電極がその両側
縁に集中する半導体素子を帯状部材に実装する場合でも
、センターデバイス孔の周囲にリードを分散して位置付
けることができるから、リードパターンの設計自由度を
確実に高めることができる。As explained above, according to the present invention, the belt-like member has a center device hole in which a semiconductor element faces and a lead connected to the semiconductor element around the center device hole. Since the lead support section that crosses the opening is integrated,
A lead having a portion extending from the lead support portion toward the opening periphery of the center device hole can be attached to the strip member. Therefore, even when mounting a semiconductor element in which a large number of electrodes are concentrated on both sides of a strip-shaped member, the leads can be distributed and positioned around the center device hole, thereby surely increasing the degree of freedom in designing the lead pattern. be able to.
第1図は本発明に係るテープキャリアを示す斜視図、第
2図は他の実施例を示す平面図、第3図は従来のテープ
キャリアを示す平面図、第4図および第5図はテープキ
ャリアに半導体素子を実装する前後の状態を示す斜視図
、第6図はそのテープキャリアのリードと半導体素子の
接続状態を示す断面図である。
1・・・・帯状部材、2・・・・センタープツマイス孔
、2a・・・・開口部、3・・・・リード、4・・・・
インナーリード、5・・・・アウターリード、6・ ・
・ ・テストパ・ノド、11 ・ ・ ・ ・電極、
12・・・・半導体素子、21・・・・IJ−ドサポー
ト部。
代 理 人 大 岩 増 雄
第1図
21 リ − ド″ワ′ホ1−F電nト第2図
第3図FIG. 1 is a perspective view showing a tape carrier according to the present invention, FIG. 2 is a plan view showing another embodiment, FIG. 3 is a plan view showing a conventional tape carrier, and FIGS. 4 and 5 are tape FIG. 6 is a perspective view showing the state before and after the semiconductor element is mounted on the carrier, and FIG. 6 is a sectional view showing the connection state between the lead of the tape carrier and the semiconductor element. DESCRIPTION OF SYMBOLS 1... Band-shaped member, 2... Center putsumice hole, 2a... Opening, 3... Lead, 4...
Inner lead, 5...Outer lead, 6...
・ ・Test pad/nod, 11 ・ ・ ・ ・Electrode,
12... Semiconductor element, 21... IJ-do support section. Agent Masuo Oiwa Figure 1 21 Lead Wa'ho 1-F power line Figure 2 Figure 3
Claims (1)
このセンターデバイス孔の周囲に前記半導体素子に接続
するリードを有する帯状部材からなり、この帯状部材に
前記センターデバイス孔の開口部を横切るリードサポー
ト部を一体に設けたことを特徴とするテープキャリア。It consists of a band-shaped member having a center device hole inside which a semiconductor element faces, and a lead connected to the semiconductor element around the center device hole, and a lead support part that crosses the opening of the center device hole is integrated into this band-shaped member. A tape carrier characterized by being provided with.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61241669A JPS6395639A (en) | 1986-10-09 | 1986-10-09 | Tape carrier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61241669A JPS6395639A (en) | 1986-10-09 | 1986-10-09 | Tape carrier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6395639A true JPS6395639A (en) | 1988-04-26 |
JPH055376B2 JPH055376B2 (en) | 1993-01-22 |
Family
ID=17077754
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61241669A Granted JPS6395639A (en) | 1986-10-09 | 1986-10-09 | Tape carrier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6395639A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6481330A (en) * | 1987-09-24 | 1989-03-27 | Nec Corp | Film carrier semiconductor device |
US5198883A (en) * | 1988-08-06 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor device having an improved lead arrangement and method for manufacturing the same |
WO1994024698A1 (en) * | 1993-04-08 | 1994-10-27 | Seiko Epson Corporation | Semiconductor device |
US6084291A (en) * | 1997-05-26 | 2000-07-04 | Seiko Epson Corporation | Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device |
US6124547A (en) * | 1997-02-17 | 2000-09-26 | Seiko Epson Corporation | Tape carrier package |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS502669U (en) * | 1973-05-08 | 1975-01-11 | ||
JPS572669U (en) * | 1980-06-05 | 1982-01-08 | ||
JPS5817630A (en) * | 1981-07-13 | 1983-02-01 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | Tape automatic bonding for collected circuit |
JPS59132641A (en) * | 1983-01-20 | 1984-07-30 | Seiko Epson Corp | Ic mounting structure |
JPS6016102A (en) * | 1983-07-08 | 1985-01-26 | Nissan Motor Co Ltd | Run controller of electric vehicle |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS572669B2 (en) * | 1973-11-21 | 1982-01-18 |
-
1986
- 1986-10-09 JP JP61241669A patent/JPS6395639A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS502669U (en) * | 1973-05-08 | 1975-01-11 | ||
JPS572669U (en) * | 1980-06-05 | 1982-01-08 | ||
JPS5817630A (en) * | 1981-07-13 | 1983-02-01 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | Tape automatic bonding for collected circuit |
JPS59132641A (en) * | 1983-01-20 | 1984-07-30 | Seiko Epson Corp | Ic mounting structure |
JPS6016102A (en) * | 1983-07-08 | 1985-01-26 | Nissan Motor Co Ltd | Run controller of electric vehicle |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6481330A (en) * | 1987-09-24 | 1989-03-27 | Nec Corp | Film carrier semiconductor device |
JPH0558657B2 (en) * | 1987-09-24 | 1993-08-27 | Nippon Electric Co | |
US5198883A (en) * | 1988-08-06 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor device having an improved lead arrangement and method for manufacturing the same |
WO1994024698A1 (en) * | 1993-04-08 | 1994-10-27 | Seiko Epson Corporation | Semiconductor device |
US5563445A (en) * | 1993-04-08 | 1996-10-08 | Seiko Epson Corporation | Semiconductor device |
US6124547A (en) * | 1997-02-17 | 2000-09-26 | Seiko Epson Corporation | Tape carrier package |
US6084291A (en) * | 1997-05-26 | 2000-07-04 | Seiko Epson Corporation | Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device |
US6342727B1 (en) | 1997-05-26 | 2002-01-29 | Seiko Epson Corporation | Tape carrier device for a tab |
Also Published As
Publication number | Publication date |
---|---|
JPH055376B2 (en) | 1993-01-22 |
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