JPS6393650U - - Google Patents
Info
- Publication number
- JPS6393650U JPS6393650U JP18838586U JP18838586U JPS6393650U JP S6393650 U JPS6393650 U JP S6393650U JP 18838586 U JP18838586 U JP 18838586U JP 18838586 U JP18838586 U JP 18838586U JP S6393650 U JPS6393650 U JP S6393650U
- Authority
- JP
- Japan
- Prior art keywords
- filler
- semiconductor
- buffer layer
- containing resin
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 239000000945 filler Substances 0.000 claims description 4
- 239000008188 pellet Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 239000002184 metal Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図はこの考案の一実施例の半導体装置の断
面図である。第２図は従来の樹脂モールド型半導
体装置の断面図で、第３図はモールド樹脂として
フイラー入り樹脂を用いた場合の半導体ペレツト
と樹脂の界面部の拡大断面図である。
１０…金属基板、１２…半導体ペレツト、１３
…バツフア層、１４…絶縁板、１５…フイラー入
り樹脂。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of this invention. FIG. 2 is a sectional view of a conventional resin molded semiconductor device, and FIG. 3 is an enlarged sectional view of the interface between a semiconductor pellet and the resin when a filler-containing resin is used as the molding resin. 10...Metal substrate, 12...Semiconductor pellet, 13
... Buffer layer, 14 ... Insulating plate, 15 ... Filler-containing resin.
Claims (1)
り樹脂で封止してなる半導体装置において、 前記半導体ペレツトの表面をバツフア層で被覆
し、その上に絶縁板を配置してフイラー入り樹脂
で封止したことを特徴とする半導体装置。[Claims for Utility Model Registration] A semiconductor device in which semiconductor pellets are fixed on a substrate and sealed with a filler-containing resin, the surface of the semiconductor pellet being covered with a buffer layer, and an insulating plate placed on top of the buffer layer. A semiconductor device characterized in that it is sealed with filler-containing resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18838586U JPS6393650U (en) | 1986-12-05 | 1986-12-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18838586U JPS6393650U (en) | 1986-12-05 | 1986-12-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6393650U true JPS6393650U (en) | 1988-06-17 |
Family
ID=31139697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18838586U Pending JPS6393650U (en) | 1986-12-05 | 1986-12-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6393650U (en) |
-
1986
- 1986-12-05 JP JP18838586U patent/JPS6393650U/ja active Pending
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