JPS6392275A - Overcurrent control circuit for inverter - Google Patents

Overcurrent control circuit for inverter

Info

Publication number
JPS6392275A
JPS6392275A JP61237641A JP23764186A JPS6392275A JP S6392275 A JPS6392275 A JP S6392275A JP 61237641 A JP61237641 A JP 61237641A JP 23764186 A JP23764186 A JP 23764186A JP S6392275 A JPS6392275 A JP S6392275A
Authority
JP
Japan
Prior art keywords
circuit
inverter
output
overcurrent
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61237641A
Other languages
Japanese (ja)
Inventor
Sadaji Tamoto
貞治 田本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yutaka Electric Mfg Co Ltd
Original Assignee
Yutaka Electric Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yutaka Electric Mfg Co Ltd filed Critical Yutaka Electric Mfg Co Ltd
Priority to JP61237641A priority Critical patent/JPS6392275A/en
Publication of JPS6392275A publication Critical patent/JPS6392275A/en
Pending legal-status Critical Current

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  • Inverter Devices (AREA)

Abstract

PURPOSE:To prevent a switching element from being destructed, by providing a comparator with which a limit circuit is operated only when overcurrent flows. CONSTITUTION:An overcurrent limit circuit of an inverter provides a current transformer to an AC output circuit, supplies the detected voltage to an amplitude regulation circuit 10 regulating the amplitude of a sinusoidal signal 9 through a rectification circuit 6 and an error amplifier 7 and controls the inverter so that the detected voltage may be the same as the reference voltage of a power source 8. The overcurrent limitation is performed with AC feedback circuits 11-12, a PWM modulation circuit 14, a logical circuit 15, etc. At this moment, on the output side of the abovementioned rectification circuit 6 provided is a comparator 16, to which a reference voltage power source 17 is connected and its comparative output is inputted into the logical 15. The limit circuit is thereby operation only when overcurrent flows, limiting the absolute maximum current, so that a switching element of the inverter circuit can be prevented from being destructed.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、インバータによる電力供給回路を、過負荷電
流に対して有効に保護することができるインバータの過
電流制御回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an inverter overcurrent control circuit that can effectively protect an inverter-based power supply circuit against overload current.

〔発明の背景〕[Background of the invention]

従来公知のインバータには第3図に示す如き構造のもの
があり、また仁のインバータの過電流制限回路として第
4図に示す如き構造のものがある。
A conventionally known inverter has a structure as shown in FIG. 3, and an overcurrent limiting circuit for a conventional inverter has a structure as shown in FIG. 4.

即ち第3図で示される従来のインバータは、直流電源1
の線間に、例えばトランジスタ、サイリスタ、あるいは
機械的スイッチング素子(2−1)、(2−2)、(2
−3)、(2−4)等からなるスイッチ回路2を接続し
、このスイッチ回路2によるオン、オフ動作の繰返しに
より、交流(矩形波)る生起させ、さらにこの交流出力
回路に基本波成分を抽出させるためフィルタ6及び4を
介在せしめている。またこのインバータの過電流制限回
路として、上記の交流出力回路に、負荷電流検出用の電
流トランス5を設け、この電流トランス5による検出電
圧を、第4図に示す整流回路6により、直流に変換し、
これを誤差増幅器7のe側に入力する。この誤差増幅器
7のe側には電源8からの基準電圧を入力させることに
より、該誤差増幅器7からは整流回路6からの電圧と電
源8からの電圧の差電圧が得られ、この差電圧る、前記
インバータの出力電圧を制御する正弦波信号9の振巾を
調整する振幅調整回路10に供給し、このとき、電流ト
ランス5から検出電圧が、基準電圧よυ大きくなったと
き、インバータの電圧を減少させて、その検出電圧が電
源80基準電圧と同じになるように制御するものである
。11.12は、誤差増幅器7を安定動作させるための
交流帰還回路であり、13は搬送波用の三角波発生回路
、14はPWM変調回路で、このPWM変調回路14は
、三角波発生回路13と振幅調整回路10からの出力を
入力して、パルス幅変調信号を発生させ論理回路15で
、#J記スイッチ回路2の各スイッチ素子(2−1)、
(2−2)、(2−3)、(2−4)を制御して、イン
バータの過電流制限を行なうものである。
That is, the conventional inverter shown in FIG.
For example, transistors, thyristors, or mechanical switching elements (2-1), (2-2), (2
-3), (2-4), etc. are connected, and by repeating on and off operations by this switch circuit 2, an alternating current (rectangular wave) is generated, and a fundamental wave component is added to this alternating current output circuit. Filters 6 and 4 are interposed to extract the . Further, as an overcurrent limiting circuit of this inverter, a current transformer 5 for detecting load current is provided in the above-mentioned AC output circuit, and the voltage detected by the current transformer 5 is converted into DC by a rectifier circuit 6 shown in FIG. death,
This is input to the e side of the error amplifier 7. By inputting the reference voltage from the power supply 8 to the e side of the error amplifier 7, the difference voltage between the voltage from the rectifier circuit 6 and the voltage from the power supply 8 is obtained from the error amplifier 7. , is supplied to an amplitude adjustment circuit 10 that adjusts the amplitude of the sine wave signal 9 that controls the output voltage of the inverter, and at this time, when the detected voltage from the current transformer 5 becomes υ larger than the reference voltage, the voltage of the inverter is is controlled so that the detected voltage becomes the same as the power supply 80 reference voltage. Reference numerals 11 and 12 are AC feedback circuits for stably operating the error amplifier 7, 13 is a triangular wave generation circuit for carrier waves, and 14 is a PWM modulation circuit. The logic circuit 15 inputs the output from the circuit 10 to generate a pulse width modulation signal, and each switch element (2-1) of the #J switch circuit 2,
(2-2), (2-3), and (2-4) are controlled to limit the overcurrent of the inverter.

ところが、この過電流制限回路のピーク電流設定値が、
実効電流値の1.4位であるとき、コンデンサインプッ
ト整流回路負荷のような実効電流に対し、ピーク電値が
3倍近く流れる場合は、定格電流よシ低い値に制限され
るため、交流帰還回路11.12により、実効電流に近
づけることができるが、その他の負荷短絡等による過大
電流に対しては応答が遅れ、このため、スインを素子(
2−1)、(2−2)、(2−3)、(2−4)が破壊
されるといった問題点があった。
However, the peak current setting value of this overcurrent limiting circuit is
When the effective current value is about 1.4, if the peak current value is nearly three times the effective current flowing in a capacitor input rectifier circuit load, the AC feedback is limited to a value lower than the rated current. Circuits 11 and 12 can bring the current close to the effective current, but the response to excessive current due to other load short circuits is delayed, and for this reason, the switch
There was a problem that 2-1), (2-2), (2-3), and (2-4) were destroyed.

〔発明の目的〕[Purpose of the invention]

本発明は、かかる従来の問題点に着目してなされたもの
で、過大電流が流れたときは、絶対最大電流を制限して
、インバータ回路におけるスイッチ素子の破壊を未然に
防ぐことができるインバータの過電流制限回路を提供す
ることを目的とするものである。
The present invention has been made by focusing on such conventional problems, and is an inverter that is capable of limiting the absolute maximum current when an excessive current flows to prevent destruction of the switching elements in the inverter circuit. The purpose is to provide an overcurrent limiting circuit.

〔発明の実施例〕[Embodiments of the invention]

以下に本発明よりなるインバータ過電流制限回路を、第
1図に基いて詳細に説明するが、この実施例における過
電流制限回路の主構造は、第2図に示した従来の過電流
制限回路と同じであるので、その同一部分は、従来例で
引用した符号を付して。
The inverter overcurrent limiting circuit according to the present invention will be explained in detail below based on FIG. 1, but the main structure of the overcurrent limiting circuit in this embodiment is similar to that of the conventional overcurrent limiting circuit shown in FIG. , so the same parts are given the same reference numerals as in the conventional example.

その同−構造部の説明は省略する。A description of the same structure will be omitted.

即ち本実施例においては、検出電圧を整流する整流回路
乙の出力側に、比較器16を接続し、この比較器16に
、基準電圧電源17を接続して、この比較器16からの
出力を論理回路15にへカさせる回路に構成されている
ものでちる。
That is, in this embodiment, a comparator 16 is connected to the output side of a rectifier circuit B that rectifies the detected voltage, a reference voltage power supply 17 is connected to this comparator 16, and the output from this comparator 16 is A circuit configured to connect to the logic circuit 15 is used.

次にその作用について述べると、先ず交流帰還回路11
.12の時定数を、出力周波数の周期の数倍に設定し、
コンデンサインプット整流負荷電流のように、ピーク値
の大きな負荷電流に対してピーク値で制限されないよう
にする。但し、このままでは、負荷短絡電流のような過
大電流が生じた場合、応答が遅いために、インバータ回
路におけるスイッチ素子の耐電流を越えて該スイッチ素
子が破壊しかねない。
Next, to describe its operation, first, the AC feedback circuit 11
.. Set the time constant of 12 to several times the period of the output frequency,
Avoid being limited by the peak value for load currents with large peak values, such as capacitor input rectified load currents. However, if this continues, if an excessive current such as a load short-circuit current occurs, the slow response may exceed the withstand current of the switch element in the inverter circuit, causing the switch element to be destroyed.

そこで1本実施例においては、基準電圧電源17からの
基準電圧と、整流回路6からの電圧を瞬時に比較できる
比較器16により、コンデンサインプット整流負荷のピ
ーク電圧値で動作しないレベルに設定し、過大電流が流
れたときだけ、制限回路を働かせて、第2図に示す如く
、絶対最大電流を制限し、これによって、インバータ回
路におけるスイッチ素子(2−1)、(2−2)、(2
−3)、(2−4)の破壊を有効に防ぐことができるも
のである。
Therefore, in this embodiment, a comparator 16 that can instantaneously compare the reference voltage from the reference voltage power source 17 and the voltage from the rectifier circuit 6 is set to a level that does not operate at the peak voltage value of the capacitor input rectifier load. Only when an excessive current flows, the limiting circuit is activated to limit the absolute maximum current as shown in Figure 2, thereby reducing the switching elements (2-1), (2-2), and (2) in the inverter circuit.
-3) and (2-4) can be effectively prevented.

〔発明の概要〕[Summary of the invention]

以上のように本発明は、パルス幅が変調さnた制御信号
により開閉される複数のスイッチ素子の開閉制御により
直流電源をパルス幅変調交流出力に変換する変換回路と
、基本波成分を抽出して交流出力とするフィルタ回路と
、上記変換回路に組込まれた電流トランスにより、出力
電流に比例した電圧を取出す検出回路を備えたインバー
タにおいて、該インバータの過電流制限回路は、N流ト
ランスにより検出された信号を整流する整流回路と、基
準電圧電源とからの夫々の信号を入力して、これら双方
の差信号を得る又流帰還回路を有する誤差増幅器と、上
記整流回路からの出力と基準電圧とを比較して、パルス
幅を制限する比較器を有する2段の過電流制限回路を有
することを特徴をするインバータの過電流制御回路であ
る。
As described above, the present invention includes a conversion circuit that converts a DC power source into a pulse width modulated AC output by controlling the opening and closing of a plurality of switch elements that are opened and closed by a control signal whose pulse width is modulated, and a conversion circuit that extracts a fundamental wave component. In the inverter, the inverter is equipped with a filter circuit that outputs an AC output, and a detection circuit that extracts a voltage proportional to the output current using a current transformer built into the conversion circuit. a rectifying circuit that rectifies the signal from the rectifying circuit; an error amplifier having a current feedback circuit that inputs the respective signals from the reference voltage power source and obtains a difference signal between the two; and an error amplifier that rectifies the output from the rectifying circuit and the reference voltage. This is an inverter overcurrent control circuit characterized by having a two-stage overcurrent limiting circuit having a comparator that limits the pulse width.

〔発明の効果〕〔Effect of the invention〕

従って、この過電流制御回路によれば、比較器により、
過大電流が流れたときだけ、制限回路を働かせて、絶対
最大電流を制限することができるので、これによって、
負荷側の短絡等により、過大電流が発生しても、インバ
ータ回路におけるスインを素子の破壊を未然に防止する
ことができる効果がある。
Therefore, according to this overcurrent control circuit, the comparator
Only when an excessive current flows can the limiting circuit be activated to limit the absolute maximum current.
Even if an excessive current occurs due to a short circuit on the load side, etc., it is possible to prevent the inverter circuit from breaking down.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明よシなる過電流制限回路の実施例を示
したブロック図、第2図は、過電流制御波形の説明図、
第3図は、従来のインバータ主回路、第4図は同上のイ
ンバータ主回路に接続される従来の過電流制限回路のブ
ロック図である。 6・・・整流回路      7・・・誤差増幅器8・
・・電源        9・・・正弦波信号10・・
・振幅調整回路      11.12・・・交流帰還
回路13・・・三角波発生回路    14・・・PW
M変調回路15・・・論理回路     16・・・比
較器17・・・基準電圧電源 第31閃
FIG. 1 is a block diagram showing an embodiment of an overcurrent limiting circuit according to the present invention, FIG. 2 is an explanatory diagram of overcurrent control waveforms,
FIG. 3 is a block diagram of a conventional inverter main circuit, and FIG. 4 is a block diagram of a conventional overcurrent limiting circuit connected to the above inverter main circuit. 6... Rectifier circuit 7... Error amplifier 8.
...Power supply 9...Sine wave signal 10...
・Amplitude adjustment circuit 11.12... AC feedback circuit 13... Triangular wave generation circuit 14... PW
M modulation circuit 15...Logic circuit 16...Comparator 17...31st flash of reference voltage power supply

Claims (1)

【特許請求の範囲】[Claims] パルス幅が変調された制御信号により開閉される複数の
スイッチ素子の開閉制御により、直流電源をパルス幅変
調交流出力に変換する変換回路と、基本波成分を抽出し
て交流出力とするフィルタ回路と、上記変換回路に組込
まれた電流トランスにより、出力電流に比例した電圧を
取出す検出回路を備えたインバータにおいて、該インバ
ータの過電流制御回路は、電流トランスにより検出され
た信号を整流する整流回路と基準電圧電源とからの夫々
の信号を入力して、これら双方の差信号を得る交流帰還
回路を有する誤差増幅器と、上記整流回路からの出力と
基準電圧とを比較して、パルス幅を制限する比較器を有
する2段の過電流制限回路を具備せしめたことを特徴と
するインバータの過電流制御回路。
A conversion circuit that converts a DC power source into a pulse width modulated AC output by controlling the opening and closing of multiple switch elements that are opened and closed by pulse width modulated control signals, and a filter circuit that extracts a fundamental wave component and outputs an AC output. , an inverter equipped with a detection circuit that extracts a voltage proportional to the output current by a current transformer incorporated in the conversion circuit, wherein the overcurrent control circuit of the inverter includes a rectifier circuit that rectifies the signal detected by the current transformer. An error amplifier having an AC feedback circuit that inputs each signal from the reference voltage power source and obtains a difference signal between the two, compares the output from the rectifier circuit with the reference voltage, and limits the pulse width. An overcurrent control circuit for an inverter, comprising a two-stage overcurrent limiting circuit having a comparator.
JP61237641A 1986-10-04 1986-10-04 Overcurrent control circuit for inverter Pending JPS6392275A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61237641A JPS6392275A (en) 1986-10-04 1986-10-04 Overcurrent control circuit for inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61237641A JPS6392275A (en) 1986-10-04 1986-10-04 Overcurrent control circuit for inverter

Publications (1)

Publication Number Publication Date
JPS6392275A true JPS6392275A (en) 1988-04-22

Family

ID=17018335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61237641A Pending JPS6392275A (en) 1986-10-04 1986-10-04 Overcurrent control circuit for inverter

Country Status (1)

Country Link
JP (1) JPS6392275A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04364327A (en) * 1991-06-10 1992-12-16 Toyo Electric Mfg Co Ltd Power supply circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55122484A (en) * 1979-03-13 1980-09-20 Fanuc Ltd Sine-wave inverter
JPS58108975A (en) * 1981-12-22 1983-06-29 Toshiba Corp Current controller
JPS61207176A (en) * 1985-03-07 1986-09-13 Toshiba Corp Controller for inverter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55122484A (en) * 1979-03-13 1980-09-20 Fanuc Ltd Sine-wave inverter
JPS58108975A (en) * 1981-12-22 1983-06-29 Toshiba Corp Current controller
JPS61207176A (en) * 1985-03-07 1986-09-13 Toshiba Corp Controller for inverter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04364327A (en) * 1991-06-10 1992-12-16 Toyo Electric Mfg Co Ltd Power supply circuit

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