JPS638914A - Control circuit - Google Patents

Abstract

PURPOSE:To shorten the time required for phase acquisition by detecting the phase difference between two signals to be phase-synchronized being larger than a predetermined value and then resetting a reference phase signal output according to phase information from a rotary body. CONSTITUTION:A control circuit is provided with a reference signal generating circuit 1 which can resets the phase of a reference signal by receiving a reset signal and a phase comparing circuit 3 which outputs the reset signal to the reference signal generating circuit when the phase difference between the output of a phase detector 2 and the output of the reference signal generating circuit 1 is large. Consequently, the reference signal to be synchronized with the rotary body is matched with the rotation of the rotary body without waiting the phase control response of the rotary body and the phase acquisition is completed instantaneously. For example, when this circuit is applied for control over the cylinder of a digital audio tape recorder, such effect that a sound is reproduced immediately and a search is securely made is obtained.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a control circuit for a rotating body.

BACKGROUND OF THE INVENTION Phase control is usually applied to cylinder motors and capstan motors in conventional video tape recorders. An example of conventional phase control of a rotating body will be described below with reference to the drawings.

FIG. 5 is an example of a conventional phase control method for a rotating body.

19 is a motor that drives the rotating body, 15 is an FG, and 16 is a speed detection circuit. 20 is P for detecting the phase of the rotating body
In C, 21 is an amplifier that amplifies the output of the PC 20, 22 is a phase comparison circuit that compares the phase between the output of the amplifier 21 and the reference signal, 23 is a compensation circuit, and 17 is the output of the speed detection circuit 16 and the compensation circuit 23. Adder to add, 18 is motor 1
This is a DC amplifier for driving 9.

The operation of the control circuit configured as described above will be described below.

First, the rotational speed of the motor 19 is converted into an electrical signal by the FCl2 and outputted as a voltage by the speed detection circuit 16. The output of the speed detection circuit 16 is transmitted to a DC amplifier 18 via an adder F to drive a motor 19.

In other words, speed control is applied to the motor. On the other hand, the rotational phase of the motor 19 is converted into an electrical signal by the PC 20 and transmitted to the phase comparison circuit 22 via the amplifier 21. The phase comparison circuit 22 converts the phase difference between the output of the amplifier 21 and the reference signal into a voltage, outputs the voltage, and transmits the voltage to the adder 17 via the compensation circuit 23 . As a result, the motor 19 is subjected to phase control with respect to the reference signal. (For example, servo equipment practice, Sanpo Publishing, page 184).

Problems to be Solved by the Invention However, in the above configuration, the time required for phase attraction is determined by the response time of the phase system and the size of the phase difference. There was a problem in that the interval was longer than in the case of the conventional method.

In view of the above problems, the present invention provides a control circuit with short phase pull-in time.

Means for Solving the Problems In order to solve the above problems, the control circuit of the present invention includes a resettable reference signal generation circuit, detects the phase difference between two signals to be synchronized, and detects the phase difference between the two signals. It is equipped with a phase comparator that outputs a reset signal to the reference signal generation circuit when the phase difference is larger than a predetermined value, and uses the phase comparator output and the summation output of the output of the detector and the speed information of the rotating body.
It operates the drive device for the rotating body.

Effect The present invention has the above-described configuration to apply phase synchronization to two
By detecting that the phase difference between two signals is larger than a predetermined value and resetting the reference phase signal output according to the phase information from the rotating body, the two signals to which phase synchronization is to be applied are reset. The phase difference becomes smaller and the time required for phase attraction becomes shorter.

Embodiment Hereinafter, a control circuit according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In Fig. 1, 1 is a reference signal generation circuit, a phase detection circuit detects the phase of the rotating body, and 3 is a phase difference between the output of the phase detector 2 and the output of the reference signal generation circuit 1, and also outputs the phase difference. is larger than a predetermined value, a phase comparison circuit outputs a reset signal to the reference signal generation circuit 1, 4 is a speed detector that detects the speed of the rotating body, 5 is the output of the phase comparison circuit 3 and a speed detector 4 is an adder for adding the outputs of 4, 6 is a drive means for driving the rotating body, and 7 is a drive circuit for driving the drive means 6. The operation shown in FIG. 1 will be explained using FIGS. 2, 3, and 4.

FIG. 2 shows a specific example of the phase comparator circuit 3 in FIG. 1, in which 2 is a phase detector, 4 is a speed detector, 5 is an adder, and 8
9 is a phase difference voltage conversion circuit; 9 is a determination circuit A that determines whether the output of the phase difference voltage conversion circuit 8 is within a set value and outputs it at a logic level; and 10 is a reference signal obtained by dividing the clock. 1) is a determination circuit B that determines whether the output of the speed detector 4 is within the set value range and outputs it at a logic level; 12 is a D frequency divider circuit with a reset function; 13 14 is a delay circuit that extends the input pulse for a certain period of time, and 14 is a three-man NAND circuit.

In FIG. 3, <al is the third
Figure ('b) shows the characteristics of the determination circuit BIO in Figure 2.

FIG. 4 shows operating waveforms of each part in FIG. 2.

In FIG. 1, the speed of a rotating body rotated by a drive means 6 is converted into a voltage by a speed detector 4, and the voltage is transmitted to a drive circuit 7 via an adder 5. The drive circuit 7 operates the drive means 6 according to the output of the adder 5.

In other words, speed control is applied to the rotating body. Let vo be the output of the speed detector 4 under speed control.

On the other hand, the phase of the rotating body is detected by a phase detector 2. This is shown in FIG. 4(a). Further, a reference signal for applying phase synchronization is generated by a frequency dividing circuit 10. The output of the frequency dividing circuit 10 is
Figure 4(a) shows the phase relationship when the output of the 0-phase detector 2 and the output of the frequency divider circuit 10 shown in Figure m) are synchronized.
In the state of 0 phase synchronization shown in b), the phase difference is 0.
Therefore, the output of the determination circuit A9 becomes L from FIG. 3(a).

Now, let's think about startup. The rotational speed of the rotating body increases and the output of the speed detector 4 becomes V shown in FIG. 3 (bl). When it enters ±β, the output of the determination circuit Bll in FIG. As shown in FIG. 4(e), the output of the D flip-flop 12 becomes H upon receiving the output of the determination circuit Bll.

When the output of the D flip-flop 12 becomes H, the phase relationship between the output of the phase detection circuit 2 and the output of the frequency dividing circuit 10 is shifted as shown in the i section of FIG. 4 (C1, (d)).
If the output of the phase difference voltage conversion circuit 8 falls within the range of 0±α, the output of the determination circuit A9 becomes H based on the characteristics of the determination circuit A9 shown in FIG.
Since the output of H1 determination circuit A9 is H, the output of NA
The output of the ND circuit 14 becomes L at the output timing of the phase detector 2 as shown in FIG.
In response to the output, the frequency divider circuit 10 that outputs a reference signal for synchronization is reset, and the output of the NAND circuit 14, which passes through the delay circuit 13 and is delayed for a certain period of time, resets the D flip-flop 12. The output of the delay circuit 13 is shown in FIG. 4(h). If the output of the frequency dividing circuit 10 after reset is set so that the phase difference with the phase detector 2 is O as shown in the +d) section of FIG. The phase difference between the output and the output of the frequency dividing circuit 10 becomes 0, and the phase control is completed.

Effects of the Invention As described above, the present invention provides a reference signal generation circuit that can reset the phase of a reference signal in response to a reset signal, and a reference signal generation circuit that can reset the phase of a reference signal when the phase difference between the output of a phase detector and the output of the reference signal generation circuit is large. By providing a phase comparator circuit that outputs the signal to the reference signal generation circuit, it is possible to synchronize the reference signal with the rotation of the rotating body without waiting for the phase control response of the rotating body. The phase drawing process ends.

For example, when applied to the cylinder control of a digital audio recorder, effects such as immediate output of sound and reliable search can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram showing a specific example of FIG. 1, FIG. 3 is an explanatory diagram explaining the operation of the specific example of FIG. This figure is a waveform diagram showing the operating waveforms of FIG. 2, and FIG. 5 is a block diagram showing an example of a conventional phase control method. 1... Reference signal generation circuit, 2... Phase detector, 3... Phase comparison circuit, 4...
Speed detector, 5... Adder, 6... Drive means, 7... Drive circuit. Name of acting agent Benshi Toshio Nakao Haka 1 person 1 Figure 3 Figure 1/' Li O+p Tsuji Nia J
Figure 4 (C);

Claims (3)

[Claims] (1) A reference signal generation circuit that outputs a constant cycle reference signal and can reset the phase of the reference signal upon receiving a reset signal, a phase detector that detects and outputs the rotational phase of a rotating body, and a first reference signal. A phase comparator circuit that detects the phase difference between the output of the generator circuit and the output of the earlier phase detector, outputs phase difference information, and outputs a reset signal to the earlier reference signal generator circuit in a transient state; A speed detector that detects and outputs the number of rotations, an adder that adds the output of the first phase detector and the output of the first speed detector, a drive means that drives the rotating body, and a drive circuit that operates the first half drive means. A control circuit characterized in that the time required to pull in the phase of a rotating body is shortened by adjusting the phase of a reference signal to be phase synchronized. (2) When the speed of the rotating body falls within a preset range, the phase comparison circuit outputs a reset signal to the reference signal generation circuit in accordance with the output timing of the phase detector. The control circuit described in (1). (3) When the speed of the rotating body falls within a preset range, if the phase difference between the output of the reference signal generation circuit and the output of the phase detector is outside the preset range, the previous phase The control circuit according to claim 1, further comprising a phase comparison circuit that outputs a reset signal to the reference signal generation circuit in accordance with the output timing of the detector.