JPS6382022A - Self-running frequency calibrating circuit for phase synchronous oscillator - Google Patents
Self-running frequency calibrating circuit for phase synchronous oscillatorInfo
- Publication number
- JPS6382022A JPS6382022A JP61227530A JP22753086A JPS6382022A JP S6382022 A JPS6382022 A JP S6382022A JP 61227530 A JP61227530 A JP 61227530A JP 22753086 A JP22753086 A JP 22753086A JP S6382022 A JPS6382022 A JP S6382022A
- Authority
- JP
- Japan
- Prior art keywords
- control signal
- running frequency
- voltage
- frequency
- free
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 title claims description 4
- 239000000872 buffer Substances 0.000 claims abstract description 23
- 230000010355 oscillation Effects 0.000 claims abstract description 7
- 238000000605 extraction Methods 0.000 claims description 9
- 239000013078 crystal Substances 0.000 abstract description 8
- 238000000034 method Methods 0.000 description 3
- 230000005856 abnormality Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
本発明は電圧制御水晶発振器に対する制御信号を、低出
力インピーダンスから出力し且つ高入力インピーダンス
で受けるようにして電圧駆動とし、且つ上記制御信号の
供給線と自走周波数設定回路との間に電位差抽出回路を
設けて、随時自走周波数を較正可能とするとともに、上
記電位差抽出回路の両端の電位差をＯとすることによっ
て自走周波数が設定されるようにした。[Detailed Description of the Invention] [Summary] The present invention provides a voltage-driven system in which a control signal for a voltage-controlled crystal oscillator is outputted from a low output impedance and received by a high input impedance, and is connected to a supply line for the control signal. A potential difference extraction circuit is provided between the free running frequency setting circuit and the free running frequency can be calibrated at any time, and the free running frequency is set by setting the potential difference between both ends of the potential difference extraction circuit to O. did.
無線装置或いは放送機等における自走周波数較正回路の
改良に関する。This invention relates to improvements in free-running frequency calibration circuits in radio equipment, broadcasting equipment, etc.
従来無線装置や放送機等における位相同期発振器を使用
した装置の自走周波数較正回路は、第２図に示すように
構成されていた。Conventionally, a free-running frequency calibration circuit for a device using a phase-locked oscillator in a radio device, a broadcasting device, etc. has been constructed as shown in FIG.
同図に示す電圧制御水晶発振器３は、基準人力１の周波
数を基準として、発振周波数の安定度を極めて高く保持
している。The voltage controlled crystal oscillator 3 shown in the figure maintains extremely high stability of the oscillation frequency with reference to the frequency of the reference human power 1.
上記構成の回路で、何らかの異常が発生して基準人力１
が供給されないような場合には、制御電圧切り離しスイ
ッチ８を開放して、電圧制御水晶発振器（以下ｖｃｘｏ
と略記する）３のみにより外部に送出する出力１０の発
振周波数を、正常なときと同一に保つ、そのためＶＣＸ
Ｏ３の発振周波数を厳密に較正しておく必要がある。In the circuit with the above configuration, some abnormality occurs and the standard human power is 1.
is not supplied, the control voltage isolation switch 8 is opened and the voltage controlled crystal oscillator (hereinafter referred to as VCXO
VCX
It is necessary to strictly calibrate the oscillation frequency of O3.
しかし上記従来の回路構成におけるＶＣＸＯ３の自走周
波数の較正は、制御電圧切り離しスイッチ８を開放し、
自走周波数設定部７の設定電圧を調整しながら、出力１
０の周波数をカウンタにより測定するという方法によら
ざるを得ない。かかる方法による自走周波数の較正は、
装置を運用していないときしか実施できず、従って放送
器等では、夜間の放送終了時に行っていた。However, in order to calibrate the free-running frequency of the VCXO3 in the above conventional circuit configuration, the control voltage disconnection switch 8 is opened,
While adjusting the setting voltage of the free-running frequency setting section 7, the output 1
The only way to do this is to measure the zero frequency using a counter. Calibration of the free-running frequency by such a method is
This can only be done when the equipment is not in use, so for broadcasters, etc., it was done at the end of night broadcasts.
上述のごとく、従来の位相同期発振回路の構成では、極
めて高い周波数安定度を要求されるにも拘らず、装置の
運用中に自走周波数を較正することができないという問
題があり、更に上記カウンタによる周波数を測定する方
法では、高い安定度に制御された発振周波数の変動を検
出するには、長時間にわたる測定を必要とするという問
題がある。As mentioned above, the configuration of the conventional phase-locked oscillator circuit requires extremely high frequency stability, but there is a problem in that the free-running frequency cannot be calibrated during operation of the device. The method of measuring the frequency according to the method has a problem in that long-term measurement is required in order to detect fluctuations in the oscillation frequency that are controlled with high stability.
そこで本発明においては、装置の運用中に、精度良く且
つ短時間で自走周波数の較正ができる位相同期発振器の
自走周波数較正回路を提供することを口約とする。Therefore, the present invention aims to provide a free-running frequency calibration circuit for a phase-locked oscillator that can calibrate the free-running frequency with high precision and in a short time while the device is in operation.
上記目的を達成するため本発明においては、電圧制御水
晶発振器に対する制御信号を、低出力インピーダンスバ
ッファから出力し、高入力インピーダンスバッファで受
けるようにして制御信号の電流を極少、即ち、電圧のみ
を制御すれば良いようにし、且つ上記制御信号を供給す
る制御信号線と自走周波数設定部との間に電位差抽出回
路を介装し、上記電位差抽出回路の両端の電位差が０と
なるよう調整することにより自走周波数が設定されるよ
うにした。In order to achieve the above object, in the present invention, the control signal for the voltage controlled crystal oscillator is output from a low output impedance buffer and received by a high input impedance buffer, so that the current of the control signal is minimized, that is, only the voltage is controlled. In addition, a potential difference extraction circuit is interposed between the control signal line that supplies the control signal and the free-running frequency setting section, and adjustment is made so that the potential difference between both ends of the potential difference extraction circuit becomes zero. The free running frequency is now set by
制御信号供給線の電流は極めて少ないので、自走周波数
設定部の設定電圧を上記制御信号に一致させておけば、
制御信号を切り離した場合に上記設定電圧がそのまま制
御信号供給線に現れる。しかも上記制御信号は低出力イ
ンピーダンスバッファから出力されているので、上記較
正を行っても電圧制御水晶発振器に入力される制御電圧
は何ら影響を受けないので、装置の運用中に随時較正可
能となる。Since the current in the control signal supply line is extremely small, if the set voltage of the free-running frequency setting section is made to match the above control signal,
When the control signal is disconnected, the set voltage appears as is on the control signal supply line. Furthermore, since the above control signal is output from a low output impedance buffer, the control voltage input to the voltage controlled crystal oscillator is not affected by the above calibration, so it can be calibrated at any time while the device is in operation. .
以下本発明の一実施例を図面を参照しながら説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図に上記一実施例の構成を示す。同図において、位
相比較器２には発振周波数の基準となる基準人力１とｖ
ｃｘｏの出力１０が入力され、その位相差に対応する制
御信号１１は、低出力インピーダンスバッファ４及び高
入力インピーダンスバソファ５を介して、ＶＣＸＯ３に
入力される。FIG. 1 shows the configuration of the above embodiment. In the same figure, the phase comparator 2 has reference human power 1 and v
The output 10 of the CXO is input, and the control signal 11 corresponding to the phase difference thereof is input to the VCXO 3 via the low output impedance buffer 4 and the high input impedance buffer sofa 5.
上記低出力インピーダンスバッファ４から高入力インピ
ーダンスバッファ５にいたる制御信号線１２の途中に制
御信号切り離しスイッチ８が設けられているが、これは
常時は図示したように閉じられている。A control signal disconnection switch 8 is provided in the middle of the control signal line 12 from the low output impedance buffer 4 to the high input impedance buffer 5, but this is normally closed as shown.
更に上記制御信号線１２と自走周波数設定部７との間に
、電位差抽出回路６が設けられ、その両端に電圧計９が
接続されている。Further, a potential difference extraction circuit 6 is provided between the control signal line 12 and the free-running frequency setting section 7, and a voltmeter 9 is connected to both ends thereof.
本実施例は上述のように構成したことにより、通常の動
作時には、位相同期発振器２からは、基準人力１の周波
数に同期した周波数の出力１０が外部に送出される。こ
れと同時に上記周波数に対応する制御信号１１が低出力
インピーダンスバッファ４から送出され、高入力インピ
ーダンスバッファ５を経由してＶＣＸＯ３に入力され、
これの発振周波数を上記基準人力１の周波数と正確に一
致させている。Since the present embodiment is configured as described above, during normal operation, the phase synchronized oscillator 2 outputs an output 10 having a frequency synchronized with the frequency of the reference human power 1 to the outside. At the same time, a control signal 11 corresponding to the above frequency is sent out from the low output impedance buffer 4 and input to the VCXO 3 via the high input impedance buffer 5.
The oscillation frequency of this is made to exactly match the frequency of the reference human power 1 mentioned above.
この制御信号１１の出力光は高入力インピーダンスバッ
ファ５であるので、制御信号１１としては電圧のみが必
要であり、制御のための電流は極めて少ない。また上記
制御信号線１２には、電位差抽出回路６を介して自走周
波数設定部７が接続されているが、制御信号１１は低出
力インピーダンスバッファ４から出力されるので、自走
周波数設定部７が接続されていることによって、上記制
御信号１１の電圧が変動することはない。Since the output light of this control signal 11 is the high input impedance buffer 5, only a voltage is required as the control signal 11, and the current for control is extremely small. Further, a free-running frequency setting section 7 is connected to the control signal line 12 via a potential difference extraction circuit 6, but since the control signal 11 is output from the low output impedance buffer 4, the free-running frequency setting section 7 Because of this connection, the voltage of the control signal 11 does not fluctuate.
従って本実施例においては、電位差抽出回路６の両端、
即ち同図のＰ点とＱ点との電位差が０となるよう自走周
波数設定部７の設定電圧を調整することにより、この設
定電圧は上記制御信号１１の電圧に一致させることがで
き、これによって自走周波数が正しく設定されたことと
なる。Therefore, in this embodiment, both ends of the potential difference extraction circuit 6,
That is, by adjusting the set voltage of the free-running frequency setting section 7 so that the potential difference between point P and point Q in the figure becomes 0, this set voltage can be made to match the voltage of the control signal 11, and this This means that the free-running frequency has been set correctly.
このような較正を行う間も、較正の後も、制御信号１１
の電圧が変動することはないので、本実施例ではかかる
較正を装置が実稼動中においても実施することが可能で
ある。During and after such calibration, the control signal 11
Since the voltage does not fluctuate, this embodiment allows such calibration to be performed even when the device is in actual operation.
また何らかの異常が発生したばあいには、制御信号切り
離しスイッチ４を開放すれば、自走周波数設定部７から
高入力インピーダンスバッファ５に向かう電流は極めて
少ないので、Ｐ点とＱ点との間には電位差は発生せず、
従って高入力インピーダンスバッファ５には、自走周波
数設定部７の設定電圧すなわち正常時の制御信号１１と
同一の電圧が入力される。その結果外部に送出される出
力１０は、正常時と同一の周波数に維持される。In addition, if some abnormality occurs, if the control signal isolating switch 4 is opened, the current flowing from the free-running frequency setting section 7 to the high input impedance buffer 5 is extremely small, so there is a gap between the P point and the Q point. No potential difference occurs;
Therefore, the high input impedance buffer 5 receives the set voltage of the free-running frequency setting section 7, that is, the same voltage as the control signal 11 during normal operation. As a result, the output 10 sent to the outside is maintained at the same frequency as during normal operation.
以上説明した如く本発明によれば、高安定水晶発振器の
自走周波数を、装置の運用中に短時間で高精度且つ容易
に較正することができ、保守の信頼度及び能率が向上す
る。しかも本発明は周波数が低い場合においても実施可
能である。As described above, according to the present invention, the free-running frequency of a highly stable crystal oscillator can be easily calibrated in a short time with high precision during operation of the device, improving the reliability and efficiency of maintenance. Moreover, the present invention can be implemented even when the frequency is low.
第１図は本発明の一実施例の構成説明図、第２図は従来
の自走周波数較正回路の構成説明図である。
図において、１は基準入力、２は位相比較器、３は電圧
制御水晶発振器、４は低出力インピーダンスバッファ、
５は高出力インピーダンスバッファ、６は電位差抽出回
路、７は自走周波数設定部、第 １ 図FIG. 1 is an explanatory diagram of the configuration of an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the configuration of a conventional free-running frequency calibration circuit. In the figure, 1 is a reference input, 2 is a phase comparator, 3 is a voltage controlled crystal oscillator, 4 is a low output impedance buffer,
5 is a high output impedance buffer, 6 is a potential difference extraction circuit, and 7 is a free-running frequency setting section.
Claims (1)
御信号（１１）の電圧により発振周波数が制御される電
圧制御発振器（３）と、前記電圧制御発振器（３）の自
走周波数を設定する自走周波数設定部（７）とを具備す
る位相同期発振回路において、 前記位相比較器（２）から電圧制御発振器（３）にいた
る制御信号（１１）の供給経路上に低出力インピーダン
スバッファ（４）と高入力インピーダンスバッファとを
介装して、前記制御信号（１１）が前記低出力インピー
ダンスバッファ（４）から出力され、前記高入力インピ
ーダンスバッファ（５）を介して前記電圧制御発振器（
３）に入力され、且つ前記２つのバッファ（４、５）間
の制御信号線（１２）と前記自走周波数設定部（７）と
の間に、電位差抽出回路（６）を介装したことを特徴と
する位相同期発振器の自走周波数較正回路。[Claims] A voltage controlled oscillator (3) whose oscillation frequency is synchronized with the frequency of a reference input (1) and whose oscillation frequency is controlled by the voltage of a control signal (11) of a phase comparator (2), and the voltage controlled oscillator ( 3) in a phase-locked oscillator circuit comprising a free-running frequency setting section (7) for setting the free-running frequency, supplying a control signal (11) from the phase comparator (2) to the voltage-controlled oscillator (3); A low output impedance buffer (4) and a high input impedance buffer are interposed on the path, and the control signal (11) is output from the low output impedance buffer (4) and output from the high input impedance buffer (5). via the voltage controlled oscillator (
3) and interposing a potential difference extraction circuit (6) between the control signal line (12) between the two buffers (4, 5) and the free-running frequency setting section (7). A free-running frequency calibration circuit for a phase-locked oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227530A JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227530A JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6382022A true JPS6382022A (en) | 1988-04-12 |
| JPH0748660B2 JPH0748660B2 (en) | 1995-05-24 |
Family
ID=16862348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61227530A Expired - Lifetime JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0748660B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5189266A (en) * | 1989-06-09 | 1993-02-23 | Nissan Motor Co., Ltd. | Vehicular exhaust resonance suppression system and sensing means therefore |
| US8453791B2 (en) | 2009-09-24 | 2013-06-04 | Toyota Jidosha Kabushiki Kaisha | Exhaust pipe part and exhaust apparatus for internal combustion engine |
| US8763384B2 (en) | 2009-11-09 | 2014-07-01 | Toyota Jidosha Kabushiki Kaisha | Exhaust apparatus of internal combustion engine |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61287326A (en) * | 1985-06-13 | 1986-12-17 | Fujitsu Ltd | Adjusting device for free oscillation frequency |
-
1986
- 1986-09-25 JP JP61227530A patent/JPH0748660B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61287326A (en) * | 1985-06-13 | 1986-12-17 | Fujitsu Ltd | Adjusting device for free oscillation frequency |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5189266A (en) * | 1989-06-09 | 1993-02-23 | Nissan Motor Co., Ltd. | Vehicular exhaust resonance suppression system and sensing means therefore |
| US8453791B2 (en) | 2009-09-24 | 2013-06-04 | Toyota Jidosha Kabushiki Kaisha | Exhaust pipe part and exhaust apparatus for internal combustion engine |
| US8763384B2 (en) | 2009-11-09 | 2014-07-01 | Toyota Jidosha Kabushiki Kaisha | Exhaust apparatus of internal combustion engine |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0748660B2 (en) | 1995-05-24 |
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