JPH0748660B2 - Free-running frequency calibration circuit for phase-locked oscillator - Google Patents
Free-running frequency calibration circuit for phase-locked oscillatorInfo
- Publication number
- JPH0748660B2 JPH0748660B2 JP61227530A JP22753086A JPH0748660B2 JP H0748660 B2 JPH0748660 B2 JP H0748660B2 JP 61227530 A JP61227530 A JP 61227530A JP 22753086 A JP22753086 A JP 22753086A JP H0748660 B2 JPH0748660 B2 JP H0748660B2
- Authority
- JP
- Japan
- Prior art keywords
- free
- control signal
- running frequency
- voltage
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
【発明の詳細な説明】 〔概要〕 本発明は電圧制御水晶発振器に対する制御信号を、低出
力インピーダンスから出力し且つ高入力インピーダンス
で受けるようにして電圧駆動とし、且つ上記制御信号の
供給線と自走周波数設定回路との間に電位差抽出回路を
設けて、随時自走周波数を較正可能とするとともに、上
記電位差抽出回路の両端の電位差を０とすることによっ
て自走周波数が設定されるようにした。DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention performs voltage driving by outputting a control signal for a voltage controlled crystal oscillator from a low output impedance and a high input impedance, and uses the control signal supply line and the self-supply line. A potential difference extraction circuit is provided between the potential difference setting circuit and the free-running frequency so that the free-running frequency can be calibrated at any time, and the potential difference between both ends of the potential difference extraction circuit is set to 0 so that the free-running frequency is set. .
無線装置或いは放送機等における自走周波数較正回路の
改良に関する。The present invention relates to improvement of a free-running frequency calibration circuit in a wireless device, a broadcaster or the like.
従来無線装置や放送機等における位相同期発振器を使用
した装置の自走周波数較正回路は、第２図に示すように
構成されていた。2. Description of the Related Art Conventionally, a free-running frequency calibration circuit of a device using a phase-locked oscillator in a wireless device, a broadcaster or the like has been constructed as shown in FIG.
同図に示す電圧制御水晶発振器３は、基準入力１の周波
数を基準として、発振周波数の安定度を極めて高く保持
している。The voltage-controlled crystal oscillator 3 shown in FIG. 1 holds the stability of the oscillation frequency extremely high with reference to the frequency of the reference input 1.
上記構成の回路で、何らかの異常が発生して基準入力１
が供給されないような場合には、制御電圧切り離しスイ
ッチ８を開放して、電圧制御水晶発振器（以下VCXOを略
記する）３のみにより外部に送出する出力10の発振周波
数を、正常なときと同一に保つ。そのためVCXO3の発振
周波数を厳密に較正しておく必要がある。In the circuit with the above configuration, some abnormality occurs and the reference input 1
If the voltage is not supplied, the control voltage disconnecting switch 8 is opened and the oscillation frequency of the output 10 sent to the outside by only the voltage controlled crystal oscillator (VCXO is abbreviated) 3 is made the same as in the normal state. keep. Therefore, it is necessary to strictly calibrate the oscillation frequency of VCXO3.
しかし上記従来の回路や構成におけるVCXO3の自走周波
数の較正は、制御電圧切り離しスイッチ８を開放し、自
走周波数設定部７の設定電圧を調整しながら、出力10の
周波数をカウンタにより測定するという方法によらざる
を得ない。かかる方法による自走周波数の較正は、装置
を運用していないときしか実施できず、従って放送器等
では、夜間の放送終了時に行っていた。However, the calibration of the free-running frequency of the VCXO3 in the above-described conventional circuit and configuration is such that the control voltage disconnecting switch 8 is opened and the frequency of the output 10 is measured by the counter while adjusting the set voltage of the free-running frequency setting unit 7. There is no choice but to use the method. The calibration of the free-running frequency by such a method can be carried out only when the apparatus is not in operation, and therefore, the broadcasting device or the like is carried out at the end of the nighttime broadcasting.
上述のごとく、従来の位相同期発振回路の構成では、極
めて高い周波数安定度を要求されるにも拘らず、装置の
運用中に自走周波数を較正することができないという問
題があり、更に上記カウンタによる周波数を測定する方
法では、高い安定度に制御された発振周波数の変動を検
出するには、長時間にわたる測定を必要とするという問
題がある。As described above, the conventional phase-locked oscillator circuit configuration has a problem in that the free-running frequency cannot be calibrated during operation of the device, although extremely high frequency stability is required. In the method of measuring the frequency according to, there is a problem that measurement for a long time is required to detect the fluctuation of the oscillation frequency controlled with high stability.
そこで本発明において、装置の運用中に、精度良く且つ
短時間で自走周波数の較正ができる位相同期発振器の自
走周波数較正回路を提供することを目的とする。Therefore, it is an object of the present invention to provide a free-running frequency calibration circuit for a phase-locked oscillator, which can accurately calibrate the free-running frequency in a short time during operation of the device.
上記目的を達成するため本発明においては、電圧制御水
晶発振器に対する制御信号を、低出力インピーダンスバ
ッファから出力し、高入力インピーダンスバッファで受
けるようにして制御信号の電流を極少，即ち、電圧のみ
を制御すれば良いようにし、且つ上記制御信号を供給す
る制御信号線と自走周波数設定部との間に電位差抽出回
路を介装し、上記電位差抽出回路の両端の電位差が０と
なるよう調整することにより自走周波数が設定されるよ
うにした。To achieve the above object, in the present invention, a control signal for a voltage controlled crystal oscillator is output from a low output impedance buffer and is received by a high input impedance buffer so that the current of the control signal is minimized, that is, only the voltage is controlled. And a potential difference extracting circuit is provided between the control signal line for supplying the control signal and the free-running frequency setting unit, and the potential difference between both ends of the potential difference extracting circuit is adjusted to be zero. The free-running frequency is set by.
制御信号供給線の電流は極めて少ないので、自走周波数
設定部の設定電圧を上記制御信号に一致させておけば、
制御信号を切り離した場合に上記設定電圧がそのまま制
御信号供給線に現れる。しかも上記制御信号は低出力イ
ンピーダンスバッファから出力されているので、上記較
正を行っても電圧制御水晶発振器に入力される制御電圧
は何ら影響を受けないので、装置の運用中に随時較正可
能となる。The current of the control signal supply line is extremely small, so if the set voltage of the free-running frequency setting unit matches the above control signal,
When the control signal is disconnected, the set voltage directly appears on the control signal supply line. Moreover, since the control signal is output from the low output impedance buffer, the control voltage input to the voltage controlled crystal oscillator is not affected even if the above calibration is performed, so that the calibration can be performed at any time during the operation of the device. .
以下本発明の一実施例を図面を参照しながら説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図に上記一実施例の構成を示す。同図において、位
相比較器２には発振周波数の基準となる基準入力１とVC
XOの出力10が入力され、その位相差に対応する制御信号
11は、低出力インピーダンスバッファ４及び高入力イン
ピーダンスバッファ５を介して、VCXO3に入力される。FIG. 1 shows the configuration of the above embodiment. In the figure, the phase comparator 2 has a reference input 1 and a VC which serve as a reference of the oscillation frequency.
XO output 10 is input and the control signal corresponding to the phase difference
11 is input to VCXO3 via the low output impedance buffer 4 and the high input impedance buffer 5.
上記低出力インピーダンスバッファ４から高入力インピ
ーダンスバッファ５にいたる制御信号線12の途中に制御
信号切り離しスイッチ８か設けられているが、これは常
時は図示したように閉じられている。A control signal disconnecting switch 8 is provided in the middle of the control signal line 12 from the low output impedance buffer 4 to the high input impedance buffer 5, but it is normally closed as shown in the figure.
更に上記制御信号線12と自走周波数設定部７との間に、
電位差抽出回路６が設けられ、その両端に電圧計９が接
続されている。Furthermore, between the control signal line 12 and the free-running frequency setting unit 7,
A potential difference extraction circuit 6 is provided, and a voltmeter 9 is connected to both ends thereof.
本実施例は上述のように構成したことにより、通常の動
作時には、位相同期発振器２からは、基準入力１の周波
数に同期した周波数の出力10が外部に送出される。これ
と同時に上記周波数に対応する制御信号11が低出力イン
ピーダンスバッファ４から送出され、高入力インピーダ
ンスバッファ５を経由してVCXO3に入力され、これの発
振周波数を上記基準入力１の周波数と正確に一致させて
いる。Since the present embodiment is configured as described above, the output 10 having a frequency synchronized with the frequency of the reference input 1 is sent to the outside from the phase locked oscillator 2 during normal operation. At the same time, the control signal 11 corresponding to the above frequency is sent from the low output impedance buffer 4 and input to the VCXO3 via the high input impedance buffer 5, and its oscillation frequency exactly matches the frequency of the reference input 1. I am letting you.
この制御信号11の出力先は高入力インピーダンスバッフ
ァ５であるので、制御信号11としては電圧のみが必要で
あり、制御のための電流は極めて少ない。また上記制御
信号線12には、電位差抽出回路６を介して自走周波数設
定部７が接続されているが、制御信号11は低出力インピ
ーダンスバッファ４から出力されるので、自走周波数設
定部７が接続されていることによって、上記制御信号11
の電圧が変動することはない。Since the output destination of the control signal 11 is the high input impedance buffer 5, only the voltage is required as the control signal 11, and the current for control is extremely small. A free-running frequency setting unit 7 is connected to the control signal line 12 via a potential difference extraction circuit 6, but the control signal 11 is output from the low output impedance buffer 4, so the free-running frequency setting unit 7 is connected. Is connected to the control signal 11
The voltage does not change.
従って本実施例においては、電位差抽出回路６の両端，
即ち同図のＰ点とＱ点との電位差が０となるよう自走周
波数設定部７の設定電圧を調整することにより、この設
定電圧は上記制御信号11の電圧に一致させることがで
き、これによって自走周波数が正しく設定されたことと
なる。Therefore, in this embodiment, both ends of the potential difference extraction circuit 6 are
That is, by adjusting the set voltage of the free-running frequency setting unit 7 so that the potential difference between the P point and the Q point in the figure becomes 0, this set voltage can be made to match the voltage of the control signal 11, This means that the free-running frequency has been set correctly.
このような較正を行う間も、較正の後も、制御信号11の
電圧が変動することはないので、本実施例ではかかる較
正を装置が実稼動中においても実施することが可能であ
る。Since the voltage of the control signal 11 does not fluctuate during or after such calibration, in the present embodiment, such calibration can be performed even while the apparatus is in actual operation.
また何らかの異常が発生したばあいには、制御信号切り
離しスイッチ８を開放すれば、自走周波数設定部７から
高入力インピーダンスバッファ５に向かう電流は極めて
少ないので、Ｐ点とＱ点との間には電位差は発生せず、
従って高入力インピーダンスバッファ５には、自走周波
数設定部７の設定電圧すなわち正常時の制御信号11と同
一の電圧が入力される。その結果外部に送出される出力
10は、正常時と同一の周波数に維持される。Further, if any abnormality occurs, if the control signal disconnecting switch 8 is opened, the current flowing from the free-running frequency setting unit 7 to the high input impedance buffer 5 is extremely small, so that it is between the point P and the point Q. Does not generate a potential difference,
Therefore, the set voltage of the free-running frequency setting unit 7, that is, the same voltage as the control signal 11 in the normal state is input to the high input impedance buffer 5. As a result, the output sent to the outside
10 is maintained at the same frequency as in the normal state.
以上説明した如く本発明によれば、高安定水晶発振器の
自走周波数を、装置の運用中に短時間で高精度且つ容易
に較正することができ、保守の信頼度及び能率が向上す
る。しかも本発明は周波数が低い場合においても実施可
能である。As described above, according to the present invention, the free-running frequency of the highly stable crystal oscillator can be calibrated with high accuracy and easily in a short time during the operation of the device, and the reliability and efficiency of maintenance are improved. Moreover, the present invention can be implemented even when the frequency is low.
第１図は本発明の一実施例の構成説明図、 第２図は従来の自走周波数較正回路の構成説明図であ
る。 図において、１は基準入力、２は位相比較器、３は電圧
制御水晶発振器、４は低出力インピーダンスバッファ、
５は高出力インピーダンスバッファ、６は電位差抽出回
路、７は自走周波数設定部、11は制御信号、12は制御信
号線を示す。FIG. 1 is a structural explanatory view of an embodiment of the present invention, and FIG. 2 is a structural explanatory view of a conventional free-running frequency calibration circuit. In the figure, 1 is a reference input, 2 is a phase comparator, 3 is a voltage controlled crystal oscillator, 4 is a low output impedance buffer,
Reference numeral 5 is a high output impedance buffer, 6 is a potential difference extraction circuit, 7 is a free-running frequency setting unit, 11 is a control signal, and 12 is a control signal line.
Claims (1)
器（２）の制御信号（11）の電圧により発振周波数が制
御される電圧制御発振器（３）と、前記電圧制御発振器
（３）の自走周波数を設定する自走周波数設定部（７）
とを具備する位相同期発振回路において、 前記位相比較器（２）から電圧制御発振器（３）にいた
る制御信号（11）の供給経路上に低出力インピーダンス
バッファ（４）と高入力インピーダンスバッファとを介
装して、前記制御信号（11）が前記低出力インピーダン
スバッファ（４）から出力され、前記高入力インピーダ
ンスバッファ（５）を介して前記電圧制御発振器（３）
に入力され、且つ前記２つのバッファ（4,5）間の制御
信号線（12）と前記自走周波数設定部（７）との間に、
電位差抽出回路（６）を介装し、該電位差抽出回路両端
の電位差が零となるように前記自走周波数設定部の電圧
を変化させることを特徴とする位相同期発振器の自走周
波数較正回路。1. A voltage controlled oscillator (3) whose oscillation frequency is controlled by a voltage of a control signal (11) of a phase comparator (2) in synchronization with a frequency of a reference input (1), and the voltage controlled oscillator (3). ) Free-running frequency setting unit (7)
A phase-locked oscillator circuit comprising: a low output impedance buffer (4) and a high input impedance buffer on a supply path of a control signal (11) from the phase comparator (2) to a voltage controlled oscillator (3). The control signal (11) is output from the low output impedance buffer (4) via the voltage control oscillator (3) via the high input impedance buffer (5).
And between the control signal line (12) between the two buffers (4,5) and the free-running frequency setting unit (7),
A free-running frequency calibration circuit for a phase-locked oscillator, comprising a potential-difference extraction circuit (6), and changing the voltage of the free-running frequency setting unit so that the potential difference across the potential-difference extraction circuit becomes zero.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227530A JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227530A JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6382022A JPS6382022A (en) | 1988-04-12 |
| JPH0748660B2 true JPH0748660B2 (en) | 1995-05-24 |
Family
ID=16862348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61227530A Expired - Lifetime JPH0748660B2 (en) | 1986-09-25 | 1986-09-25 | Free-running frequency calibration circuit for phase-locked oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0748660B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5189266A (en) * | 1989-06-09 | 1993-02-23 | Nissan Motor Co., Ltd. | Vehicular exhaust resonance suppression system and sensing means therefore |
| EP2481897B1 (en) | 2009-09-24 | 2014-12-31 | Toyota Jidosha Kabushiki Kaisha | Exhaust pipe part and exhaust device for internal combustion engine |
| CN102782266B (en) | 2009-11-09 | 2014-04-02 | 丰田自动车株式会社 | Exhaust device of internal combustion engine |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61287326A (en) * | 1985-06-13 | 1986-12-17 | Fujitsu Ltd | Adjusting device for free oscillation frequency |
-
1986
- 1986-09-25 JP JP61227530A patent/JPH0748660B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6382022A (en) | 1988-04-12 |
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