JPS6381998A - Manufacture of multilayer board for mounting ic chips - Google Patents

Manufacture of multilayer board for mounting ic chips

Info

Publication number
JPS6381998A
JPS6381998A JP61226115A JP22611586A JPS6381998A JP S6381998 A JPS6381998 A JP S6381998A JP 61226115 A JP61226115 A JP 61226115A JP 22611586 A JP22611586 A JP 22611586A JP S6381998 A JPS6381998 A JP S6381998A
Authority
JP
Japan
Prior art keywords
chip
mounting
board
multilayer
multilayer board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61226115A
Other languages
Japanese (ja)
Other versions
JPH0722224B2 (en
Inventor
池口 信之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Gas Chemical Co Inc
Original Assignee
Mitsubishi Gas Chemical Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Gas Chemical Co Inc filed Critical Mitsubishi Gas Chemical Co Inc
Priority to JP61226115A priority Critical patent/JPH0722224B2/en
Publication of JPS6381998A publication Critical patent/JPS6381998A/en
Publication of JPH0722224B2 publication Critical patent/JPH0722224B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ICチップ搭載用多層板の製造法であり、多
層化用の低流動性接着シートからの樹脂流れによる内層
用プリント配線板に形成された端子部の汚れからの保護
を信軌性よく達成したものであり、特に好ましい態様に
おいては、耐マイグレーション性(高湿度下、配線導体
間の絶縁が導体金属イオンの拡散により破壊される現象
)が生じ難く、また耐水蒸気性の優れた多層板を提供す
るものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is a method for manufacturing a multilayer board for mounting an IC chip, and is a method for manufacturing a multilayer board for mounting an IC chip. It achieves protection of the formed terminal from dirt with good reliability, and in a particularly preferred embodiment, it has migration resistance (under high humidity, the insulation between wiring conductors is destroyed by the diffusion of conductor metal ions). The purpose of the present invention is to provide a multilayer board that is less likely to cause this phenomenon and has excellent water vapor resistance.

〔従来の技術およびその問題点〕[Conventional technology and its problems]

ICチップ搭載用の多層板、例えば、多層ビン・グリッ
ド・アレイ (多層PGA)の基板としてはセラミック
スが使用されている。しかし、セラミックスは耐衝撃性
に劣り、誘電率が高(、加工性に劣るなどの問題がある
。しかも、急速に高密度化しているICチップを搭載す
る必要性から、現在はより低誘電率で、加工が筒便でよ
り低価格のものが要求されている。
Ceramics are used as substrates for multilayer boards for mounting IC chips, such as multilayer bin grid arrays (multilayer PGAs). However, ceramics have problems such as poor impact resistance, high dielectric constant (and poor workability).Moreover, due to the need to mount IC chips, which are rapidly increasing in density, ceramics are currently being made with lower dielectric constants. Therefore, there is a demand for something that can be processed easily and at a lower price.

又、プラスチック製の両面板を使用してプラスチック両
面PGA基板が製造されているが、加工性の点から、ビ
ン数を150以上とした場合には、線巾及び線間間隔を
より狭くすることが必須となる為、不良が発生し易いと
いう問題点があった。
Also, plastic double-sided PGA boards are manufactured using plastic double-sided boards, but from the viewpoint of processability, when the number of bins is set to 150 or more, the line width and the line spacing must be narrower. Since this is essential, there is a problem in that defects are likely to occur.

この不良の発生の低減策として、多層化する方法がある
が、公知の低流動性の多層化用接着シートは、耐マイグ
レーシヨン性に劣り、耐水蒸気性も不十分であるという
実用上の問題がある。さらに、この接着シートの樹脂流
れを100−以下にすると、プリント配線金属箔(通常
は銅箔)の間に樹脂が充分に充填されず、眉間密着不良
が生じるという問題が生じ、逆に、樹脂流れを必要充分
に設定した場合には端子部先端まで樹脂が流れて端子部
を汚染し、ワイヤボンディング不良が発生するという問
題点が生じるものである。この解決策として従来は、プ
リント配線銅箔間隙に樹脂を予め充填したプリント配線
板を使用する方法がとられていたが、工程面で不利とな
る。
One way to reduce the occurrence of this defect is to create multiple layers, but known low-flow multilayer adhesive sheets have practical problems such as poor migration resistance and inadequate water vapor resistance. There is. Furthermore, if the resin flow of this adhesive sheet is set to 100 or less, the resin will not be sufficiently filled between the printed wiring metal foils (usually copper foils), resulting in poor adhesion between the eyebrows. If the flow is set to a sufficient level, the resin will flow to the tip of the terminal portion, contaminating the terminal portion and causing wire bonding defects. A conventional solution to this problem has been to use a printed wiring board in which the gaps between the printed wiring copper foils are filled with resin in advance, but this is disadvantageous in terms of the process.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、上記の問題点を解決する方法について鋭意検
討した結果、多層化積層成形に先立って多層化用プリン
ト配線板の端子部の外周周囲に、多層化接着用シートか
らの樹脂流れを防止する枠を形成する方法を見出し、こ
れに基づいて完成したものである。
As a result of intensive studies on methods to solve the above problems, the present invention has been developed to prevent resin from flowing from a multilayer adhesive sheet around the outer periphery of the terminal portion of a multilayer printed wiring board prior to multilayer lamination molding. He discovered a method to form a frame that would allow for the creation of a frame, and completed it based on this method.

すなわち、本発明は、少なくともICチップ搭載用の穴
及び接続用の端子部を有する多層板の製造法において、
内層を形成するプリント配線板として、ICチップ接続
用の端子部の外周周囲に、予め光若しくは熱硬化型のレ
ジストを用いて枠を作製した多層化用のプリント配線板
を使用し、これを所定位置に所定の大きさの孔を形成し
た低流動性接着シートを用いて多層化積層成形すること
を特徴とするICチップ搭載用多層板の製造法であり、
好ましい実施B様においては、該低流動性接着シートが
、(a)多官能性シアン酸エステル樹脂組成物、(′b
)実質的に非結晶性の熱可塑性飽和ポリエステル樹脂及
び(c)硬化触媒を必須成分とする熱硬化性樹脂組成物
のシート若しくはフィルム又は該熱硬化性樹脂組成物を
補強基材に含浸・乾燥してB−stage化してなるも
のを用いること、更に多層化積層成形を100wHg以
下の減圧状態で行うことを特徴とするものである。
That is, the present invention provides a method for manufacturing a multilayer board having at least a hole for mounting an IC chip and a terminal portion for connection.
As the printed wiring board forming the inner layer, a multilayer printed wiring board is used in which a frame is made in advance using photo- or thermosetting resist around the outer periphery of the terminal part for connecting the IC chip, and this is A method for manufacturing a multilayer board for mounting an IC chip, characterized by performing multilayer lamination molding using a low-flow adhesive sheet with holes of a predetermined size formed at positions,
In preferred embodiment B, the low fluidity adhesive sheet comprises (a) a polyfunctional cyanate ester resin composition, ('b
) A sheet or film of a thermosetting resin composition containing a substantially amorphous thermoplastic saturated polyester resin and (c) a curing catalyst as essential components, or a reinforcing base material is impregnated with the thermosetting resin composition and dried. The present invention is characterized in that a B-stage material is used, and the multilayer lamination molding is performed under a reduced pressure of 100 wHg or less.

以下、本発明の構成について説明するゆ本発明のICチ
ップ搭載用の多N板(以下、単に「本多層板」という)
とは、ICチップの搭載用の穴部とその穴周囲に搭載し
たICチップとの接続用の通常金メンキされた端子部を
形成してなる中間層を少なくともIN有する多層板であ
り、スルーホールメッキによる眉間の配線、多数のビン
を立てた所謂「ビン・グリッド・アレイjなどを含むも
のである。
The structure of the present invention will be explained below.The multi-N board for mounting an IC chip of the present invention (hereinafter simply referred to as "this multi-layer board")
is a multilayer board that has at least an intermediate layer (IN) consisting of a hole for mounting an IC chip and a terminal, usually gold-plated, for connection to the IC chip mounted around the hole. It includes plating wiring between the eyebrows and a so-called ``bin grid array'' with a large number of bins.

本多層板の製造工程は、通常の多層化積層成形方法が使
用され、例えば、両面銅張積層板の片面に公知方法で端
子部を含む配線網又はICチップ搭載部若しくはICチ
ップ搭載部に穴を掘り込んでなり、他面に所望の配線網
を形成してなるプリント配線板(基板I)、所望の孔及
び端子部を含む配線網を形成した片面銅張積層板(片面
板■)及び所望の孔を形成した接着シートIを準備し、
基板Iに片面板■を接着シート■を介して位置合わせし
て所望の組数重ね一回の積層成形により多層板とする方
法;両面銅張積層板の片面に公知方法で端子部を含む配
線網又はICチップ搭載部若しくはICチップ搭載部に
穴を堀り込んでなり、他面未処理の基板Iと片面銅張積
層板とを必要に応じて所定の孔を形成した接着シートl
で多層化積層成形し、積層した銅箔面に予め設けた基準
マークに基づいて端子部を含む配線網を形成し、再びこ
の上に片面銅張積層板を積層成形し、配線網の作製をす
る工程を繰り返した後、必要に応じてスルーホールメッ
キ、両面の配″mmの形成を行い、切削加工してIC装
着部及び端子部を露出させる方法、その他何れの方法で
もよい。
In the manufacturing process of this multilayer board, a normal multilayer lamination molding method is used. For example, a wiring network including a terminal part, an IC chip mounting part, or an IC chip mounting part is drilled on one side of a double-sided copper-clad laminate using a known method. A printed wiring board (substrate I) formed by digging a hole and forming a desired wiring network on the other side, a single-sided copper-clad laminate (single-sided board ■) formed with a wiring network including desired holes and terminals, and Prepare an adhesive sheet I in which desired holes are formed,
A method of forming a multilayer board by aligning a single-sided board (■) to a substrate (I) via an adhesive sheet (■) and laminating the desired number of sets in one go; Wiring including a terminal portion on one side of a double-sided copper-clad laminate by a known method. Adhesive sheet l formed by drilling holes in the net or IC chip mounting part or IC chip mounting part, and forming predetermined holes as necessary between the substrate I, which is untreated on the other side, and the copper-clad laminate on one side.
A wiring network including terminals is formed based on reference marks pre-set on the laminated copper foil surface, and a single-sided copper-clad laminate is laminated on top of this again to create a wiring network. After repeating the process, if necessary, through-hole plating, forming a diameter of 2 mm on both sides, cutting to expose the IC mounting part and the terminal part, or any other method may be used.

本多層板に使用するプリント配線板用の積層板としでは
、ガラス繊維、石英繊維、全芳香族ポリアミド、ポリイ
ミド、セミカーボン繊維などの単独もしくは混合使用し
てなる不織布や織布強化の従来の両面又は片面金属箔張
積層板であれば何れも使用可能であるが、具体的にはガ
ラス布エポキシ積層板、耐熱性ガラス布エポキシ積層板
、石英繊維布エポキシ積層板、ガラス布シアン酸エステ
ル系樹脂積層板(三菱瓦斯化学側型、CCL−H800
゜CCL−H830,CCL−H870他)、石英繊維
布シアン酸エステル系樹脂積層板、ガラス布ポリイミド
系積層板などの熱硬化樹脂系の積層板および高耐熱性の
熱可塑性樹脂系の積層板が例示される。
The laminates for printed wiring boards used in this multilayer board are conventional double-sided nonwoven fabrics or woven fabrics reinforced with glass fibers, quartz fibers, wholly aromatic polyamides, polyimides, semi-carbon fibers, etc., used alone or in combination. Alternatively, any one-sided metal foil-clad laminate can be used, but specifically, glass cloth epoxy laminate, heat-resistant glass cloth epoxy laminate, quartz fiber cloth epoxy laminate, glass cloth cyanate ester resin. Laminated board (Mitsubishi Gas Chemical side type, CCL-H800
゜CCL-H830, CCL-H870, etc.), thermosetting resin-based laminates such as quartz fiber cloth cyanate ester-based resin laminates, glass cloth polyimide-based laminates, and highly heat-resistant thermoplastic resin-based laminates. Illustrated.

端子部及び配線部を形成した基板I、積層した片面板I
又は片面板Hの端子部の外周周囲に細い枠を作製するた
めに用いる光若しくは熱硬化性のレジストとしては、通
常プリント配線板の製造に使用されている光若しくは熱
硬化性のレジストが使用できるものであり、通常のスク
リーン法やフォトレジスト法による。この枠の巾は通常
0.1〜1鶴の範囲であり、通常金メッキを施す或いは
施した端子部より外側に位置し端子部の内端から通常1
〜5龍の位置に形成する。
Substrate I with terminals and wiring formed, laminated single-sided board I
Alternatively, as the photo- or thermosetting resist used to create a thin frame around the outer periphery of the terminal portion of the single-sided board H, a photo- or thermosetting resist that is normally used in the manufacture of printed wiring boards can be used. It is made using the usual screen method or photoresist method. The width of this frame is usually in the range of 0.1 to 1 square inch, and it is usually located outside the gold-plated or coated terminal part, and is usually 1 square inch from the inner edge of the terminal part.
~ Form at the position of 5 dragons.

本発明の多層化接着用の低流動性接着シートとしては、
通常の多層化用接着シートの場合には樹脂流れが0.0
5〜31息の範囲のものであれば使用可能である。樹脂
流れが少なすぎると基板との密着性が悪く、銅箔で形成
した配線導体間への樹脂の充填が不十分となり、逆に樹
脂流れが大きすぎると樹脂が前記で説明した樹脂枠を超
えて端子部を汚染することとなる。このような特性の他
に、密着性、接着性、その他の物性面から本発明におい
ては、(al多官能性シアン酸エステル樹脂組成物、(
b)実質的に非結晶性の熱可塑性飽和ポリエステル樹脂
及び(c1硬化触媒を必須成分とする熱硬化性樹脂組成
物のシートもしくはフィルム又は該熱硬化製樹脂組成物
を補強基材に含浸・乾燥してB−stage化してなる
もの(特開昭60−192779 、同60〜2331
75に記載)が好ましい。ここに、樹脂成分(a)であ
る多官能性シアン酸エステル樹脂組成物とは、シアナト
基を有する多官能性シアン酸エステル、そのプレポリマ
ー等を必須成分としてなるものであり、シアナト樹脂(
特公昭41−1928 、同45−11712、同44
−1222 、DE−1,190,184等)、シアン
酸エステル−マレイミド樹脂、シアン酸エステル−マレ
イミド−エポキシ樹脂(特公昭54−30440.同5
2−31279、[JSP−4,110,364等)、
シアン酸エステル−エポキシ樹脂(特公昭46−411
12)などで代表されるものである。又、(b)成分の
実質的に非結晶性の熱可塑性飽和ポリエステル樹脂とは
、芳香族乃至脂肪族のジカルボン酸と脂肪族乃至脂環族
のジオール若しくはそのプレポリマーとを主成分として
重縮合させてなるものである。本発明においては、通常
、末端官能基数より算出される数平均分子量が1 、5
00〜25,000、好ましくは5.000〜22.0
00のものが相溶性などより好ましい。また、水酸基価
が1〜30■・KOH/gのものが好適である。
The low fluidity adhesive sheet for multilayer adhesive of the present invention includes:
In the case of a normal multilayer adhesive sheet, the resin flow is 0.0
Anything in the range of 5 to 31 breaths can be used. If the resin flow is too small, the adhesion with the board will be poor and the resin will not be filled between the wiring conductors formed with copper foil, and on the other hand, if the resin flow is too large, the resin will exceed the resin frame explained above. This will contaminate the terminal area. In addition to these properties, in the present invention, from the viewpoint of adhesion, adhesion, and other physical properties, (al polyfunctional cyanate ester resin composition, (
b) A sheet or film of a thermosetting resin composition containing a substantially amorphous thermoplastic saturated polyester resin and a c1 curing catalyst as an essential component, or a reinforcing base material is impregnated with the thermosetting resin composition and dried. (JP-A-60-192779, JP-A-60-2331)
75) is preferred. Here, the polyfunctional cyanate ester resin composition that is the resin component (a) is one that contains a polyfunctional cyanate ester having a cyanato group, a prepolymer thereof, etc. as essential components, and a cyanato resin (
Special Publication No. 41-1928, No. 45-11712, No. 44
-1222, DE-1,190,184, etc.), cyanate ester-maleimide resin, cyanate ester-maleimide-epoxy resin (Japanese Patent Publication No. 54-30440.
2-31279, [JSP-4, 110, 364, etc.),
Cyanate ester-epoxy resin (Special Publication No. 46-411
12), etc. In addition, the substantially non-crystalline thermoplastic saturated polyester resin of component (b) is a polycondensation resin mainly composed of an aromatic or aliphatic dicarboxylic acid and an aliphatic or alicyclic diol or a prepolymer thereof. It is something that can be done. In the present invention, the number average molecular weight calculated from the number of terminal functional groups is usually 1 or 5.
00-25,000, preferably 5.000-22.0
00 is preferable due to compatibility and other considerations. Further, those having a hydroxyl value of 1 to 30 .KOH/g are suitable.

これは、該ポリエステル樹脂に遊離の水酸基もしくはカ
ルボキシル基が過剰に有った場合には、これらの基と(
al成分のシアナト基とが徐々に常温においても反応し
、組成物の保存安定性が劣ることとなるためである。ま
た、結晶性は低い程好ましく、用いる酸およびアルコー
ル成分の種類および使用量比を選択されるものである。
This means that if the polyester resin has an excess of free hydroxyl groups or carboxyl groups, these groups and (
This is because the cyanato group of the al component gradually reacts even at room temperature, resulting in poor storage stability of the composition. Further, the lower the crystallinity, the better, and the type and amount ratio of the acid and alcohol components to be used are selected.

かかる実質的に非結晶性の熱可塑性飽和ポリエステル樹
脂としては、日本合成化学工業−から商品名「ポリニス
クー」として市販されているものが好適である。
As such a substantially non-crystalline thermoplastic saturated polyester resin, one commercially available from Nippon Gosei Kagaku Kogyo under the trade name "Polynisku" is suitable.

上記した成分(a)と成分(b)との配合比率は、特に
限定のないものであるが、通常、成分(a)30〜95
重量部、成分(b)70〜5重量部であり、成分(a)
及び(b)の混合方法は特に限定されないが、通常、(
a)成分の溶液を調製し、これに山)成分又は(bl成
分の溶液を混合する方法;無溶剤でそれぞれの成分を溶
融混合した後、溶液とする方法;更に、前記した併用可
能成分のなかの反応性希釈剤などを使用し無溶剤の液状
乃至ペースト状の組成物とする方法等によって樹脂組成
物を予め調製し、これに必要に応じて公知の触媒、特に
有機過酸化物、有機金属塩などを添加し混合する方法;
前記した混合時に触媒等を併用して混合する方法などに
よる。有機溶媒としては好適には、メチルエチルケトン
、ア七トン、トルエン、キシレン、トリクロロエチレン
、ジオキサンなどが例示され、濃度としては含浸に必要
な樹脂量及び粘度により選択されるが、通常、20〜6
0重量%が好適である。
The blending ratio of component (a) and component (b) described above is not particularly limited, but usually component (a) is 30 to 95
parts by weight, component (b) 70 to 5 parts by weight, component (a)
The method of mixing and (b) is not particularly limited, but usually (
a) A method of preparing a solution of the components and mixing therewith a solution of the component (mountain) or (bl component); a method of melting and mixing each component without a solvent and then forming a solution; A resin composition is prepared in advance by a method of making a solvent-free liquid or paste composition using a reactive diluent, etc., and if necessary, a known catalyst, especially an organic peroxide, an organic A method of adding and mixing metal salts, etc.;
The above-mentioned mixing method may be performed by using a catalyst or the like at the time of mixing. Preferred examples of the organic solvent include methyl ethyl ketone, a7tone, toluene, xylene, trichloroethylene, and dioxane, and the concentration is selected depending on the amount of resin and viscosity required for impregnation, but is usually 20 to 6
0% by weight is preferred.

更に、(c)成分の補強基材としては、前記した基板■
に使用するものと同様の繊維布基材類、及び四フフ化エ
チレン製の連続気泡の多孔質基材が例示され、通常、厚
み0.03〜0.2鶴程度のものである。
Furthermore, as the reinforcing base material for component (c), the above-mentioned substrate ①
Examples include fiber cloth substrates similar to those used in , and open-cell porous substrates made of tetrafluoroethylene, and usually have a thickness of about 0.03 to 0.2 mm.

上記で調製した本樹脂溶液を(c1成分の補強基材に樹
脂!  35〜85重量%の範囲となるように含浸した
後、120〜170℃、1〜20分間乾燥して溶剤を除
去し、所謂rB−stageJ化する。
After impregnating the reinforcing base material of the c1 component with the resin solution prepared above to a resin content in the range of 35 to 85% by weight, the solvent was removed by drying at 120 to 170°C for 1 to 20 minutes. It becomes so-called rB-stageJ.

多層化積層成形の条件は、触媒・組成成分、基材の種類
などによっても変化するが、通常100〜300℃、0
.1〜100 kg/cd、好ましくは5〜50kg/
d、特に10〜40kg/cdの範囲内である。又、本
発明においては、多層化積層成形を100mHg以下の
減圧状態で実施することが、ボイドの発生などを無くす
固めら特に好適である。
The conditions for multilayer lamination molding vary depending on the catalyst, composition components, type of base material, etc., but are usually 100 to 300°C, 0.
.. 1-100 kg/cd, preferably 5-50 kg/cd
d, especially within the range of 10 to 40 kg/cd. Further, in the present invention, it is particularly preferable to carry out the multilayer lamination molding under a reduced pressure of 100 mHg or less, in order to eliminate the occurrence of voids and the like.

以下、実施例、比較例によって本発明をさらに具体的に
説明する。尚、実施例、比較例中の部は特に断らない限
り重量部である。
Hereinafter, the present invention will be explained in more detail with reference to Examples and Comparative Examples. In addition, parts in Examples and Comparative Examples are parts by weight unless otherwise specified.

実施例−1 2,2−ビス(4−シアナトフェニル)プロパン750
部を160℃で4時間予備反応させてプレポリマーとし
た。このプレポリマーに実質的に非結晶性の熱可塑性飽
和ポリエステル樹脂(商品名:ポリエスタ−LP−03
5、日本合成化学工業■製、末端官能基数より算出され
る数平均分子量16,000 、水酸基価6■KOH/
g ) 250部、さらにビスフェノールA型エポキシ
樹脂(商品名:エピコート828、油化シェルエポキシ
側型)50部を加え、メチルエチルケトン(以下、ME
Kという)に溶解混合し、濃度60%の溶液とした(フ
ェス(alという)。
Example-1 2,2-bis(4-cyanatophenyl)propane 750
A prepolymer was obtained by preliminarily reacting a portion at 160° C. for 4 hours. This prepolymer is a substantially non-crystalline thermoplastic saturated polyester resin (trade name: Polyester-LP-03).
5. Manufactured by Nippon Gosei Kagaku Kogyo ■, number average molecular weight calculated from the number of terminal functional groups: 16,000, hydroxyl value: 6 ■KOH/
g) 250 parts and further 50 parts of bisphenol A type epoxy resin (trade name: Epicoat 828, oil-based shell epoxy side type) were added, and methyl ethyl ketone (hereinafter referred to as ME
(referred to as K) and mixed to make a solution with a concentration of 60% (referred to as FES (referred to as al).

フェス(8)に触媒としてオクチル酸亜鉛0.12部を
加え均一に混合し、この溶液を厚み150−の表面処理
した離型紙の片面に連続的に塗布して、接着剤層の厚み
40−のB−stageの離型紙付き接着シート (以
下、シート■という)を製造した。
Add 0.12 parts of zinc octylate as a catalyst to the face (8), mix uniformly, and apply this solution continuously to one side of surface-treated release paper with a thickness of 150 mm to form an adhesive layer with a thickness of 40 mm. A B-stage adhesive sheet with release paper (hereinafter referred to as sheet ①) was manufactured.

他方、熱硬化性のポリイミド樹脂(商品名;にERIM
ID 601、ロース・ブーラン社製)700部とエポ
キシ樹脂(商品名;エピコート1001 、油化シェル
エポキシ側製”) 300部とをN−メチルピロリドン
に溶解し、触媒として過酸化ベンゾイル1部を添加した
ものを厚み0.1mmのガラス織布に含浸・乾燥してB
−stageのプリプレグとし、このプリプレグと厚み
35u−の電解銅箔を用いて、180℃、20kg/a
dで1時間、更に温度を230℃に昇温後、40kg/
CIJで15分間積層成形して、厚み0.3Hの片面銅
張積層板及び厚みQ、7mmの両面銅張積層板を製造し
た。
On the other hand, thermosetting polyimide resin (product name: ERIM)
700 parts of epoxy resin (trade name: Epicoat 1001, manufactured by Yuka Shell Epoxy) were dissolved in N-methylpyrrolidone, and 1 part of benzoyl peroxide was added as a catalyst. Impregnated it into a 0.1mm thick glass woven cloth and dried it to form B.
-stage prepreg and using this prepreg and 35u-thick electrolytic copper foil, 180℃, 20kg/a
d for 1 hour, and after further raising the temperature to 230℃, 40kg/
A single-sided copper-clad laminate with a thickness of 0.3H and a double-sided copper-clad laminate with a thickness of Q of 7 mm were manufactured by lamination molding in CIJ for 15 minutes.

この両面銅張積層板に、公知方法により、端子部には金
メッキを施し、ICチップ装着部を彫り込みし、裏面に
も所望の配線網並びにその保護膜を形成して基板■とし
、片面銅張a層板も同様に端子部には金メッキを施しそ
の周囲の配線網には保護膜を形成した片面板■を作製し
た。基板■の端子部の周囲外周に端子内端から1mの位
置に中0.5鰭の枠を多官能性シアン酸エステル系レジ
スト(商品名、 BT M 450、三菱瓦斯化学■製
)でスクリーン法にて印刷し、150℃で40分間加熱
硬化させた。
This double-sided copper-clad laminate was plated with gold on the terminals and engraved with an IC chip mounting area using a known method, and the desired wiring network and its protective film were formed on the back side to form a substrate (2). For the A-layer board, a single-sided board (2) in which the terminal portion was plated with gold and a protective film was formed on the surrounding wiring network was fabricated. Screen a medium 0.5 fin frame at a position 1 m from the inner edge of the terminal on the outer periphery of the terminal part of the board (■) using a polyfunctional cyanate ester resist (trade name: BT M 450, manufactured by Mitsubishi Gas Chemical ■). It was printed and cured by heating at 150° C. for 40 minutes.

次に、上記で得たシートIを前記で得た片面板■の裏面
に重ね、温度120℃の熱ロールで接着剤層を片面板■
に転写した後、ICチップ装着部を所定の大きさに打抜
きした。
Next, the sheet I obtained above was placed on the back side of the single-sided board ■ obtained above, and the adhesive layer was applied to the single-sided board ■ using a hot roll at a temperature of 120°C.
After the image was transferred to , the IC chip mounting portion was punched out to a predetermined size.

基板■の端子部形成面の上に、接着シー)JW付きの片
面板■を位置合わせして重ね、)ユ度175℃、圧力 
20 kg / cdで2時間積層成形し多層板を得た
Align and stack the single-sided board (■) with an adhesive sheet (JW) on the terminal forming surface of the board () at 175℃ and pressure.
Lamination molding was carried out for 2 hours at 20 kg/cd to obtain a multilayer board.

この多層板の所定のビン立て位置に孔を開け、ついで外
形加工し、スルーホールメッキを施すことなくビン立て
を行い3層のプラスチックPGAとした。孔開は時にス
ミアの発生を観察したが、スミア発生は認められなかっ
た。
A hole was made in this multilayer board at a predetermined position for a bottle stand, and then the outer shape was processed, and a bottle stand was formed without through-hole plating, resulting in a three-layer plastic PGA. Occasionally, smear formation was observed during hole opening, but no smear formation was observed.

このプラスチックPGAの内層の表面抵抗劣化を130
℃、2.8気圧のプレッシャークツカーテストで測定し
た結果、抵抗値が108Ω以下になるまでの時間は32
0時間であった。
The surface resistance deterioration of the inner layer of this plastic PGA is 130
As a result of measuring by pressure tester at ℃ and 2.8 atm, the time required for the resistance value to decrease to 108 Ω or less was 32 Ω.
It was 0 hours.

また、接着シートの端子部側へのレジスト枠を超えての
はみ出しは、30戸以下に止まるものであり(レジスト
枠の無い場合は、21程度である)、内層配線網間間隙
について、断面切断サンプルを顕微鏡観察した結果、空
隙は全く認めらず、更に、260℃の半田浴に20秒フ
ロートによっても眉間剥離や膨れなどの不良の発生はな
かった。
In addition, the protrusion of the adhesive sheet beyond the resist frame to the terminal side should be limited to 30 units or less (if there is no resist frame, it would be about 21 units), and the cross-sectional cut with respect to the gap between the inner layer wiring networks. As a result of microscopic observation of the sample, no voids were observed, and no defects such as glabellar peeling or blistering occurred even when floated in a 260° C. solder bath for 20 seconds.

実施例−2 1,3−ジシアナトベンゼン850部とビス(4−マレ
イミドフェニル)メタン150部とを150℃で1.5
時間予備反応させてプレポリマーとした。このプレポリ
マーに実質的に非結晶性の熱可塑性飽和ポリエステル樹
脂(商品名:ポリエスタ−LP−033、日本合成化学
工業■製、末端官能基数より算出される数平均分子量1
6,000 、水酸基価6■KO)I/g)550部及
び実質的に非結晶性の熱可塑性飽和ポリエステル樹脂(
商品名:ポリエスタ−LP−044、日本合成化学工業
■製、末端官能基数より算出される数平均分子i 7,
000、水酸基価15■KOH/g) 100部を加え
、肝Kに溶解混合し、濃度60%の溶液とした(ワニス
(1〕)という)。
Example-2 850 parts of 1,3-dicyanatobenzene and 150 parts of bis(4-maleimidophenyl)methane were mixed at 150°C for 1.5 parts.
A prepolymer was prepared by pre-reacting for a period of time. This prepolymer is a substantially non-crystalline thermoplastic saturated polyester resin (trade name: Polyester-LP-033, manufactured by Nippon Gosei Kagaku Kogyo ■, with a number average molecular weight of 1 calculated from the number of terminal functional groups).
6,000, hydroxyl value 6■KO)I/g) 550 parts and a substantially non-crystalline thermoplastic saturated polyester resin (
Product name: Polyester LP-044, manufactured by Nippon Gosei Kagaku Kogyo ■, number average molecule calculated from the number of terminal functional groups i7,
000, hydroxyl value 15 ■KOH/g) was added and dissolved in liver K to form a solution with a concentration of 60% (referred to as varnish (1)).

ワニス山)に触媒どしてオクチル酸亜鉛0007部を加
え均一に混合し、この溶液を厚み0.04 mmのガラ
ス織布に含浸・屹燥して、上下の樹脂層厚4〇−のB−
stageのプリプレグ(以下1、シート■という)を
製造した。
0007 parts of zinc octylate was added as a catalyst to the varnish (varnish pile) and mixed uniformly, and this solution was impregnated into a 0.04 mm thick glass woven cloth and dried to form B with a thickness of 40 mm on the upper and lower resin layers. −
A stage prepreg (hereinafter referred to as 1, sheet 2) was manufactured.

他方、厚み0.3mの片面銅張積層板及び厚み11亀の
両面銅張積層板として多官能性シアン酸エステル系ガラ
ス布銅張積層板(商品名、CCL Hl、830、三菱
瓦斯化学(11製)を用い、両面銅張積層板に、公知方
法により片面に金メ・ツキを施したICチップ装着部を
、裏面に所望の配線網及びその保護膜を形成して基板■
どし、片面銅張積層板も同様に端子部には金メッキを施
した片面板n−i並びに更に端子部の周囲の配線網には
保護膜を形成した片面板Tl−2を作製した後、基板■
金メッキ部及び片面板n−1の端子部の周囲外周に端子
内輪から1鶴の位置に巾0.6籠の枠を多官能性シアン
酸エステル系レジスト(商品名; BT ?I 450
、三菱瓦斯化学■製)でスクリーン法で印刷し、150
℃で40分間加熱硬化させた。
On the other hand, polyfunctional cyanate ester glass cloth copper clad laminates (trade name, CCL Hl, 830, Mitsubishi Gas Chemical Co., Ltd. (11 Using a double-sided copper-clad laminate (manufactured by J.D. Co., Ltd.), a gold-plated IC chip mounting portion is formed on one side of the double-sided copper-clad laminate using a known method, and a desired wiring network and its protective film are formed on the back side to form a board.
Similarly, for the single-sided copper-clad laminate, a single-sided plate n-i with gold plating on the terminal part and a single-sided plate Tl-2 with a protective film formed on the wiring network around the terminal part were fabricated. Board■
A frame with a width of 0.6 is placed on the outer periphery of the gold-plated part and the terminal part of the single-sided plate n-1 at a position one crane from the inner ring of the terminal using polyfunctional cyanate ester resist (trade name: BT?I 450).
, manufactured by Mitsubishi Gas Chemical Co., Ltd.) using the screen method, 150
It was heat-cured at ℃ for 40 minutes.

次に、上記で得たシート■を前記で得た片面板■−1、
ll−2の裏面に重ねた後、それぞれのICチップ装着
部を所定の大きさに打抜きした。
Next, the sheet ■ obtained above was combined with the single-sided plate ■-1 obtained above,
After stacking on the back surface of ll-2, each IC chip mounting portion was punched out to a predetermined size.

基板■の金メツキICチップ装着部側面の上に、接着シ
ートIIと片面板■−1、接着シート■と片面板ll−
2を位置合わせして重ね、温度175℃、圧力 20k
g/cdで2時間積層成形し多層板を得た。
On the side of the gold-plated IC chip mounting part of the board ■, place the adhesive sheet II and the single-sided plate ■-1, the adhesive sheet ■ and the single-sided plate ll-
2 aligned and stacked, temperature 175℃, pressure 20k
Lamination molding was carried out for 2 hours at g/cd to obtain a multilayer board.

この多層板の所定のビン立て位置に孔を開け、ついで外
形を打抜き、スルーホールメッキを施すことなくビン立
てを行い3層のプラスチックPGAとした。孔開は時に
スミアの発生を観察したが、スミア発生は認められなか
った。
Holes were made in this multilayer board at predetermined bottle stand positions, and the outer shape was punched out to form a bottle stand without through-hole plating, resulting in a three-layer plastic PGA. Occasionally, smear formation was observed during hole opening, but no smear formation was observed.

このプラスチックPGAの内層の表面抵抗劣化を130
℃、2.8気圧のプレッシャークツカーテストで測定し
た結果、抵抗値が1011Ω以下になるまでの時間は3
62時間であった。
The surface resistance deterioration of the inner layer of this plastic PGA is 130
As a result of measuring with a pressure tester at ℃ and 2.8 atm, the time it takes for the resistance value to decrease to 1011Ω or less is 3.
It was 62 hours.

また、接着シートからの端子部側へのレジスト枠を超え
てのはみ出しは35−以下に止まるものであり(レジス
ト枠の無い場合は、21程度)、内層配線網間間隙につ
いて、切断したサンプルを顕微鏡観察した結果、全く認
めらず、更に、260°Cの半田浴に20秒フロートに
よっても層間剥離や膨れなどの不良の発生はなかった。
In addition, the protrusion from the adhesive sheet to the terminal side beyond the resist frame is limited to 35 or less (approximately 21 if there is no resist frame), and the cut sample was As a result of microscopic observation, no defects such as delamination or blistering were observed, and even when floated in a solder bath at 260° C. for 20 seconds, no defects such as delamination or blistering occurred.

〔発明の作用および効果〕[Operation and effects of the invention]

以上の発明の詳細な説明および実施例等から明らかなよ
うに、本発明のICチップ搭載用多層板の製法によれば
、層間接着用のシートとして配線網の導体間間隙を充分
に充填できる樹脂流れの大きい接着シートを使用しても
、樹脂流れによる端子部などの汚染が防止されるもので
あり、多層化積層成形時に生じる問題を解決できるもの
であり、新規な工業的製法として実用性の極めて大きい
ものである。
As is clear from the above detailed description of the invention and examples, the method for manufacturing a multilayer board for mounting an IC chip of the present invention uses a resin that can be used as a sheet for interlayer adhesion to sufficiently fill the gaps between conductors in a wiring network. Even if an adhesive sheet with a large flow is used, contamination of terminal parts etc. due to resin flow can be prevented, and problems that occur during multilayer lamination molding can be solved, making it a practical new industrial manufacturing method. It is extremely large.

更に、本発明の好ましい態様において使用する接着シー
トは銅のマイグレーション防止の効果が著しいものであ
り、実使用時の長期の信頼性にも優れたものとなるもの
である。
Further, the adhesive sheet used in a preferred embodiment of the present invention has a remarkable effect of preventing copper migration and has excellent long-term reliability during actual use.

Claims (1)

【特許請求の範囲】 1 少なくともICチップ搭載用の穴及び接続用の端子
部を有する多層板の製造法において、内層を形成するプ
リント配線板として、ICチップ接続用の端子部の外周
周囲に、予め光若しくは熱硬化型のレジストを用いて細
い枠を作製した多層化用のプリント配線板を使用し、こ
れを所定位置に所定の大きさの孔を形成した低流動性接
着シートを用いて多層化積層成形することを特徴とする
ICチップ搭載用多層板の製造法。 2 該低流動性接着シートが、(a)多官能性シアン酸
エステル樹脂組成物、(b)実質的に非結晶性の熱可塑
性飽和ポリエステル樹脂及び(c)硬化触媒を必須成分
とする熱硬化性樹脂組成物のシート若しくはフィルム又
は該熱硬化性樹脂組成物を補強基材に含浸・乾燥してB
−stage化してなるものである特許請求の範囲第1
項記載のICチップ搭載用多層板の製造法。 3 多層化積層成形を100mmHg以下の減圧状態で
行う特許請求の範囲第1項または2項記載のICチップ
搭載用多層板の製造法。
[Claims] 1. In a method for manufacturing a multilayer board having at least a hole for mounting an IC chip and a terminal part for connection, as a printed wiring board forming an inner layer, around the outer periphery of the terminal part for connecting the IC chip, A printed wiring board for multilayering is used, in which a thin frame is made in advance using photo- or thermosetting resist, and this is multilayered using a low-flow adhesive sheet with holes of a predetermined size formed at predetermined positions. A method for manufacturing a multilayer board for mounting an IC chip, which is characterized by lamination molding. 2. The low-fluidity adhesive sheet is a thermosetting adhesive sheet containing (a) a polyfunctional cyanate ester resin composition, (b) a substantially non-crystalline thermoplastic saturated polyester resin, and (c) a curing catalyst as essential components. A sheet or film of the thermosetting resin composition or the thermosetting resin composition is impregnated into a reinforcing base material and dried.
-Claim 1, which is obtained by converting it into a stage.
A method for manufacturing a multilayer board for mounting an IC chip as described in . 3. A method for manufacturing a multilayer board for mounting an IC chip according to claim 1 or 2, wherein the multilayer lamination molding is carried out under a reduced pressure of 100 mmHg or less.
JP61226115A 1986-09-26 1986-09-26 Method for manufacturing multi-layer board for mounting IC chip Expired - Lifetime JPH0722224B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61226115A JPH0722224B2 (en) 1986-09-26 1986-09-26 Method for manufacturing multi-layer board for mounting IC chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61226115A JPH0722224B2 (en) 1986-09-26 1986-09-26 Method for manufacturing multi-layer board for mounting IC chip

Publications (2)

Publication Number Publication Date
JPS6381998A true JPS6381998A (en) 1988-04-12
JPH0722224B2 JPH0722224B2 (en) 1995-03-08

Family

ID=16840068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61226115A Expired - Lifetime JPH0722224B2 (en) 1986-09-26 1986-09-26 Method for manufacturing multi-layer board for mounting IC chip

Country Status (1)

Country Link
JP (1) JPH0722224B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0339878U (en) * 1989-08-29 1991-04-17
JP2008014100A (en) * 2006-07-10 2008-01-24 Japan Life Kk Track member made of concrete slab

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0339878U (en) * 1989-08-29 1991-04-17
JP2008014100A (en) * 2006-07-10 2008-01-24 Japan Life Kk Track member made of concrete slab

Also Published As

Publication number Publication date
JPH0722224B2 (en) 1995-03-08

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