JPS637983A - Card type electronic circuit unit - Google Patents

Card type electronic circuit unit

Info

Publication number
JPS637983A
JPS637983A JP61153233A JP15323386A JPS637983A JP S637983 A JPS637983 A JP S637983A JP 61153233 A JP61153233 A JP 61153233A JP 15323386 A JP15323386 A JP 15323386A JP S637983 A JPS637983 A JP S637983A
Authority
JP
Japan
Prior art keywords
conductor pattern
electronic circuit
circuit unit
type electronic
battery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61153233A
Other languages
Japanese (ja)
Inventor
義孝 福岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61153233A priority Critical patent/JPS637983A/en
Publication of JPS637983A publication Critical patent/JPS637983A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Credit Cards Or The Like (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 ［発明の目的１ （産業上の利用分野） 本発明は、ＩＣチップのような各種の回路素子が高密度
に実装されたバッテリーバックアップタイプのカード型
電子回路ユニットに関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention 1 (Industrial Application Field) The present invention relates to a battery backup type card-type electronic circuit unit in which various circuit elements such as IC chips are densely mounted.

（従来の技術） 従来からカードサイズの薄型電子回路ユニットとして、
配線板上にフラットパッケージタイプのＩＣや裸のＩＣ
チップをそのまま実装したものを、表裏両面から絶縁性
カバーで覆い、ざらにその両面に薄い金属板を重ね合わ
せた構造のものが使用されている。(Conventional technology) Conventionally, as a card-sized thin electronic circuit unit,
Flat package type IC or bare IC on the wiring board
The structure used is that the chip is mounted as is, covered with an insulating cover from both the front and back, and thin metal plates are roughly overlapped on both sides.

そして、ＩＣチップとして０ＭＯ３のような消費電力の
低いメモリチップを実装したカード型電子回路ユニット
としては、配線板に貫通孔を９２け、その中にコイン型
の電池を実装してバッテリーバックアップした構造のも
のが知られている。A card-type electronic circuit unit that has a memory chip with low power consumption such as 0MO3 installed as an IC chip has a structure in which 92 through holes are made in the wiring board and a coin-shaped battery is mounted in the hole for battery backup. are known.

（発明が解決しようとする問題点） しかしながらこのようなバッテリーバックアップタイプ
のカード型電子回路ユニットにおいては、厚さ方向の回
路素子の実装可能な領域が少ないばかりでなく、コイン
型電池の厚さが約１．１３ｍとかなり厚いため、全体の
厚さが厚くなってしまうという欠点があった。(Problems to be Solved by the Invention) However, in such a battery backup type card type electronic circuit unit, not only is there a small area where circuit elements can be mounted in the thickness direction, but also the thickness of the coin type battery is large. Since it was quite thick at about 1.13 m, it had the disadvantage of increasing the overall thickness.

また、配線板上で電池の実装部分にはＩＣチップをはじ
めとする回路素子を搭載することができず、水平方向の
実装可能な領域が少ないため、実装密度が低いという問
題があった。Furthermore, circuit elements such as IC chips cannot be mounted on the part where the battery is mounted on the wiring board, and there is a problem that the packaging density is low because there is only a small horizontal mounting area.

特に回路素子としてメモリチップを実装してなるメモリ
カードにおいては、メモリ容叩を増大させることが難し
かった。Particularly in a memory card in which a memory chip is mounted as a circuit element, it has been difficult to increase the memory capacity.

本発明はこれらの問題を解決するためになされたもので
、薄型で実装密度が高く、しかも信頼性の高いバッテリ
ーバックアップされたカード型電子回路ユニットを提供
することを目的とする。The present invention has been made to solve these problems, and an object of the present invention is to provide a battery-backed card-type electronic circuit unit that is thin, has a high packaging density, and is highly reliable.

［発明の構成］ （問題点を解決するための手段） すなわら本発明のカード型電子回路ユニットは、各種回
路素子を埋設した板状の配線基体の片面の周辺部にグラ
ンド電位の導体パターンを形成し、このグランド電位の
導体パターンの内側のほぼ全域に電源電位の導体パター
ンを形成するとともに、この電源電位の導体パターン上
に、ペーパー電池と異方性導電ゴムシートとを重ねてこ
のペーパー電池の正電極が電気的に接触するように載せ
、さらにこのペーパー電池と異方性導電ゴムシート上に
、内面が前記ペーパー電池の負電極に電気的に接触し、
かつその周縁部が前記グランド電位の導体パターンと接
触するようにして金属製キャップを被覆し気密に封止し
て成ることを特徴としている。[Structure of the Invention] (Means for Solving the Problems) In other words, the card-type electronic circuit unit of the present invention has a ground potential conductor pattern on the periphery of one side of a plate-shaped wiring base in which various circuit elements are embedded. A conductor pattern with a power supply potential is formed on almost the entire inside of the conductor pattern with a ground potential, and a paper battery and an anisotropic conductive rubber sheet are overlaid on the conductor pattern with a power supply potential. Place the battery so that the positive electrode is in electrical contact with the paper battery, and further place the paper battery on the anisotropic conductive rubber sheet so that the inner surface is in electrical contact with the negative electrode of the paper battery,
It is characterized in that it is covered with a metal cap and hermetically sealed so that its peripheral edge is in contact with the conductor pattern at the ground potential.

（作　用） 本発明のカード型電子回路ユニットにおいては、ペーパ
ー電池が配線基体と金属製キマＩツブとの間に介挿され
ており、その正負両電極が配線基体上に形成された電源
電位の導体パターンとグランド電位の導体パターンとに
直接あるいは間接的にそれぞれ電気的に接続されて回路
素子がバッテリーバックアップされており、しかも電池
の搭載により実装可能な水平方向の領域が減少すること
がない。(Function) In the card-type electronic circuit unit of the present invention, a paper battery is inserted between the wiring base and the metal lug, and its positive and negative electrodes are connected to the power supply potential formed on the wiring base. The circuit elements are electrically connected directly or indirectly to the conductor pattern at the ground potential and the conductor pattern at ground potential, and the circuit elements are backed up by a battery, and the horizontal area that can be mounted does not decrease due to the installation of the battery. .

また、ペーパー電池と共に異方性導電ゴムシートが重ね
て介挿されているので、このシートがクッションとして
の機能を果たし、外部からの１７撃が緩和されペーパ、
−電池のずれや破損が防止されるばかりでなく、電池電
極の対応する導体パターンへの接続がより完全になされ
る。In addition, since an anisotropic conductive rubber sheet is stacked and inserted with the paper battery, this sheet functions as a cushion, mitigating the impact from the outside, and the paper battery.
- Not only is displacement and damage of the battery prevented, but also the connection of the battery electrodes to the corresponding conductor pattern is made more complete.

ざらに、板状の配線基体内に各種の回路素子が埋設され
ているので、厚さ方向の実装密度の高いカード型電子回
路ユニットを得ることができる。In general, since various circuit elements are embedded within the plate-shaped wiring base, it is possible to obtain a card-type electronic circuit unit with high packaging density in the thickness direction.

またさらに、配線基体の上に金属製キャップが被覆され
ているので、搭載された回路素子が外界の電気的影響か
ら保護されている。Furthermore, since the wiring base is covered with a metal cap, the mounted circuit elements are protected from external electrical influences.

（実施例） 以下、本発明を図面に示す実施例について説明する。(Example) Embodiments of the present invention shown in the drawings will be described below.

第１図は本発明のカード型電子回路ユニットの一実施例
を示す断面図、第２図および第３図はそれぞれその表側
および裏側から見た斜視図、第４図は実施例の配＄２基
体を構成する配線板の拡大斜視図である。FIG. 1 is a cross-sectional view showing an embodiment of the card-type electronic circuit unit of the present invention, FIGS. 2 and 3 are perspective views of the card-type electronic circuit unit as seen from the front side and the back side, respectively, and FIG. 4 is a layout diagram of the embodiment. FIG. 2 is an enlarged perspective view of a wiring board that constitutes a base.

これらの図において、符号１はセラミックのような絶縁
基材をベースとする配線板を示し、その表面にはＩＣチ
ップのような能動素子を搭載するための複数の段付き非
貫通孔２が形成されており、この段付き非貫通孔２の底
部および段部には、それぞれダイポンディングパッド３
およびワイヤポンディングパッド４が形成されている。In these figures, reference numeral 1 indicates a wiring board based on an insulating base material such as ceramic, and a plurality of stepped non-through holes 2 are formed on the surface of the board for mounting active elements such as IC chips. A die-ponding pad 3 is provided at the bottom and step of the stepped non-through hole 2, respectively.
and a wire bonding pad 4 are formed.

また裏面には、外部装置と接続するための入出力端子の
取付用導体パッド５が形成されている。Furthermore, conductor pads 5 for attaching input/output terminals for connection to external devices are formed on the back surface.

ざらにこのような配線板１の表面の周辺部には、リング
状の導体パターン６が形成され、このリング状導体パタ
ーン６の内側の段付き非貫通孔２を除いた表面のほぼ全
域には、ベタ導体パターン７が形成されている。そして
これらリング状導体パターン６およびベタ導体パターン
７は、それぞれグランド電位および電源電位に保持され
ている。Roughly, a ring-shaped conductor pattern 6 is formed around the surface of such a wiring board 1, and a ring-shaped conductor pattern 6 is formed on almost the entire surface except for the stepped non-through hole 2 inside the ring-shaped conductor pattern 6. , a solid conductor pattern 7 is formed. The ring-shaped conductor pattern 6 and the solid conductor pattern 7 are held at a ground potential and a power supply potential, respectively.

このような配線板１の段付き非貫通孔２のダイポンディ
ングパッド３上には、それぞれ能動素子８が１個ずつ導
電性接着剤で接着されており、これらの能動素子８とワ
イヤポンディングパッド４とはＡｕ線のようなボンディ
ングワイヤって接続されている。On each die bonding pad 3 of the stepped non-through hole 2 of the wiring board 1, one active element 8 is bonded with a conductive adhesive, and these active elements 8 and the wire bonding pad 4 is connected with a bonding wire such as an Au wire.

このような構造を有する配線基体１０上には、コバール
やＦｅ／Ｎｉ４２アａイのような配線板１を構成するセ
ラミックと熱膨張係数がほぼ等しい金属からなるキレツ
ブ１１がかぶせられている。The wiring substrate 10 having such a structure is covered with a crack 11 made of a metal such as Kovar or Fe/Ni42A, which has a coefficient of thermal expansion substantially equal to that of the ceramic constituting the wiring board 1.

この金属製キャップ１１は、ハンダ等の導電性溶着剤１
２により周端部がリング状導体パターン６に固着されて
おり、この内部は気密に封止されている。This metal cap 11 is made of a conductive adhesive 1 such as solder.
2, the peripheral end portion is fixed to the ring-shaped conductor pattern 6, and the inside thereof is hermetically sealed.

さらにこの金属製キャップ１１と配線基体１０との間に
は、リチウムペーパー電池のような非常に薄い（厚さが
０．５＃程度）ベニバー電池１３と異方性導電ゴムシー
ト１４とが異方性導電ゴムシート１４を内側にして重ね
て介挿されている。そして、このペーパー電池１３の上
面（負極側）と異方性導電ゴムシート ップ１１の内周面と配線板１表面にそれぞれ隙間なく密
接されている。こうして、ペーパー電池１３の一側電極
は、金属製キャップ１１を介して配線板１上のグランド
電位のリング状導体パターン６に電気的に接続されてお
り、＋側電極は異方性導電ゴムシート１４を介して電源
電位のベタ導体パターン７に接続されている。このよう
に構成された実施例のカード型電子回路ユニットにおい
ては、金属製キャップ１１と配線基体１０との間に極め
て薄いペーパー電池１３が異方性導電ゴムシート１４と
ともに介挿されているので全体の厚さがほとんど増大す
ることなくしかも実装された能動素子８がバッテリーバ
ックアップされる。Furthermore, between this metal cap 11 and the wiring base 10, a very thin (about 0.5# thick) Venivar battery 13 such as a lithium paper battery and an anisotropic conductive rubber sheet 14 are disposed. The conductive rubber sheets 14 are stacked and inserted with the conductive rubber sheets 14 facing inside. The upper surface (negative electrode side) of this paper battery 13, the inner circumferential surface of the anisotropic conductive rubber sheet top 11, and the surface of the wiring board 1 are in close contact with each other without any gaps. In this way, one side electrode of the paper battery 13 is electrically connected to the ring-shaped conductor pattern 6 at ground potential on the wiring board 1 via the metal cap 11, and the + side electrode is an anisotropic conductive rubber sheet. It is connected to the solid conductor pattern 7 at the power supply potential via the line 14 . In the card type electronic circuit unit of the embodiment configured as described above, the extremely thin paper battery 13 is inserted between the metal cap 11 and the wiring base 10 together with the anisotropic conductive rubber sheet 14, so that the overall The mounted active element 8 can be backed up by a battery without substantially increasing the thickness of the active element 8.

また、異方性導電ゴムシート１４が外部からの機械的衝
撃を緩和する働きをするので、ペーパー電池１３がＸ方
向ヤＹ方向に動くことがなく、電極の接触不良が生じる
ことがない。Further, since the anisotropic conductive rubber sheet 14 functions to alleviate external mechanical shock, the paper battery 13 does not move in the X direction or the Y direction, and poor contact between the electrodes does not occur.

ざらにこのようなペーパー電池１３の搭載により、能動
素子８の実装可能な水平方向の領域が減少することがな
く、高密度に実装することができる。またざらに、能動
素子８が配線板１内部に埋め込まれた状態で搭載されて
いるので、配線板１の厚さ方向の実装可能な領域も最大
限に利用され非常に実装密度が高いものとなる。By mounting the paper batteries 13 in this manner, the horizontal area in which the active elements 8 can be mounted does not decrease, and the active elements 8 can be mounted at high density. Furthermore, since the active element 8 is mounted embedded inside the wiring board 1, the mounting area in the thickness direction of the wiring board 1 is utilized to the maximum, resulting in extremely high packaging density. Become.

尚、以上の実施例においては、異方性導電ゴムシート１
４をペーパー電池１３の内側（下側）に重ね、配線基体
１０との間に挟み込んだ例について記載したが本発明は
このような構造に限定されない。In addition, in the above embodiment, the anisotropic conductive rubber sheet 1
4 is stacked on the inside (lower side) of the paper battery 13 and sandwiched between it and the wiring base 10, but the present invention is not limited to such a structure.

すなわら第５図に示すように、異方性導電ゴムシート１
４をペーパー電池１３と金属製キレツブ１１との間に挟
挿し、ペーパー電池１３の上面の一側電極を異方性導電
ゴムシート１４と金属製キャップ１１を介してグランド
電位のリング状導体パターン６に接続するとともに、＋
側電極を電源電位のベタ導体パターン７に直接接触させ
た構造としてもよい。That is, as shown in FIG. 5, an anisotropic conductive rubber sheet 1
4 is inserted between the paper battery 13 and the metal cap 11, and one side electrode of the upper surface of the paper battery 13 is connected to the ring-shaped conductor pattern 6 at ground potential via the anisotropic conductive rubber sheet 14 and the metal cap 11. +
A structure may be adopted in which the side electrodes are brought into direct contact with the solid conductor pattern 7 at the power supply potential.

また、外部装置と接続するための入出力端子の取付用導
体バッド５は、配線板１の裏面ではなく、金属製キレツ
ブ１１より外側の配線板１表面に設けることもできる。Furthermore, the conductor pads 5 for attaching input/output terminals for connection to external devices may be provided on the surface of the wiring board 1 outside the metal break 11 instead of on the back surface of the wiring board 1.

［発明の効果］ 以上の説明から明らかなように、本発明のカード型電子
回路ユニットにおいては、厚さを増大させることなく電
池を搭載することができ、ＩＣチップをはじめとする回
路素子を高密度に実装スることができる。[Effects of the Invention] As is clear from the above description, in the card-type electronic circuit unit of the present invention, a battery can be mounted without increasing the thickness, and circuit elements such as IC chips can be mounted with high efficiency. Can be mounted in high density.

また、機械的衝撃を受けても搭載された電池が動いたり
接触不良を起こしたりすることがなく、信頼性の高い・
しのである。In addition, the installed battery does not move or cause poor contact even when subjected to mechanical shock, making it highly reliable.
It's Shino.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明のカード型電子回路ユニットの一実施例
を示す断面図、第２図はそれを表側から見た斜視図、第
３図は同じく裏側から見た斜視図、第４図は実施例の配
線基体を構成する配線板の拡大斜視図、第５図は別の実
施例を示す断面図である。 １・・・配線板 ２・・・段付き非貫通孔 ５・・・入出力端子取付用導体パッド ６・・・リング状導体パターン ７・・・ベタ導体パターン ８・・・能動素子 １１・・・金属製キャップ １３・・・ペーパー電池 １４・・・異方性導電ゴムシート 出願人　　　　　　株式会社　東芝 代理人　　弁理士　須　山　　佐　− 第１図 ］ 第２図 第３図FIG. 1 is a cross-sectional view showing one embodiment of the card-type electronic circuit unit of the present invention, FIG. 2 is a perspective view of the same as seen from the front side, FIG. 3 is a perspective view of the card-type electronic circuit unit as seen from the back side, and FIG. FIG. 5 is an enlarged perspective view of a wiring board constituting the wiring base of the embodiment, and a sectional view showing another embodiment. 1... Wiring board 2... Stepped non-through hole 5... Conductor pad for attaching input/output terminals 6... Ring-shaped conductor pattern 7... Solid conductor pattern 8... Active element 11...・Metal cap 13...Paper battery 14...Anisotropic conductive rubber sheet Applicant: Toshiba Corporation Patent attorney Satoshi Suyama - Figure 1] Figure 2 Figure 3

Claims (2)

【特許請求の範囲】[Claims] （１）各種回路素子を埋設した板状の配線基体の片面の
周辺部にグランド電位の導体パターンを形成し、このグ
ランド電位の導体パターンの内側のほぼ全域に電源電位
の導体パターンを形成するとともに、この電源電位の導
体パターン上に、ペーパー電池と異方性導電ゴムシート
とを重ねてこのペーパー電池の正電極が電気的に接触す
るように載せ、さらにこのペーパー電池と異方性導電ゴ
ムシート上に、内面が前記ペーパー電池の負電極に電気
的に接触し、かつその周縁部が前記グランド電位の導体
パターンと接触するようにして金属製キャップを被覆し
気密に封止して成ることを特徴とするカード型電子回路
ユニット。(1) A conductor pattern with a ground potential is formed on the periphery of one side of a plate-shaped wiring base in which various circuit elements are embedded, and a conductor pattern with a power supply potential is formed over almost the entire inside of this conductor pattern with a ground potential. , a paper battery and an anisotropic conductive rubber sheet are placed on top of the conductor pattern at the power supply potential so that the positive electrode of the paper battery is in electrical contact with the paper battery, and the paper battery and the anisotropic conductive rubber sheet are The metal cap is covered and hermetically sealed so that the inner surface is in electrical contact with the negative electrode of the paper battery and the peripheral edge is in contact with the conductor pattern at the ground potential. Characteristic card-type electronic circuit unit. （２）配線基体が、能動素子を搭載するための段付き非
貫通孔または受動素子を搭載するための段なし非貫通孔
を有し、これらの各非貫通孔内に能動素子または受動素
子が搭載されている特許請求の範囲第１項記載のカード
型電子回路ユニット。(2) The wiring base has a stepped non-through hole for mounting an active element or a stepless non-through hole for mounting a passive element, and the active element or passive element is inside each of these non-through holes. A card-type electronic circuit unit according to claim 1 mounted therein.
JP61153233A 1986-06-30 1986-06-30 Card type electronic circuit unit Pending JPS637983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61153233A JPS637983A (en) 1986-06-30 1986-06-30 Card type electronic circuit unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61153233A JPS637983A (en) 1986-06-30 1986-06-30 Card type electronic circuit unit

Publications (1)

Publication Number Publication Date
JPS637983A true JPS637983A (en) 1988-01-13

Family

ID=15557964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61153233A Pending JPS637983A (en) 1986-06-30 1986-06-30 Card type electronic circuit unit

Country Status (1)

Country Link
JP (1) JPS637983A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0520164U (en) * 1991-08-24 1993-03-12 ソニーケミカル株式会社 Thin electronic devices
WO1996016444A1 (en) * 1994-11-21 1996-05-30 Iwaki Electronics Co., Ltd. Integrated circuit device
JP2005354661A (en) * 2004-05-11 2005-12-22 Nec Corp Electronic circuit protection structure for non-contact communication apparatus, method and folding portable telephone set

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0520164U (en) * 1991-08-24 1993-03-12 ソニーケミカル株式会社 Thin electronic devices
WO1996016444A1 (en) * 1994-11-21 1996-05-30 Iwaki Electronics Co., Ltd. Integrated circuit device
JP2005354661A (en) * 2004-05-11 2005-12-22 Nec Corp Electronic circuit protection structure for non-contact communication apparatus, method and folding portable telephone set
JP4605504B2 (en) * 2004-05-11 2011-01-05 日本電気株式会社 Electronic circuit protection structure and method for non-contact communication device and folding cellular phone

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