JPS6377132A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6377132A
JPS6377132A JP22305486A JP22305486A JPS6377132A JP S6377132 A JPS6377132 A JP S6377132A JP 22305486 A JP22305486 A JP 22305486A JP 22305486 A JP22305486 A JP 22305486A JP S6377132 A JPS6377132 A JP S6377132A
Authority
JP
Japan
Prior art keywords
pattern
cross
sectional observation
section
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22305486A
Other languages
Japanese (ja)
Inventor
Ichiro Nakao
中尾 一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP22305486A priority Critical patent/JPS6377132A/en
Publication of JPS6377132A publication Critical patent/JPS6377132A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To observe a sectional pattern along a cleaving direction by providing a section observing pattern on a linear line of a direction <110> in a semiconductor wafer made of a pattern array which is directed on its plane direction <100> with the surface disposed in a plane (100). CONSTITUTION:When a plurality of semiconductor chips 1 disposed at its surface in a plane (100) are laterally and longitudinally arrayed in a direction <100> with scribing lines 3, a plurality of section observing patterns 1 are provided on the lines 3 along a cleaving direction <110> formed at 45 deg. from the direction <100>. Thus, when the cleaved surface of the pattern 1 is observed, the cleaving surface of each chip 2 can be presumed. When the actual etching pattern 4, an edge identifying mask pattern 5, an original observing surface 6, an erroneous observing surface 7 at the edge, the section 8 of the surface 6 and the section 9 of the surface 7 are examined, whether the cleaving surface of the pattern 1 is correct or not can be determined.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、断面観察の必要な構造を有する半導体装置の
製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a structure that requires cross-sectional observation.

従来の技術 近年開発される半導体装置の構造においては、その断面
構造を見る必要が増えている。特に近年開発中のダイナ
ミックRAMにおいては、そのトレンチ構造の断面をモ
ニターする必要がある。また、断面観察パターンを半導
体ウェハ全域に設ける事は、チップ面積の有効利用上得
策ではない。
2. Description of the Related Art In the structures of semiconductor devices developed in recent years, there is an increasing need to look at their cross-sectional structures. Particularly in dynamic RAMs that have been developed in recent years, it is necessary to monitor the cross section of the trench structure. Furthermore, providing a cross-sectional observation pattern over the entire semiconductor wafer is not a good idea in terms of effective use of the chip area.

そこで、通常の断面観察パターンは、チップの一部に形
成され、断面観察の際には、断面観察パターンを横切る
ようにへき開する事により、その断面観察パターンの断
面を観察する。
Therefore, a normal cross-sectional observation pattern is formed on a part of the chip, and when performing cross-sectional observation, the cross-sectional observation pattern is cleaved across the cross-sectional observation pattern to observe the cross-section of the cross-sectional observation pattern.

発明が解決しようとする問題点 しかるに、へき開は不安定なプロセスであるため、断面
観察パターンをいつも横切れるとはかぎらない。特に、
へき開面が、断面観察パターンのエツジに来た場合、そ
のエツジ付近は、本来観察すべき断面観察パターンと違
って、誤まった情報をもたらす。
Problems to be Solved by the Invention However, since cleavage is an unstable process, it is not always possible to traverse the cross-sectional observation pattern. especially,
When the cleavage plane comes to the edge of the cross-sectional observation pattern, the area around the edge is different from the cross-sectional observation pattern that should be observed and gives erroneous information.

したがって、へき開して断面観察パターンを観察する場
合、エツジ付近の断面観察は避けねばならない。しかし
、断面観察をしている場合、その断面が、断面観察パタ
ーンのエツジかそうでないかは判断がつかない。
Therefore, when cleaving and observing a cross-sectional observation pattern, cross-sectional observation near the edges must be avoided. However, when observing a cross section, it is difficult to determine whether the cross section is an edge of the cross-sectional observation pattern or not.

また、く110〉方向のパターン配列からなる半導体ウ
ェハにおいては、(110)方向にへき開されるだめ(
通常使用される半導体ウェハは、ダイヤモンド結晶構造
か、閃亜鉛鉱形構造であシ、これらの構造では通常<1
10>方向にへき開されやすい。)、く110〉方向に
へき開すれば、そのへき開面に並ぶ各チップの断面観察
パターンをすべて観察できる。しかし、近年、く100
〉方向のパターン配列からなる半導体が増えている。
In addition, in a semiconductor wafer consisting of a pattern array in the (110) direction, it is difficult to cleave in the (110) direction.
Semiconductor wafers commonly used have either a diamond crystal structure or a zincblende structure, and these structures typically have <1
It is likely to be cleaved in the 10> direction. ), 110> directions, all cross-sectional observation patterns of each chip lined up on the cleavage plane can be observed. However, in recent years, 100
Semiconductors with pattern arrays in the > direction are increasing.

したがって、この場合の断面観察も必要となってきた。Therefore, cross-sectional observation in this case has also become necessary.

この場合(100〉方向はへき開しやすい方向でないた
め、無理に(11o)面を出すためには、ウェハを薄く
して、へき開しやすくするか、または、断面をラッピン
グにより出すか等の、複雑な工程を経なければならない
。そこで、断面観察をする簡易な方法として、(110
)方向に断面観察パターンをへき開して、観察後、角度
補正をする事によって断面評価を行なうものがある。
In this case, the (100> direction is not an easy direction to cleave, so in order to forcibly expose the (11o) plane, it is necessary to make the wafer thinner to make it easier to cleave it, or to expose the cross section by lapping. Therefore, as a simple method for cross-sectional observation, (110
) direction, and after observation, cross-sectional evaluation is performed by correcting the angle.

しかし、この場合、パターンは(100)方向に配列さ
れ、へき開は<110>方向にされるため、各チップに
存在する断面観察パターンを連続してへき開面を横切さ
せる事はできない。
However, in this case, the patterns are arranged in the (100) direction and the cleavage is made in the <110> direction, so the cross-sectional observation patterns present on each chip cannot be made to continuously cross the cleavage plane.

本発明は、断面観察パターンのエツジ部を誤まって観察
する事を防ぎ、また、〈100〉方向に配列されたパタ
ーンの各チップの断面観察バター/を断面方向に沿って
すべて見る事を目的とするものである。
The purpose of the present invention is to prevent the edges of a cross-sectional observation pattern from being erroneously observed, and to view all the cross-sectional observation butter/of each chip of the pattern arranged in the <100> direction along the cross-sectional direction. That is.

問題点を解決するだめの手段 表面が(100)面を有し、く100〉方向のパターン
配列からなる半導体ウェハにおいて、(110)方向の
直線上に断面観察パターンを設ける事によって、へき開
方向に沿って各断面観察パターンを観察できるようにす
るものである。
Means for Solving the Problem In a semiconductor wafer whose surface has a (100) plane and consists of a pattern array in the 100> direction, by providing a cross-sectional observation pattern on a straight line in the (110) direction, it is possible to This allows each cross-sectional observation pattern to be observed along the line.

また、断面観察パターンの必要な半導体ウェハにおいて
、断面観察パターンのエツジから、前記断面観察パター
ンと反対方向に前記断面観察パターンと異なるライン上
にエツジ識別パターンを設ける事により本来と異なる情
報をもたらすエツジ部の誤まった観察評価を防ぐもので
ある。
Furthermore, in semiconductor wafers that require a cross-sectional observation pattern, by providing an edge identification pattern in a direction opposite to the cross-sectional observation pattern from the edge of the cross-sectional observation pattern on a line different from the cross-sectional observation pattern, edge identification patterns can be used to provide information different from the original information. This is to prevent incorrect observation and evaluation by the department.

作   用 表面が(100)面を有し、<100>方向のパターン
配列を有する半導体ウェハにおいても、へき開するく1
10〉方向の直線上に各チップの断面観察パターンを並
べる事により、各チップの断面観察をできるようにする
Even in a semiconductor wafer whose working surface has a (100) plane and a pattern arrangement in the <100> direction, it is difficult to cleave the wafer.
By arranging the cross-sectional observation patterns of each chip on a straight line in the 10> direction, it is possible to observe the cross-section of each chip.

また、断面観察パターンのエツジからその反対方向にエ
ツジ識別パターンを設ける。これによυ、断面観察時に
エツジ部にへき開断面が来た時には、反対方向に存在す
るエツジ識別パターンが現われ、へき開がエツジ部に来
た事を表わす。このようにして、エツジ部の誤まった情
報を見分ける事ができる。
Further, an edge identification pattern is provided in the opposite direction from the edge of the cross-sectional observation pattern. As a result, when the cleaved cross section comes to the edge part during cross-sectional observation, an edge identification pattern existing in the opposite direction appears, indicating that the cleavage has come to the edge part. In this way, erroneous information at the edges can be identified.

実施例 第1図に第1の実施例を示す。Example FIG. 1 shows a first embodiment.

1は断面観察用パターン、2はチップ、3はスクライブ
ラインである。本実施例では、表面が(10Q)面を有
し、〈100〉方向に、チップ2が配列されている場合
を示す。ここでは、断面観察用パターン1をスクライプ
ライン3上に形成している。へき開方向であるく110
〉方向の直線上に断面観察用パターン1を並べる。この
ようにする事により、1つのへき開面により各断面観察
用パターン1が観察できる。なお、断面観察用パターン
は一列だけにかぎるものではない。
1 is a cross-sectional observation pattern, 2 is a chip, and 3 is a scribe line. In this embodiment, a case is shown in which the front surface has a (10Q) plane and the chips 2 are arranged in the <100> direction. Here, the cross-sectional observation pattern 1 is formed on the scribe line 3. 110 in the cleavage direction
The cross-sectional observation patterns 1 are arranged on a straight line in the > direction. By doing this, each cross-sectional observation pattern 1 can be observed using one cleavage plane. Note that the cross-sectional observation pattern is not limited to one row.

第2図、第3図に第2の実施例を示す。A second embodiment is shown in FIGS. 2 and 3.

4は実除のエツチングパターンSはエツジ識別用マスク
パターン、6は本来の観察面、7はエツジでの誤まった
観察面、8は観察面6の断面、9は観察面7の断面であ
る。
4 is the actual etching pattern S is a mask pattern for edge identification, 6 is the original observation surface, 7 is the erroneous observation surface at the edge, 8 is the cross section of the observation surface 6, and 9 is the cross section of the observation surface 7. .

断面観察を行なう場合、誤まって断面観察用パターン1
のエツジでへき開した場合、その断面形状が、本来の正
しい形なのかどうかの判別ができない。しかし、エツジ
識別用マスクパターンSを、断面観察用パターン1と反
対方向でかつ異なるうイン状に幅の異なったものを形成
すればこの問題を解決できる。
When performing cross-sectional observation, you may mistakenly use pattern 1 for cross-sectional observation.
When cleaved at the edge, it is impossible to determine whether the cross-sectional shape is the original correct shape or not. However, this problem can be solved by forming the edge identification mask pattern S in a direction opposite to that of the cross-sectional observation pattern 1 and in a different ridge shape with a different width.

このようにすれば、誤まってエツジをへき開した場合は
、1Qのように断面観察用パターン1と、エツジ識別用
マスクパターン5の断面が現われる。
In this way, if an edge is cleaved by mistake, the cross section of the cross section observation pattern 1 and the edge identification mask pattern 5 will appear as shown in 1Q.

また、エツジ識別用マスクパターン5をへき開した場合
は、断面観察用パターン1と異なる幅の断面が現われ、
本来の断面観察用パターン1と識別できる。このように
、本来の断面パターンは9の場合にしか現われず、識別
が容易にできる。
Furthermore, when the edge identification mask pattern 5 is cleaved, a cross section with a width different from that of the cross-sectional observation pattern 1 appears,
It can be distinguished from the original pattern 1 for cross-sectional observation. In this way, the original cross-sectional pattern appears only in case 9 and can be easily identified.

第4図に第3の実施例を示す。FIG. 4 shows a third embodiment.

く100〉方向にチップが配列されており、く110〉
方向にへき開する場合を示す。
The chips are arranged in the ku100〉 direction, and the ku110〉
The case of cleavage in the direction is shown.

これは先の第1の実施例と第2の実施例を組み合わせた
ものである。
This is a combination of the first and second embodiments.

発明の効果 以上のように本発明によれば表面が(1oO)面を有し
、(100)方向のパターン配列からなる半導体ウェハ
において、〈110〉方向の直線上に断面観察パターン
を設ける事によってへき開方向に沿って各断面観察パタ
ーンを観察できる。
Effects of the Invention As described above, according to the present invention, in a semiconductor wafer having a (1oO) surface and a pattern array in the (100) direction, by providing a cross-sectional observation pattern on a straight line in the <110> direction, Each cross-sectional observation pattern can be observed along the cleavage direction.

また、断面観察パターンの必要な半導体ウェハにおいて
、断面観察パターンのエツジから、その反対方向に、か
つ異なるライン上にエツジ識別パターンを設ける事によ
り、本来と異なる情報をもたらす、エツジ部の誤まった
観察評価を防ぐものである。
In addition, for semiconductor wafers that require a cross-sectional observation pattern, by providing an edge identification pattern in the opposite direction and on a different line from the edge of the cross-sectional observation pattern, it is possible to avoid incorrect edges at the edge, which may give information different from the original. This prevents observational evaluation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例方法における半導体基板
の一部概略平面図、第2図は同第2の実施例における半
導体基板の部分平面図、第3図は第2図の基板の断面図
、第4図は同第3の実施例における半導体基板の一部概
略平面図である。 1・・・・・・断面観察用パターン、2・・・・・・チ
ップ、3・・・・・・スクライプライン。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 f−−一朝°社苓」ぎ用パターン 2−チ、7・ 3−゛スグライデラうン 第3図
FIG. 1 is a partial schematic plan view of a semiconductor substrate in the first embodiment method of the present invention, FIG. 2 is a partial plan view of the semiconductor substrate in the second embodiment, and FIG. 3 is the substrate of FIG. 2. FIG. 4 is a partial schematic plan view of a semiconductor substrate in the third embodiment. 1... pattern for cross-sectional observation, 2... chip, 3... scribe line. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure f--Pattern for one-morning service 2-chi, 7.

Claims (3)

【特許請求の範囲】[Claims] (1)表面が(100)面を有し、<100>方向のパ
ターン配列からなる半導体ウェハにおいて、<110>
方向の直線上に断面観察パターンを設ける事を特徴とす
る半導体装置の製造方法。
(1) In a semiconductor wafer having a (100) surface and a pattern array in the <100> direction, the <110>
A method for manufacturing a semiconductor device, characterized in that a cross-sectional observation pattern is provided on a straight line in a direction.
(2)断面観察の必要な半導体ウェハにおいて、断面観
察パターンのエッジから、前記断面観察パターンと反対
方向に前記断面観察パターンと異なるライン上にエッジ
識別パターンを設ける事を特徴とする半導体装置の製造
方法。
(2) Manufacturing a semiconductor device in which an edge identification pattern is provided on a line different from the cross-section observation pattern in a direction opposite to the cross-section observation pattern from the edge of the cross-section observation pattern in a semiconductor wafer requiring cross-section observation. Method.
(3)表面が(100)面を有し、<100>方向のパ
ターン配列からなる半導体ウェハにおいて、<110>
方向の直線上に断面観察パターンを設け、前記断面観察
パターンと反対方向に前記断面観察パターンと異なる幅
のエッジ識別パターンを設ける事を特徴とする半導体装
置の製造方法。
(3) In a semiconductor wafer having a (100) surface and a pattern array in the <100> direction, the <110>
A method of manufacturing a semiconductor device, comprising: providing a cross-sectional observation pattern on a straight line in a direction; and providing an edge identification pattern having a width different from that of the cross-sectional observation pattern in a direction opposite to the cross-sectional observation pattern.
JP22305486A 1986-09-19 1986-09-19 Manufacture of semiconductor device Pending JPS6377132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22305486A JPS6377132A (en) 1986-09-19 1986-09-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22305486A JPS6377132A (en) 1986-09-19 1986-09-19 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6377132A true JPS6377132A (en) 1988-04-07

Family

ID=16792112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22305486A Pending JPS6377132A (en) 1986-09-19 1986-09-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6377132A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927778A (en) * 1988-08-05 1990-05-22 Eastman Kodak Company Method of improving yield of LED arrays
US5182233A (en) * 1989-08-02 1993-01-26 Kabushiki Kaisha Toshiba Compound semiconductor pellet, and method for dicing compound semiconductor wafer
JP2008166351A (en) * 2006-12-27 2008-07-17 Nec Electronics Corp Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927778A (en) * 1988-08-05 1990-05-22 Eastman Kodak Company Method of improving yield of LED arrays
US5182233A (en) * 1989-08-02 1993-01-26 Kabushiki Kaisha Toshiba Compound semiconductor pellet, and method for dicing compound semiconductor wafer
JP2008166351A (en) * 2006-12-27 2008-07-17 Nec Electronics Corp Semiconductor device

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