KR960005037B1 - Contact hole manufacturing method for monitor - Google Patents

Contact hole manufacturing method for monitor Download PDF

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Publication number
KR960005037B1
KR960005037B1 KR1019930000260A KR930000260A KR960005037B1 KR 960005037 B1 KR960005037 B1 KR 960005037B1 KR 1019930000260 A KR1019930000260 A KR 1019930000260A KR 930000260 A KR930000260 A KR 930000260A KR 960005037 B1 KR960005037 B1 KR 960005037B1
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South Korea
Prior art keywords
contact hole
monitor
contact
substrate
dummy layer
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KR1019930000260A
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Korean (ko)
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KR940018941A (en
Inventor
최용규
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금성일렉트론주식회사
문정환
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Priority to KR1019930000260A priority Critical patent/KR960005037B1/en
Publication of KR940018941A publication Critical patent/KR940018941A/en
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Publication of KR960005037B1 publication Critical patent/KR960005037B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

forming a dummy layer(3) on a substrate(1) in defined region including a part of contact hole region; and forming an oxide film(2) on the surface except the contact hole. Formation of the dummy layer on a side of the contact hole, makes completion of the contact hole measured easily by scanning electron microscope without demage of the substrate.

Description

모니터를 위한 반도체 소자의 콘택 홀 제조 방법Method for manufacturing contact hole of semiconductor device for monitor

제 1 도 및 제 2 도는 종래의 콘택 홀 제조를 설명하기 위한 단면도 및 평면도.1 and 2 are cross-sectional views and plan views illustrating a conventional contact hole fabrication.

제 3 도 및 제 4 도는 본 발명 콘택 홀 제조를 설명하기 위한 단면도 및 평면도.3 and 4 are a cross-sectional view and a plan view for explaining the manufacturing of the contact hole of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 기판 2 : 산화막1 substrate 2 oxide film

3 ; 더미층3; Dummy layer

본 발명은 반도체 소자 제조시 모니터(Monitor)에 관한 것으로 특히, 반도체 소자의 콘택 홀(Contact Hole) 형성 후 인 라인 셈(In Line Scanning Electron Microscope)으로 그 콘택의 에치(Etch) 상태를 모니터 하기에 적당하도록 한 모니터를 위한 반도체 소자의 콘택 홀 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitor for manufacturing a semiconductor device, and more particularly, to monitor the etch state of the contact by an in-line scan electron microscope after forming a contact hole of the semiconductor device. A method of manufacturing a contact hole in a semiconductor device for a monitor that is suitable.

종래 기술은 제 1(a)도와 같이 기판(실리콘)(1)위 콘택 영역을 제외한 표면에 산화막(2)을 형성한다.In the prior art, the oxide film 2 is formed on the surface except for the contact region on the substrate (silicon) 1 as shown in FIG. 1 (a).

또한, 제 2(b)도와 같이 기판(1)위에 산화막(2)을 형성하되 산화막(2) 중앙에 트렌지(Trench)가 형성되도록 한다.In addition, an oxide film 2 is formed on the substrate 1 as shown in FIG. 2 (b), but a trench is formed in the center of the oxide film 2.

이와같은 종래 기술에 의한 콘택 홀 부위를 그 상부에서 인 라인 셈으로 관찰해 보면 먼저, 제 1(a)도는 제1(b)도와 같이 나타나므로써 콘택 면이 형성되었음을 알 수 있으며 제 2(a)도는 제(b)도와 같이 나타나므로써 콘택 면이 미완성 되었음을 확인할 수 있다.Observing such a contact hole portion according to the prior art in-line from above, first, the first (a) is shown as the first (b), it can be seen that the contact surface is formed, the second (a) As shown in FIG. 2 (b), it can be seen that the contact surface is incomplete.

그러나, 이와같은 종래의 기술에 있어서는 콘택 홀 부위를 상부에서만 관찰하여 그 콘택 면의 완성 여부를 정확히 파악하기가 어렵기 때문에 단면 관찰을 하기 위해 기판(1)을 파손 해야 한다.However, in such a conventional technique, it is difficult to observe the contact hole portion only from the upper part and to accurately determine whether the contact surface is completed. Therefore, the substrate 1 must be broken for cross-sectional observation.

본 발명은 이와같은 종래의 결점을 감안하여 안출한 것으로, 기판과 산화막 사이에 폴리 실리콘을 형성하므로써 콘택 홀 부위를 상부에서 관찰할시 콘택 면 완성 여부를 용이하게 알 수 있도록 모니터를 위한 반도체 소자의 콘택 홀 제조 방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and by forming polysilicon between a substrate and an oxide film, a semiconductor device for a monitor can be easily known to see whether the contact surface is completed when the contact hole is observed from the top. It is an object of the present invention to provide a method for manufacturing a contact hole.

이하에서 이와같은 목적을 달성하기 위한 본 발명의 실시예를 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.Hereinafter, an embodiment of the present invention for achieving such an object will be described in detail with reference to the accompanying drawings.

제 3 도는 본 발명의 도면으로, 제 3(a)도와 같이 기판(1)위 콘택 영역이 일부 포함되도록 더미(Dummy)층(폴리 실리콘)(3)을 형성하고, 콘택 영역을 제외한 표면에 산화막(2)을 형성한다.FIG. 3 is a diagram of the present invention. As shown in FIG. 3 (a), a dummy layer (polysilicon) 3 is formed to partially include a contact region on the substrate 1, and an oxide film is formed on the surface except the contact region. (2) is formed.

또한, 제 4(a)도와 같이 기판(1)위 콘택 영역이 일부 포함되도록 더미층(3)을 형성하고, 전 표면에 산화막(2)을 형성하되 콘택 영역에 트렌치가 형성되도록 한다.In addition, as shown in FIG. 4 (a), the dummy layer 3 is formed to include a part of the contact region on the substrate 1, and the oxide film 2 is formed on the entire surface, but the trench is formed in the contact region.

이와같은 본 발명을 보면 먼저, 제 3(a)도의 콘택 부위를 셈으로 관찰할시 제3(b)도와 같이 더미층(3)이 나타나므로써 원하는 콘택 면이 완성되었음을 알 수 있고, 제 4(a)도의 콘택 부위를 셈으로 관찰할 경우 제4(b)도와 같이 더미층(3)이 보이지 않으므로써 원하는 콘택 면이 완성되지 않았음을 쉽게 확인할 수 있다.In the present invention, first, when the contact portion of FIG. 3 (a) is observed by counting, the dummy layer 3 appears as shown in FIG. 3 (b), indicating that the desired contact surface is completed. When the contact portion of FIG. a) is observed by counting, it is easy to confirm that the desired contact surface is not completed because the dummy layer 3 is not seen as shown in FIG.

이상에서 설명한 바와같이 본 발명은 원하는 콘택 홀 일측 영역에 더미층(3)을 형성하므로써 기판(1)을 파손하지 않고도 셈으로 콘택 면의 완성 여부를 용이하게 관찰할 수 있는 효과가 있다.As described above, according to the present invention, the dummy layer 3 is formed in one region of the desired contact hole, thereby making it possible to easily observe the completion of the contact surface without damaging the substrate 1.

Claims (2)

기판(1)위 콘택 영역을 일부 포함하는 영역에 더미층(3)을 형성한 후 콘택 영역을 제외한 표면에 산화막(2)을 형성함을 특징으로 하는 모니터를 위한 반도체 소자의 콘택 홀 제조 방법.A method for manufacturing a contact hole in a semiconductor device for a monitor, characterized in that an oxide film (2) is formed on a surface excluding a contact region after forming a dummy layer (3) in a region including a part of a contact region on a substrate (1). 제 1 항에 있어서, 더미층(3)으로 폴리 실리콘을 사용함을 특징으로 하는 모니터를 위한 반도체 소자의 콘택 홀 제조 방법.The method of manufacturing a contact hole for a semiconductor device according to claim 1, wherein polysilicon is used as the dummy layer (3).
KR1019930000260A 1993-01-11 1993-01-11 Contact hole manufacturing method for monitor KR960005037B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930000260A KR960005037B1 (en) 1993-01-11 1993-01-11 Contact hole manufacturing method for monitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930000260A KR960005037B1 (en) 1993-01-11 1993-01-11 Contact hole manufacturing method for monitor

Publications (2)

Publication Number Publication Date
KR940018941A KR940018941A (en) 1994-08-19
KR960005037B1 true KR960005037B1 (en) 1996-04-18

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