JPS6376624A - High frequency amplifier - Google Patents

Abstract

PURPOSE:To compensate lowering in gain by supplying an input signal to a filter circuit, executing the trapping to a signal IF of a first intermediate frequency and executing the peaking concerning a special receiving band after the input signal is amplified by the high frequency amplifying transistor of an FET. CONSTITUTION:After an input signal passes through a high frequency amplifier 11, the input signal enters a filter circuit 12. Here, the device is constituted so that the trapping circuit can be obtained to an IF by a filter circuit 12 and a peaking circuit to compensate the input capacity of a mixer circuit 13 can be obtained. The output is converted to the mixer circuit 13 to the IF and supplied to an IF band pass filter from an output terminal 1C. Thus, the filter circuit 12 is inserted in which a trap constitution is obtained to the IF and the peaking is obtained to 700 MHz-770 MHz. Thus, an IF interruption can be solved and the gain deterioration at the upper limit of the receiving band can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION 2-Vane Industrial Application Field The present invention relates to a high frequency amplification device used in television receivers and the like.

BACKGROUND OF THE INVENTION In recent years, with the development of new media equipment, high frequency amplifiers have been required to be further improved in performance than ever before.

An example of the conventional high frequency amplification device mentioned above will be described below with reference to the drawings.

FIG. 6 is a block diagram showing the configuration of a conventional high frequency amplification device, and FIG. 6 is a circuit diagram showing a specific example thereof. In FIG. 6, 61 is a high frequency amplifier, 62 is a mixer circuit, 6A is an input terminal, 6B is an input terminal for inputting a local oscillation signal, and 6C is an IF output terminal.

In the high frequency amplifier device configured in this way, an input signal is supplied to the high frequency amplifier 61 from the input terminal 6A, is amplified, and then frequency converted by the mixer circuit 52.
A signal of the first intermediate frequency (hereinafter referred to as 1, F signal) is supplied to the next stage as a 3-beno output from the terminal IF output terminal 6C. 1. F signal is input band (
901M to 77014k) (for example, 950 & band), the local oscillation signal is set to a higher frequency by the input signal IF and is routed from the input terminal 6B to the mixer, -circuit 62.
is supplied to.

FIG. 6 shows a specific example of the circuit configuration of this device configured as described above. In Figure 6, 61.610°611.
612, 613 are FET transistors, 62.6θ, 6
16,619 is a coupling capacitor, 68.617,614
is a balun transformer, 64゜615.618 is a bias potential, 63 is a bias resistor, 66 is a choke coil, each terminal is 6A is an input terminal, 6B is a power supply terminal, 6C is an output terminal, and 6D is a local oscillation signal input terminal. Input terminals are shown.

The operation of this configuration will be described above.

First, a human input signal is supplied from the input terminal 6A, is supplied to the amplification transistor 67 via the coupling capacitor 62, is amplified here, and is passed from the drain of the FET transistor 1 to the balun transformer 68 via the coupling capacitor 66.
Here, the signal is unbalanced-balanced converted and supplied to two common sources of a mixer circuit in which four FET transistors 10°, 611, 612, and 613 are connected in double balance. A local oscillation signal is supplied to two common gates of the four FET transistors from an input terminal 6D via a balun transformer 614 that performs unbalanced-balanced conversion.
The two common drains of the four FET transistors have 2
The sum and difference components of the signal frequencies are output. This is balanced-unbalanced converted by a balun transformer 617 and supplied to an IF bandpass filter stage from an output terminal 6C via a coupling capacitor 619.

Problems to be Solved by the Invention However, the above configuration has the disadvantage that it causes IF interference when there is an IF band signal at the input stage, and the impedance seen from the input side of the balun transformer 68 is higher than that of the FET. It becomes capacitive due to the input capacitance, and due to its capacitance value, the upper limit of the reception band (700-770MHz
) had the disadvantage of deteriorating the gain.

Page 6 In view of the above problems, the present invention attenuates the IF band signal before the first stage of the mixer, and also reduces the upper limit of the reception band (700
The present invention provides a high frequency amplification device that can simultaneously compensate for gain deterioration in the frequency range (MHz to 770 MHz).

Means for Solving the Problems In order to solve the above problems, the high frequency amplification device of the present invention, after high frequency amplifying the input signal, becomes a trap for the IF, and peaks at around 700 to 700 MHz. The signal is passed through a filter circuit such as the one shown in FIG.

Operation The present invention has a trap configuration for IF and a peaking filter circuit for 700 MHz to 770 MHz.
F interference can be solved, and gain deterioration at the upper limit of the reception band can be prevented.

6-7 Embodiment A high frequency amplification device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing the configuration of a high frequency amplification device in an embodiment of the present invention. In FIG. 2, 11 is a high frequency amplifier, 12 is a filter circuit, 13 is a mixer circuit, 1A is an input terminal, 1B is an input terminal for inputting a local oscillation signal, and 1C is an output terminal.

The operation of the high frequency amplification device configured as described above will be described below. First, the input signal is sent to the high frequency amplifier 1.
1 and then enters the filter circuit 12. Here, the filter circuit 12 is configured to function as a trap for the IF, and to function as a peaking circuit that compensates for the input capacitance of the mixer circuit 13 at the high end of the reception band. The output is converted into an IF by the mixer circuit 13 and supplied to the IF bandpass filter from the output terminal 1C.

FIG. 1 shows a specific example of the circuit configuration of the embodiment shown in FIG. In Figure 1, 21.213°214.
215, 216 are FET transistors, page 7 22, 26, 219, 222 are coupling capacitors,
24, 212, 218, and 221 indicate bias potentials.

26 is the choke Koinope 210° 217. 220 is the balun transformer, 23 is the bias resistor, 29 is the input conversion capacitance of one stage of the mixer, which indicates the so-called stray capacitance, 27
28 is a resonance coil, 28 is a resonance capacitor, 2A is an input terminal, 2B is a power supply terminal, 2C is an IF output terminal, and 2D is an input terminal for inputting a local oscillation signal.

The operation of this embodiment with the above configuration will be explained.

Without switching, the input signal is applied from the terminal 2A via the coupling capacitor 22 to the gate of the FET transistor 21, where it is amplified. The amplified signal is transmitted from the drain of the FET transistor 21 to the coil 27 via the coupling capacitor 26. Resonant capacitor 28, stray capacitance f! -29. The characteristics of this filter circuit are as shown in Fig. 3, at a frequency f corresponding to IF.
0. It becomes an anti-resonance point at , and the reception band is 700-770M.
At a frequency corresponding to f02 corresponding to the Hz band, it becomes a series resonant peaking circuit. This characteristic is as shown in FIG. 4, and in the f02 portion, the gain deterioration that occurs in the conventional example is peaked and compensated. This output is balun transformer 21
0 through four FET transistors 213, 214
, 215, and 216 in a double-balance configuration, and the local oscillation input signal obtained from the input terminal 2D is applied to the common gate via the balun transformer 217, and the signal generated at the common drain is applied The sum and difference signals of the two signals are supplied to the IF bandpass filter stage from the terminal 2C via the balun transformer 220° coupling capacitor 222. Balun transformer 217, 221
．． Bias potentials 212, 218, 2 are applied to 220, respectively.
The optimum bias is applied by 21.

As described above, according to this embodiment, after the input signal is passed through the high frequency amplification transistor 21, the input capacitance of the mixer circuit is used to trap the IF, 700 to 770M.
By configuring a filter circuit that peaks at Hz and applying 9B to it, it is possible to attenuate the IF and improve gain deterioration near the upper limit of the receiving band (700 to 770 MHz). .

Effects of the Invention As described above, the present invention amplifies the input signal with the FET0 high frequency amplification transistor, and then connects the coil, capacitor, and FET.
By configuring a filter circuit that resonates in series and parallel with the input source capacitance of the mixer and supplying it to this filter circuit, it traps the IF and peaks in the receiving band of 700 to 770 MHz, thereby eliminating IF interference. It is possible to improve the gain in the 700 to 770 MHz band.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a high-frequency amplification device according to an embodiment of the present invention, FIG. 2 is a block diagram showing the basic configuration of FIG. 1, and FIG. 3 is an impedance characteristic diagram of the filter circuit of FIG. 2.
Fig. 4 is a characteristic diagram showing the pass characteristics of Fig. 3, Fig. 6 is a block diagram showing the configuration of a conventional example, and Fig. 6 is a circuit diagram showing a specific example of the circuit configuration of Fig. 5 on page 10. It is. 11... High frequency amplifier, 12... Filter circuit, 13... Mixer circuit, 21...
・・・FET transistor, 27・Kawa・Resonance Koinope 28・・・Resonance capacitor, 29・・・・・・
Stray capacitance. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
Figure 5 Figure 6

Claims (1)

[Claims] It is equipped with a high-frequency amplifier that amplifies the input signal, a parallel resonant circuit consisting of a coil and a capacitor inserted on the output side of the high-frequency amplifier, and a mixer circuit configured with double balance using four FET transistors. Impedance conversion is performed on two common sources using a balanced-unbalanced balun, and a series-parallel resonant circuit is constructed using the equivalent capacitance seen from the unbalanced side of the balun and the aforementioned parallel resonant circuit, and its anti-resonance point is set in the 950 MHz band. , the resonance point is 7
00 to 770MHz band, apply a local oscillation input signal from the two common gates of the double balance mixer circuit, change the two common drains to unbalanced with a balun, and then select an intermediate frequency in the 950MHz band. A high frequency amplification device characterized in that it is used as