JPH0720019B2 - Frequency conversion circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency conversion circuit, and more particularly to a frequency conversion circuit suitable for a communication radio device.

2. Description of the Related Art In recent years, as wireless devices such as portable wireless phones have become smaller, lighter, and have lower power consumption, the number of users has been rapidly increasing. Furthermore, while narrowing the band to cope with many users, it is important to reduce the distortion and power consumption of the frequency conversion circuit.

A frequency conversion circuit using a field effect transistor (hereinafter, referred to as FET) having a simple circuit configuration and a conversion gain is often used for such a receiver that requires miniaturization and low power consumption (for example, 1988 Autumn Meeting of the Institute of Electronics, Information and Communication Engineers C-349).

The conventional receiving circuit will be described below with reference to FIG.

In FIG. 6, 1 is a dual gate FET having two gates, a first and a second gate, and 5 is a source terminal, which is grounded.
2 is the second gate terminal, 64 from the 63 gate bias terminals
Locally input from 60 local input terminals (local) when DC bias is set through the gate bias resistor of
The signal is amplified through 67 local amplifiers and 10 matching circuits and then applied. Reference numeral 3 is the first gate terminal, and the RF from the RF signal input terminal of 61 when the DC bias is set from the gate bias terminal of 65 through the gate bias resistor of 66.
The signal is amplified through an RF amplifier 68 and a matching circuit 62, and then applied. 4 is a drain terminal, and 8 through 8 matching circuits
The IF signal is output from the IF output terminal. DC bias is applied from the drain bias terminal 6 through the drain bias resistor 24. 25 is a bypass capacitor.

The operation of the above arrangement will be described below. For example, in the case of a radio device, the RF signal passes through an antenna (antenna) and a bandpass filter (not shown),
61 Reach RF signal input terminal. After that, the RF signal is amplified to a desired level by 68 RF amplifiers for improving the noise characteristic, and applied to the first gate 3 of the dual gate FET 1 through the high frequency matching circuit 62 provided for impedance matching. To be done. On the other hand, although not shown in the figure, the local oscillator signal generated by the local oscillator signal source is sent from the 60 local oscillator input terminal as necessary.
It is amplified to a desired level by the local amplifier and is applied to the second gate 2 of the dual gate FET 1 through the high frequency matching circuit 10 provided for impedance matching. The dual gate FET 1 applies a DC bias by a drain bias circuit composed of 6, 24, 25 and a gate bias circuit composed of 63, 64 and 65, 66. The RF signal applied to the first gate terminal 3 is modulated by the frequency component of the local oscillation signal applied to the second gate terminal 2 due to the non-linear characteristic of the dual gate FET 1, and the drain terminal of 4 receives the intermediate signal. A frequency (hereinafter referred to as IF) component appears. After that, the IF component is obtained at the IF output terminal 8 through the matching circuit 11 provided for impedance matching.

As described above, since the isolation characteristics of the first gate terminal 3 and the second gate terminal 2 are good, it is possible to directly apply the RF signal and the local oscillation signal without using a directional coupler or the like, and use the diode. It has a simpler circuit configuration than a frequency conversion circuit.
Further, since the gate is used as an input, there is a feature that a high conversion gain can be obtained.

However, the gate is used as the RF input terminal as follows.
In the case of an integrated circuit (IC) that is small in size and composed of a FET mixer and a high-frequency amplifier, it is difficult to obtain good distortion characteristics for RF signals because the input / output impedance of the dual gate FET is high. The problem is that matching with 24 is sensitive to constants.

The present invention solves the above problems, and an object thereof is to obtain good distortion characteristics and low power consumption characteristics with a simple circuit configuration.

Means for Solving the Problems The present invention achieves the above object by a circuit configuration in which an FET is used as a frequency conversion element, an RF signal is input to the source and a local oscillation signal is input to the gate, and output from the drain.

Effect According to the present invention, the local oscillation signal is input to the gate of the FET and the RF signal is input to the source having a low input impedance as in the conventional case, thereby improving the distortion characteristic, stabilizing the matching, and simplifying the matching circuit. Is to get.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a configuration diagram showing an equivalent circuit of the frequency conversion unit of the receiving circuit in the first embodiment.

In FIG. 1, those having the same functions as those in FIG. 6 are designated by the same reference numerals.

1 is a dual gate FET, 2 is a local oscillator input terminal 7 through which the local oscillator signal is input via an impedance matching circuit 10.
The gate terminals 3 are first gate terminals, which are grounded at high frequencies. The drain terminal 4 is connected to the IF output terminal 8 via the impedance matching circuit 11. The matching circuit 10 is composed of, for example, capacitors 12, 13, 14 and an inductor 15. The matching circuit 11 includes, for example, transmission lines 16 and 17, capacitors 18, 19, 20, 21 and 2
3 and inductor 22. 6 is a drain bias terminal, 24 is a drain bias resistor, 28 is a transmission line, 26, 29 and 30 are gate bias resistors, 32 is a source bias resistor, 33 is a high frequency blocking inductor, and 27 and 31 are bypass capacitors.

The operation of the above configuration will be described below.

Although not shown in the figure, the local oscillator signal generated by the local oscillator signal generator is input to the second gate 2 of the dual gate FET 1 from the local oscillator input terminal 7 through the impedance matching circuit 10. Similarly, although not shown in the figure, the RF signal is input from the RF input terminal 9 to the source terminal 5 in the figure through the antenna (antenna) and the bandpass filter. The first gate 3 is grounded by a bypass capacitor 31 in terms of high frequency and by a gate bias resistor 30 in terms of direct current. The input impedance of the source terminal 5 is considerably lower than the input impedance of the gate, and it is possible to directly input the source 5 from the RF input terminal 9 which is normally connected with 50Ω without providing a matching circuit. RF signal is FE
Due to the non-linear characteristic of T, it is modulated by the frequency component of the local oscillation signal input to the second gate of 2, and the IF signal is obtained from the drain terminal of 4 as the difference component of both frequencies. The IF signal can be obtained from the 8 IF output terminals via the impedance matching circuit 11 including the matching elements 16, 17, 18, 19, 20, 21, 21, 22 and 23. The source terminal 5 is a source bias resistor 32 in terms of direct current.
Is biased to a positive potential by means of which the value is selected so as to obtain desired conversion gain, distortion, and power consumption characteristics together with the drain bias.

As is clear from the above description, according to this embodiment, the RF
Since the signal amplitude is input to the source terminal of the FET with low input impedance, the voltage amplitude does not fluctuate excessively, and as compared to the case of inputting to the gate terminal with high input impedance as in the past, there is a disturbing wave near The distortion characteristic which becomes a problem when inputting is improved, and the matching with the RF input terminal 9 becomes stable, so that the matching circuit can be simplified or omitted. Further, by grounding the first gate 3 at high frequency, a shielding effect is provided between the terminals 2 and 5, and the local signal and the RF signal can be separated.

FIG. 2 is a configuration diagram showing a frequency conversion unit of a receiving circuit in another embodiment.

In the circuit of the present embodiment shown in FIG. 2, parts having the same functions as those of the embodiment shown in FIG.

In FIG. 2, reference numeral 10 is an impedance matching circuit, which is composed of matching capacitors 12, 13, 14 and a matching inductor 15.
It is connected between the local input terminal 7 and the second gate 2. 206
Is an RF amplifier that amplifies the RF signal, for example dual gate
It is composed of a FET 201, matching capacitors 207, 208, 209, 214, a matching inductor 210, bias resistors 211, 213, 215, and a bypass capacitor 212. 200 is an RF signal input terminal.

The operation of the above configuration will be described below.

The local oscillator signal is input to the second gate 2 from the local oscillator input terminal 7 through the impedance matching circuit 10 as in the embodiment shown in FIG. On the other hand, the RF signal is the RF signal input terminal 200
Then, it is amplified by the RF amplifier 206 and input to the source terminal 5 of the dual gate FET 1. This allows
It improves the noise figure (NF) of the frequency converter.
The second gate 202 of the dual-gate FET 201 used for the RF amplifier 206 is connected to the source 205, and the drain 204 improves the isolation characteristic between the first gate 203, so that You are getting a separation between the RF signals. Further, the DC bias is set to a desired value by the bias resistors 211, 213 and 215.

As is clear from the above description, according to the present embodiment, the RF signal is input to the source terminal of the FET, which has a low input impedance, and therefore has a good distortion characteristic for the same reason as described in FIG. RF input circuit can be simplified and at the same time RF
The improvement of the noise characteristic (that is, the input dynamic range) by the amplifier can be achieved. In addition, by grounding the first gate terminal 3 of the dual gate FET1 at a high frequency, a seal and an effect are provided between the second gate terminal 2 and the source terminal 5, and the local signal and the RF signal are separated. be able to.

FIG. 3 is a configuration diagram showing a circuit of a frequency conversion unit of a receiving circuit in still another embodiment.

In the circuit of the present embodiment shown in FIG. 3, parts having the same functions as those of the embodiment shown in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

In FIG. 3, reference numeral 306 denotes an RF amplifier which is coupled to the source terminal of the dual gate FET1 in terms of high frequency and direct current. 300 is an RF signal input terminal.

With the above configuration, in this embodiment, the RF amplifier 306
As a result, the same operation and effect as those of the example of FIG. 2 can be obtained.

In addition, in this patent, the source terminal 5 of the first dual gate FET 1 used as a frequency conversion element and the drain terminal 304 of the second dual gate FET used as an RF signal amplification element are not only high frequency but also direct current. Since the two dual gate FETs are connected vertically, and the two dual gate FETs are vertically stacked, the bias current can be shared, and the consumption current can be reduced as compared with the case where the DC bias current is independently supplied.

FIG. 4 is a configuration diagram showing a circuit of a frequency conversion unit of a receiving circuit in still another embodiment.

In the circuit diagram of this embodiment shown in FIG. 4, parts having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 4, 401 and 421 are single-gate FETs, 405 is a single-gate FET 421, matching capacitors 406, 407, 408,
418, matching inductor 409, bias resistors 410,412,41
7 and bias capacitor 411. 413 and 414 are transmission lines connected to the gate terminal 402 and the source terminal 404 of the FET 401, respectively. 400 is an RF signal input terminal.

In the above configuration, since the single gate FET is used, the transfer conductance is large and the characteristic of a monotonic gradient with a negative bias can improve the noise characteristic and the distortion characteristic more than the case of using the dual gate FET. However,
Since the isolation property between the gate 402 and the source 404 is poor, the open transmission line 414 and the RF signal band with λg / 4 at the local signal frequency, however, the isolation property between the gate 402 and the source 404 is inferior. , In the local signal band and the RF signal band,
Sources 404 of open transmission lines 414 and 419 with g / 4
It is possible to improve by providing on the side of the gate 402.

FIG. 5 is a configuration diagram showing a circuit of a frequency conversion unit of a receiving circuit in still another embodiment.

In the circuit diagram of the present embodiment shown in FIG. 5, parts having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 5, 501 is an FET having four gate terminals of first, second, third, and fourth, and the two dual gate FETs 1 and 301 in FIG. 3 are integrated into one FET on an integrated circuit. It is a thing. The first and second gates 505 and 504 correspond to the gates 303 and 302 of FIG. 3, respectively, and the third and fourth gates 503 and 502 correspond to the gates 3 and 2 of FIG. 3, respectively. Reference numeral 508 is an impedance matching circuit for the RF signal from the RF signal input terminal 500. Matching capacitors 509, 510, 511 and matching inductor 5
Consist of 13. 513 is a gate bias resistor, 515 is a source bias resistor, and 514 is a bypass capacitor for grounding the source terminal 507 at high frequencies.

In the above configuration, the FET 501 is a combination of a dual gate FET for RF signal amplification and a dual gate FET for frequency conversion integrated on an integrated circuit, and has the same operation and effect as the example of FIG. In addition, it is possible to reduce the size of the circuit and reduce unnecessary radiation and characteristic deterioration caused by wiring.

Effects of the Invention As described above, according to the present invention, the following effects can be obtained.

In the first generation, the first gate of the dual gate FET is grounded at a high frequency, the local oscillation signal is input to the second gate, and the RF signal is input to the source of low impedance to improve the distortion characteristic of the RF signal. In addition, simplification of the circuit configuration of the RF signal input section can be achieved.

In the second invention, in addition to the effect of the first invention, the noise characteristic can be improved by adopting a configuration in which an RF amplifier is added.

In the third invention, the frequency conversion element and the RF signal amplification element are connected in a direct-current manner in a vertically stacked configuration, so that the current consumption can be reduced in addition to the effect of the second invention.

In the fourth invention, a single gate FET is used, and by adding a stub for separating a local oscillation signal and an RF signal, noise and distortion characteristics can be further improved as compared with the second invention. it can.

In the fifth invention, the two dual-gate FETs for frequency conversion and RF signal amplification in the third invention are configured as one FET having four gates on the integrated circuit. In addition to the effect, circuit miniaturization,
It is possible to reduce unnecessary radiation and characteristic deterioration caused by wiring.

As described above, according to the present invention, the distortion can be reduced, the circuit can be simplified, and the current consumption can be reduced, and the effect thereof is extremely large.

[Brief description of drawings]

1, FIG. 2, FIG. 3, FIG. 4, and FIG. 5 are circuits of the frequency conversion section of the receiving circuit in the first, second, third, fourth, and fifth embodiments of the present invention, respectively. FIG. 6 is a configuration diagram of a circuit example of a frequency conversion unit of a conventional receiving circuit. 1 ... dual gate FET, 2 ... dual gate FET second gate terminal, 3 ... dual gate FET first gate terminal, 4 ... dual gate FET drain terminal, 5
... Source terminal of dual gate FET, 6 ... Drain bias terminal, 7 ... Local input terminal, 8 ... IF output terminal, 9 ... RF signal input terminal, 10, 11 ... Impedance matching circuit, 12, 13,14,18,19,20,21,23 …… Matching capacitor, 15,22 …… Matching inductor, 16,17,28 …… Transmission line, 24,26,29,30,32 …… Bias Resistance, 25,27,31 ……
Bypass capacitor, 33 ... High frequency blocking inductor,
63,65 …… Gate bias terminal, 67 …… Local amplifier, 68
...... RF amplifier.

Claims (5)

[Claims] 1. A first gate terminal of a field effect transistor having first and second gate terminals in order from the source electrode side between a source electrode and a drain electrode, the first gate terminal being grounded at a high frequency, and the second gate terminal being grounded. A frequency conversion circuit characterized in that a local oscillation signal is input to the gate terminal, an RF reception signal is input to the source terminal, and an intermediate frequency signal is extracted from the drain terminal. 2. A first gate terminal of a field effect transistor, which has first and second gate terminals in order from the source electrode side between a source electrode and a drain electrode, is grounded at a high frequency, and a second gate terminal is grounded at a high frequency. Input a local signal to the gate terminal and RF
A frequency conversion circuit characterized in that the output of a high frequency amplifier circuit connected to a signal input terminal is input to a source and an intermediate frequency signal is taken out from a drain terminal. 3. A first gate of a field effect transistor having first and second gate terminals in order from the source electrode side between a source electrode and a drain electrode, the first gate being grounded at a high frequency, and the second gate being grounded. A frequency characterized by inputting a local signal to the terminal, connecting to the RF signal input terminal, and inputting the output of a high-frequency amplifier circuit whose output is DC-connected to the source to the source and extracting the intermediate frequency signal from the drain terminal. Conversion circuit. 4. A local oscillation signal is input to a gate terminal of a field effect transistor having a single gate terminal, and an output of a high frequency amplifier circuit connected to an RF signal input terminal is input to a source,
A frequency conversion circuit characterized by extracting an intermediate frequency signal from a drain terminal. 5. A source terminal of a field effect transistor having four gates of a first, a second, a third, and a fourth in order from the source electrode side between a source electrode and a drain electrode, and the source terminal is grounded at a high frequency. The RF reception signal is input to the gate terminal of 1, the second gate terminal and the source terminal are connected, the third gate terminal is grounded in high frequency, the local oscillation signal is input to the fourth gate terminal, and the drain A frequency conversion circuit characterized by extracting an intermediate frequency signal from a terminal.