JPH0740647B2 - Field effect transistor circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a field effect transistor (hereinafter abbreviated as FET) circuit used in a frequency mixing circuit (hereinafter abbreviated as mixer) or a modulation circuit, in particular. is there.

(Prior Art) Recently, communication information networks have become more and more widespread, and high frequencies used for communication and broadcasting have spread from the VHF band and the UHF band to the SHF band. A mixer or a modulation circuit is indispensable for these high-frequency communication devices. In particular, mixers or modulation circuits using GaAs, which have excellent characteristics at high frequencies, have begun to be used. As basic circuit elements of these mixers or modulators, there are diodes, single gate FETs, dual gate FETs, etc., but especially at high frequencies such as the SHF band,
Dual-gate FETs with high gain, easy input / output separation, and small matching circuit are often used.

A conventional mixer will be described with reference to a high frequency equivalent circuit diagram of a conventional mixer / microwave integrated circuit (hereinafter abbreviated as mixer MMIC) shown in FIG. In FIG. 5, the high frequency signal input to the high frequency signal input terminal 1 passes through the matching circuit 2 to the first gate 4 of the dual gate FET 3, and
The local oscillation signal input to the local oscillation signal input terminal 5 passes through the matching circuit 6 and is input to the second gate 7 of the dual gate FET 3. The intermediate frequency signal mixed by the dual gate FET 3 and output from the drain 8 of the dual gate FET 3 passes through a matching circuit composed of the inductance 9 and the capacitors 10 and 11 and is amplified by the single gate FET 12 to output the output terminal 13 Is output from. In addition, dual gate
The source 14 of the FET 3 is grounded, and the drain 8 is configured so that a DC voltage of 3 to 5 V is applied between the source 14 and the drain 8 via a load resistor 15 (not shown). There is. As mentioned above, the high frequency signal and the local oscillation signal are
Since the matching circuit 2 and the matching circuit 6 are matched separately, they are well matched and, as a feature of the dual gate FET, the separation of both signals is very good.

(Problems to be Solved by the Invention) However, in the conventional mixer, the dual gate is used.
The output impedance of the FET output with respect to the intermediate frequency becomes very large. For example, using GaAs / MES / FET,
When a dual gate FET is formed with a gate of 300 μm × 1 μm, its output impedance becomes 2000Ω, and the output impedance of a single gate FET of the same size is 200.
It is considerably higher than ~ 300Ω. When the output impedance is high as described above, there are problems that the matching circuit with the amplifier at the subsequent stage becomes huge and the usable frequency band becomes very narrow.

(Means for Solving Problems) In order to solve the above problems, the present invention provides a dual gate FET in which a voltage between a source and a drain is set to 0.5 to 1.0V.
A circuit is provided.

(Operation) According to the above configuration, since the dual gate FET operates in the non-saturation region and the output impedance thereof is remarkably lowered, the matching circuit with the amplifier in the subsequent stage can be remarkably simplified or omitted. .

(Embodiment) An embodiment of the mixer of the present invention will be described with reference to FIGS. 1 to 4.

FIG. 1 is a circuit diagram of a mixer MMIC according to an embodiment of the present invention, in which a high frequency signal input to a high frequency signal input terminal 1 is
The local oscillation signal input to the first gate 4 of the dual gate FET 3 through the matching circuit 2 and the local oscillation signal input terminal 5 passes through the matching circuit 6 to the second gate 7 of the dual gate FET 3. Is entered. The intermediate frequency signal mixed by the dual gate FET 3 and output from the drain 8 of the dual gate FET 3 is amplified by the single gate FET 12 through the capacitor 11 in parallel with the load circuit including the load resistor 9a and the capacitor 10, It is output from the output terminal 13. The source 14 of the dual gate FET 3 is grounded, and the drain 8 has a circuit configuration in which a voltage of 0.5 to 1.0 V is applied between the source 14 and the drain 8 via the load resistor 9a and the DC power supply 16. Has become.

Conventionally, the voltage between the source and drain of the dual gate FET3 is 3 to 5V in order to obtain high gain by making the FET in the saturation region.
Since the output impedance of the dual gate FET3 was extremely high, the voltage between the source and drain of the dual gate FET3 was changed in the embodiment of the present invention.
By setting 0.5-1.0V, FET3 operates in the non-saturation region, and the output impedance is reduced to 1 /
It is lowered to 5 to 1/10. FIG. 2 is a diagram showing the relationship between the voltage between the source and drain of the dual gate FET and the output impedance in one embodiment of the mixer of the present invention,
Dual-gate FET3 is used for GaAs / MES / 300μm gate width
Formed by FET and setting the voltage between the source and drain of the dual gate FET3 to 0.5-1.0V, the output impedance is 2
It falls to about 200 to 400 Ω with respect to about 000 Ω. When the output impedance decreases, matching with the amplifier in the subsequent stage becomes very easy and a large matching circuit becomes unnecessary. For example, as shown in FIG. 1, it is possible to match only with the load resistor 9a. Also, the usable frequency band is increased by 2 to 4 times.

FIG. 3 is a diagram showing the relationship between the source-drain voltage and the conversion gain of the dual-gate FET in one embodiment of the mixer of the present invention, where the source-drain voltage is 0.5 to 1.0V.
When it is set to, the conversion gain is slightly reduced because it is in the non-saturation region of the FET, but at the optimum point existing in the non-saturation region, the gain is reduced within 1 dB as compared with the conventional case. Moreover, since the matching with the amplifier in the subsequent stage is improved, the gain as a whole is improved.

FIG. 4 is a diagram showing the relationship between the voltage between the source and drain of the dual gate FET and the noise figure in one embodiment of the mixer of the present invention. The noise figure shows a minimum characteristic in the voltage range of 0.5 to 1.0V. , Its minimum point is 1d compared to the conventional example.
It will stay with deterioration within B. Further, in the non-saturation region where the voltage between the source and the drain of the dual gate FET 3 is less than 0.5V and exceeds 1.0V, both the conversion gain and the noise figure deteriorate as compared with the conventional one, as can be seen from FIGS. 3 and 4.

As described above, according to the present invention, the voltage between the source and the drain of the dual gate FET is set to 0.5 to 1.0 V, whereby the mixer can be remarkably widened in frequency band and downsized. Although the embodiments of the present invention are described with respect to the mixer, similar effects can be obtained with the modulator.

(Effects of the Invention) As described above, according to the present invention, by setting the voltage between the source and drain of the dual gate FET used as a basic constituent element of the mixer or the modulation circuit to 0.5 to 1.0 V, the dual Since the gate FET operates in the non-saturation region, it is possible to reduce the output impedance for the intermediate frequency. As described above, by reducing the output impedance, the matching circuit with the amplifier in the subsequent stage can be significantly simplified or omitted, and the frequency band can be increased by 2 to 4 times without significantly reducing the conversion gain. The practical effect is great because it can be extended to

[Brief description of drawings]

FIG. 1 is a circuit diagram of a mixer MMIC according to an embodiment of the present invention, and FIG. 2 is a relationship diagram of output impedance with respect to a voltage between a source and a drain of a dual gate FET in an embodiment of the mixer according to the present invention. FIG. 3 is a relational diagram of conversion gain with respect to voltage between the source and drain of the dual gate FET in the above embodiment, and FIG. 4 is a voltage between source and drain of the dual gate FET in the above embodiment. Fig. 5 shows the relationship between the noise figure and the conventional mixer.
The circuit diagram of MMIC is shown. 1 ... High frequency signal input terminal, 2, 6 ... Matching circuit, 3 ...
Dual gate FET, 4 ... FET first gate, 5 ... Local signal input terminal, 7 ... FET second gate, 8 ... FET drain, 9 ... Inductance, 9a ... Load resistor,
10, 11 ... Capacitor, 12 ... Single gate FET, 13 ...
… Output terminal, 14… FET source, 16… DC power supply.

Claims (1)

[Claims] 1. A field effect transistor circuit characterized in that a voltage between a source and a drain of a dual gate FET used in a frequency mixing circuit or a modulation circuit is set between 0.5V and 1.0V.