JPS61224506A - Field effect transistor circuit - Google Patents

Abstract

PURPOSE:To obtain a mixer or a modulator in which the ternary distortion and cross modulation distortion are improved remarkably by inputting an RF signal from a source of a single gate field effect transistor (TR) and inputting a local oscillation signal from the gate. CONSTITUTION:A filter 7 cutting-off a high frequency (especially RF) signal is inserted to the source 1, the source 1 is connected to an RF signal input terminal 4, the gate 2 is connected to a local oscillation (LO) signal input terminal 5 and the drain 3 is connected respectively to an IF signal output terminal 6 respectively. Then the RF signal inputted from the source is mixed or modulated with the LO signal inputted from the gate and the result is outputted to the drain 3. It is required to design the filter 7 that the resistance in terms of DC is suppressed to one ohm or lower and consists of such a device as an inductor or a 1/4 wavelength stub. Thus, the source resistance is decreased, low noise is attained and the RF signal is inputted to the source efficiently. In an MMIC mixer or an MMIC modulation circuit, the RF signal and the LO signal are inputted through a matching circuit 12 and the IF output is outputted through the matching circuit 12.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a field effect transistor (hereinafter referred to as a field effect transistor) which can be used in a frequency mixing circuit (mixer) or a modulator of all communication equipment including televisions, radios, etc. (called FET)
It is related to circuits.

(Prior Art) Recently, communication information networks are expanding more and more, and the high frequencies used for communication and broadcasting are also expanding from the VHF band and UHF band to the SHF band. Mixers or modulators are essential for communication equipment, and mixers or modulators using GaAs, which have excellent characteristics at high frequencies, are beginning to be used.

As a mixing element, single gate FET,
Dual gate FETs and diodes are used. However, with diodes, conversion gain cannot be obtained, loss is large, and distortion characteristics are not very good. , 2 is the gate, 3 is the drain, 4 is the RF signal input terminal, 5 is the local oscillator (
(hereinafter referred to as L○) signal input terminal, 6 is the IP signal output terminal, 8
is a coupler.

Here, the RF multiplied signal enters from the RF signal input terminal 4, is superimposed by the L○ multiplied signal combiner 8, which enters from the L○ signal input terminal 5, and is mixed or modulated by a single gate FET.

However, since the coupler 8 takes up a large amount of space, dual gate FETs that do not require such a circuit are often used.

FIG. 4 is a circuit diagram of a conventional dual gate FET mixer or modulation circuit, where 9 is the first gate and 10 is the second gate.

Then, the RF signal input terminal 4 is connected to the first gate 9. The LO signal input end 5 is the second gate 10, and the IF multiplied signal mixing signal or modulation signal) output end 6 is the drain 3.

This circuit does not require a coupler, and only needs to be input through a matching circuit for each of the L× signal RF signals. Mixing or modulation operations are performed with this FET.

(Problems to be Solved by the Invention) However, with the above configuration, third-order distortion and cross-modulation distortion, which are most important when applied to communication equipment, are not good.

If third-order distortion or cross-modulation distortion is bad, a large number of channels that are separated by a certain frequency interval will cause mutual interference, causing noise or malfunction. Therefore, this third-order distortion and cross-modulation distortion must be reduced.

One way to improve distortion characteristics is to use a balanced mixer.
Or there is a balanced modulation circuit.

FIG. 5 is a circuit diagram of a field effect transistor circuit showing a conventional balanced mixer or balanced modulation circuit.
1 is a phase inversion circuit.

Using two dual gate FETs, RF multiplied signal L
The O times signal is passed through a phase inversion circuit (phase shifter 01,
Divided into two signals with a 180° phase difference, RF4:I
X and LO times signal 1st gate 9 and 2nd gate 1 respectively
Enter 0.

Next, the two IF multiplied signals from the drain 3 are combined through the phase inversion circuit 11 and output from the IF signal output terminal 6.

In this balanced mixer or balanced modulation circuit, even-order distortion is certainly canceled out and is not output.

However, problems such as third-order distortion and cross-modulation distortion cannot be reduced. The same is true for double balanced mixers or double balanced modulation circuits.

FIG. 6 is a circuit diagram of a conventional mixer or modulation circuit using two continuously connected FETs, and FIG. 7 is a circuit diagram of a conventional double balanced mixer or double balanced modulation circuit.

6 and 7 will be described later in comparison with the present invention.

(Means for Solving the Problems) In view of the above drawbacks, the present invention provides a field transistor circuit that can significantly improve third-order distortion and cross-modulation distortion.

In order to solve the above problems, the field transistor circuit of the present invention provides an RF
The configuration is such that a multiplied signal is input, and an LO multiplied signal is inputted from the gate, so that the mixing operation causes a modulation operation.

(Function) With this configuration, the field effect transistor circuit of the present invention can significantly reduce third-order distortion and cross-modulation distortion, which are very important in communication equipment.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

MES F uses a GaAs semiconductor substrate with excellent high frequency characteristics and has a gate made of titanium and aluminum on it.
When configured as an ET, this FET exhibits an excellent low noise figure not only in the VHF/UHF band but also in the SHF band. ``This FET is used to configure a single gate FET.

FIG. 1 is an embodiment diagram showing the basic circuit of the field effect transistor circuit of the present invention, in which 1 is a source, 2 is a gate, and 3
4 is a drain, 4 is an RF signal input terminal, 5 is an LO signal input terminal, 6 is an IF signal output terminal, and 7 is a filter for cutting high frequency signals.

A filter 7 is inserted on the source 1 side to cut high frequencies (especially RF multiplied signals), the source 1 is connected to the RF signal input terminal 4, the gate 2 is connected to the L○ signal input terminal 5, and the drain 3 is connected to the I
They are respectively connected to the F signal output terminals 6.

This circuit mixes or modulates the RF multiplied signal input from the source and the LO multiplied signal input from the gate.
Output to the drain side.

Here, filter 7 cuts high frequencies.

In terms of direct current, it must have a low resistance of 1Ω or less, and may be composed of, for example, an inductance or a 1/4 wavelength stub.

In this way, the source resistance is lowered, noise is reduced, and the RF signal is inputted to the source more efficiently. In this way, a single signal with low noise and no coupling circuit is required.
A mixer or modulation circuit using gates and FETs is realized.

To specifically implement the above basic circuit, we created a monolithic microwave integrated circuit (MMIC) equipped with an IF doubler signal amplifier and a matching circuit.

FIG. 2 is a circuit diagram of an MMIC: mixer or MMIC modulation circuit in an embodiment of the present invention.

This has a configuration in which a matching circuit 12 is added to the circuit shown in FIG. 1, and an IF amplifier 13 is further coupled to the receiving stage.

The RF multiplied signal and LO multiplied signal are efficiently input through the matching circuit 12 and mixed or modulated.

The signal is amplified by the IF amplifier I3 through the IPPLL matching circuit 12 and outputted through the matching circuit 12.

Its characteristics are shown below.

The measurement conditions were an RF multiplied signal with a frequency of 800MHz.
Input the magnitude of 20dBn+. As the signal of the adjacent channel (RF' signal), a frequency of 801 MHz and a size of -20d[3 m is input to the same input terminal as the RF multiplied signal.

The LO multiplied signal is +1 at a frequency of 700 MHz.
Input at a level of 0 dBm. At this time, the IF multiplied signal frequencies of 100 MHz and 99 MHz are output as adjacent channels.

A signal with a frequency of 101 M) Iz is also output at the same time, and this is third-order distortion. Normally, third-order distortion is an IF times signal of 10
It is expressed as a value indicating how much the signal is suppressed as a ratio of the magnitude to the 0MIIz signal.

In the conventional single gate FET mixer shown in FIG. 3, this value is a third-order distortion suppression ratio of 60 dB.

The conventional dual gate FET mixer shown in FIG. 4 also provides 60 dB.

Further, this value does not change even in a balanced configuration, and even in the conventional balanced mixer shown in FIG. 5, it is 6 ('dB).

However, in the mixer shown in FIG. 1 and the mixer MMIC shown in FIG. 2, which are embodiments of the present invention, this value is 70 dB.
- An improvement of 10 dB, or 10 times.

Cross-modulation distortion caused by the same cause as third-order distortion also has a power of 10
The cross-modulation distortion of the voltage display is improved by 20 dB.

Note that, as shown in Figure 6, single gate FETs must be connected continuously and the RF
Even if the multiplied signal is amplified by the ground-side FET and mixed by inputting the RF multiplied signal from the source side of the upper FET, the effect of the present invention will not be obtained, and under the above measurement conditions, the third-order distortion suppression ratio will be After all, it would be 60 dB. This is because the FET on the ground side works as an amplifier, and the third-order distortion generated there deteriorates the characteristics.

This circuit is similar to the conventional 4th Dual Game 1~.
It is basically the same as FET.

By the way, since the configuration of FIG. 6 does not improve third-order distortion, the double balanced mixer of FIG. 7, which has a conventional circuit configuration that is also used as a multiplier or mixer, similarly
The ground side FET is connected to the source side of the four FETs on the output side.
However, the third-order distortion is not improved, just like the circuit configuration shown in FIG. 6.

In the embodiments shown in Figures 1 and 2, the mixer is configured with a single single gate FET, but two of these FETs can be used to create a balanced mixer or a balanced modulation circuit, or a mixer with four FETs can be used. using.

Needless to say, it can be used as a double balanced mixer or a double balanced modulation circuit. At this time, in addition to third-order distortion, even-order distortion and the like are further improved.

It is also possible to input the LO multiplied signal from the source of a single gate FET and the RF multiplied signal from the gate, but this configuration does not improve third-order distortion and cross-modulation distortion at all.

(Effects of the Invention) As explained above, the field effect transistor circuit of the present invention has a configuration in which an RF multiplied signal is input from the source of a single gate FET, and an LO multiplied signal is inputted from the gate.
It is possible to provide a mixer or modulator that significantly improves third-order distortion and cross-modulation distortion, and has great practical effects.

[Brief explanation of drawings]

FIG. 1 is an embodiment diagram showing the basic circuit of the field effect transistor circuit of the present invention, and FIG. 2 is an M
A circuit diagram of a MIC mixer or MMIC modulation circuit. Figure 3 is a circuit diagram of a mixer or modulation circuit using a conventional single gate FET. Figure 4 is a circuit diagram of a conventional mixer or modulation circuit using a dual gate FET. Figure 5 is a circuit diagram of a field effect transistor circuit showing a conventional balanced mixer or balanced modulation circuit, Figure 6 is a circuit diagram of a conventional mixer or modulation circuit using two continuously connected FETs, and Figure 7 is a circuit diagram of a conventional field effect transistor circuit showing a balanced mixer or balanced modulation circuit. is a circuit diagram of a conventional double balanced mixer or double balanced modulation circuit. 1... Source, 2... Gate, 3... Drain, 4... RF signal input end, 5... L○ signal input end, 6... IF signal output end, 7... Filter, 8...Coupler, 9...First gate. IO・Second gate, 11... Phase inversion circuit (phase shifter), 12
...matching circuit, 13... IF amplifier. Patent applicant Matsushita Electric Industrial Co., Ltd. Figure 1 1... Source Figure 2 6 East Figure 5

Claims (1)

[Claims] A field effect transistor circuit characterized in that an RF signal is input from the source of the single gate field effect transistor, and a local oscillation signal is input from the gate to perform a mixing operation or a modulation operation.