JPS6373697U - - Google Patents
Info
- Publication number
- JPS6373697U JPS6373697U JP1986167673U JP16767386U JPS6373697U JP S6373697 U JPS6373697 U JP S6373697U JP 1986167673 U JP1986167673 U JP 1986167673U JP 16767386 U JP16767386 U JP 16767386U JP S6373697 U JPS6373697 U JP S6373697U
- Authority
- JP
- Japan
- Prior art keywords
- time
- circuit
- signal
- counter
- correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 238000005259 measurement Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
- Measurement Of Unknown Time Intervals (AREA)
Description
第1図は本考案の一実施例に係る多機能デジタ
ル時計の回路構成を示す図、第2図はタイムチヤ
ートである。
2…発振器、4…分周回路、10…秒カウンタ
、18…時刻カウンタ、26…付加機能回路、3
2…表示切換回路、34…デコーダ・ドライバ、
36…表示部、38…秒修正スイツチ、40,4
2…時刻修正スイツチ、44…モード切換スイツ
チ、54…選択用リングカウンタ、56…秒リセ
ツト回路、62…操作時間検出回路、72…時刻
修正回路、78…付加機能修正回路、88…クリ
ア回路。
FIG. 1 is a diagram showing the circuit configuration of a multifunctional digital watch according to an embodiment of the present invention, and FIG. 2 is a time chart. 2... Oscillator, 4... Frequency dividing circuit, 10... Second counter, 18... Time counter, 26... Additional function circuit, 3
2...Display switching circuit, 34...Decoder/driver,
36...Display section, 38...Second correction switch, 40,4
2... Time correction switch, 44... Mode changeover switch, 54... Ring counter for selection, 56... Second reset circuit, 62... Operation time detection circuit, 72... Time correction circuit, 78... Additional function correction circuit, 88... Clear circuit.
Claims (1)
、 該分周回路の出力信号を入力して時刻の秒桁を
カウントする秒カウンタと、 該秒カウンタの出力信号を入力して時刻の時・
分桁をカウントする時刻カウンタと、 時刻計時以外の機能を有する付加機能回路と、 モード切換スイツチと、 該モード切換スイツチの操作回数をカウントし
、そのカウント値に対応する異なるモード選択信
号を出力する選択用リングカウンタと、 前記時刻カウンタ及び付加機能回路の各出力信
号を入力し、前記モード選択信号に応答して前記
時刻カウンタあるいは付加機能回路のいずれか1
つの出力信号を選択して出力する表示切換回路と
、 該表示切換回路からの出力信号を表示信号に変
換するデコーダ・ドライバと、 該デコーダ・ドライバからの表示信号により表
示を行なう表示部と、 時刻の秒桁を修正するための秒修正スイツチと
、 時刻の秒桁以外の桁を修正するための時刻修正
スイツチと、 前記秒修正スイツチと時刻修正スイツチからの
操作信号と前記選択用リングカウンタからの付加
機能回路を選択するモード選択信号とを受けて、
前記付加機能回路に修正信号を供給する付加機能
修正回路と、 前記秒修正スイツチからの操作信号及び前記時
刻カウンタを選択するモード選択信号の存在を条
件に前記秒カウンタと分周回路をリセツトする秒
リセツト回路と、 前記秒修正スイツチからの操作信号及び前記時
刻カウンタを選択するモード選択信号の存在を条
件として前記秒リセツト回路から出力される信号
と前記分周回路からの出力信号とを入力して、カ
ウントを開始し、一定時間カウントすると信号を
出力する操作時間検出回路と、 該操作時間検出回路からの出力信号及び前記時
刻修正スイツチからの操作信号を受けて前記時刻
カウンタに修正信号を供給する時刻修正回路と、 前記操作時間検出回路からの出力信号の存在を
条件に前記時刻修正スイツチの操作信号の発生に
応答して、前記操作時間検出回路のカウント値を
クリアするクリア回路と、 からなることを特徴とする多機能デジタル時計。[Claims for Utility Model Registration] An oscillator that generates a reference signal, a frequency divider circuit that divides the frequency of the reference signal from the oscillator, and a second circuit that inputs the output signal of the frequency divider circuit and counts the second digits of the time. Input the output signal of the counter and the second counter to set the time.
A time counter that counts minute digits, an additional function circuit that has functions other than time measurement, a mode changeover switch, and a mode changeover switch that counts the number of times the mode changeover switch is operated and outputs a different mode selection signal corresponding to the counted value. a ring counter for selection, each output signal of the time counter and the additional function circuit is input, and in response to the mode selection signal, either one of the time counter or the additional function circuit is input.
a display switching circuit that selects and outputs one output signal; a decoder/driver that converts the output signal from the display switching circuit into a display signal; a display section that displays the display signal from the decoder/driver; and a time display. a second correction switch for correcting the second digit of the time, a time correction switch for correcting digits other than the second digit of the time, and operation signals from the second correction switch and the time correction switch and from the selection ring counter. Upon receiving the mode selection signal for selecting the additional function circuit,
an additional function correction circuit that supplies a correction signal to the additional function circuit; and a second control circuit that resets the second counter and the frequency dividing circuit on the condition that there is an operation signal from the second correction switch and a mode selection signal that selects the time counter. a reset circuit, and a signal output from the second reset circuit and an output signal from the frequency divider circuit on the condition that there is an operation signal from the second correction switch and a mode selection signal for selecting the time counter. , an operation time detection circuit that starts counting and outputs a signal after counting for a certain period of time; and an operation time detection circuit that receives an output signal from the operation time detection circuit and an operation signal from the time correction switch and supplies a correction signal to the time counter. a time adjustment circuit; and a clearing circuit that clears the count value of the operation time detection circuit in response to the generation of the operation signal of the time adjustment switch on the condition that an output signal from the operation time detection circuit exists. A multi-functional digital watch that features:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986167673U JPH041514Y2 (en) | 1986-10-31 | 1986-10-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986167673U JPH041514Y2 (en) | 1986-10-31 | 1986-10-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6373697U true JPS6373697U (en) | 1988-05-17 |
JPH041514Y2 JPH041514Y2 (en) | 1992-01-20 |
Family
ID=31099823
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986167673U Expired JPH041514Y2 (en) | 1986-10-31 | 1986-10-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH041514Y2 (en) |
-
1986
- 1986-10-31 JP JP1986167673U patent/JPH041514Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH041514Y2 (en) | 1992-01-20 |
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