JPS6120174B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a counting device with an electronic clock that counts the number of objects by manual operation.

Traditionally, for example, in transportation, when counting the number of passengers using a specific station, checking the number of group passengers, or counting the number of vehicles passing a specific point on a road, counting was done manually. A counting device is used. However, with conventional counting devices, each time a switch is operated, the count is incremented by 1, which causes the problem that if objects move quickly, the operation cannot keep up and accurate counting is not possible. It was hot. Furthermore, when a unit is made up of a plurality of objects, there is the inconvenience that the number of units must be counted and then multiplied by the numbers that make up the unit.

In addition, such a counting device becomes extremely convenient when combined with an electronic timepiece such as a wristwatch, but since it requires an operating switch for the electronic clock itself and an operating switch for the counting device, the device itself The disadvantage was that it became larger.

The present invention has been made in view of the above points, and by counting up an arbitrary set value every time a switch is operated, the present invention can be used when objects are flowing quickly or when the number of objects forming one unit is a predetermined number. To provide a counting device with an electronic clock that can perform counting operations reliably even in the event of an accident, and furthermore can be miniaturized.

The details of the present invention will be described below regarding a case where a counting device is incorporated into an electronic digital timepiece device. Figure 1 shows the configuration of the display section 1, showing "hours" and "minutes".
It consists of a time display section 2 for displaying seconds, a seconds display section 3 for displaying seconds in units of 10 seconds, and an AM/PM display section 4 for displaying morning and afternoon divisions. The seconds display section 3 is numbered 6 from "0" to "5".
These six display bodies 3a to 3f are sequentially driven to display in units of 10 seconds,
In addition to indicating how many tens of seconds the second time is, when functioning as a counting device as described later, it also displays a designated count-up unit.

Next, the schematic configuration of the circuit will be explained with reference to FIG. In FIG. 2, 11 is an oscillation circuit, and the output of this oscillation circuit 11 is the frequency division and timing circuit 1.
Sent to 2. This frequency division and timing circuit 12
divides the signal from the oscillation circuit 11 to generate a clock signal, a count signal, a clock pulse φe, etc., and sends the clock signal to the timer section 13 and the count signal to the counter counting section 14. Further, the clock pulse φe is sent to a control section 16 and a counter counting section 14, which will be described later. The outputs of the clock section 13 and counter counting section 14 are selected by a switching circuit 15 and sent to the display section 1. This display section 1 is configured as shown in FIG.
3 or the contents of the counter counting section 14. In Fig. 2, _S1 is a switch for specifying the content of time adjustment and the number of count-ups as will be described later, _S2 is a switch for switching between the clock function and counting function, and _S3 is for controlling the time adjustment and counting operation. Operation switch to do, each switch S ₁
The operation output of ~ _S3 is sent to the control section 16. This control section 16 outputs various control signals in response to the operation of switches _S1 to _S3 , and controls the time correction of the timekeeping section 13.
It performs count up control of the count counting section 14 and switching control of the switching circuit 15, and its details will be explained below together with the counter counting section 14 with reference to FIG. 3.

In FIG. 3, reference numeral 21 denotes a counter provided in the control section 16, which counts up sequentially by operating the switch _S1 , and each bit output thereof is sent to the decoder 23 directly and via inverters 22a to 22c. This decoder 23 also has a switch S ₂
The operation provides the outputs Q and Q of the binary flip-flop 24 which are inverted each time. The decoder 23 has output lines 25a to 25
d, 26a to 26f, and 27, and when the binary flip-flop 24 is reset, the output lines 25a to 25 are output according to the contents of the counter 21.
d is designated and the flip-flop 24 is set, the output lines 26a to 26f, 27 are designated according to the contents of the counter 21. The control section 16 also includes a one-shot circuit that generates one pulse signal in response to the operation output of the switch _S3 . This one-shot circuit consists of flip-flops 28, 29 and a flip-flop 28 that operate in synchronization with the clock pulse φe.
It consists of an AND circuit 31 which obtains an AND output for the output signal of the output signal and the signal output from the flip-flop 29 via the inverter 30, and the output thereof is applied to one input terminal of the AND circuits 32a to 32e, and the above-mentioned It is sent to the decoder 23.
The decoder 23 uses an AND circuit 3 for the output lines 25a to 25d specified by the counter 21.
Outputs the signal from 1. And this output line 2
The signals outputted to 5a to 25d are sent to the clock section 13 as time adjustment signals. That is, output line 2
The signal of output line 25b is a correction signal in units of "minutes", and the signal of output line 25d is a second clear signal. 13 and also sent to the counter 21 via the OR circuit 20 as a clear signal. On the other hand, output lines 26a to 26e
The signals outputted from the display unit 1 are sent to the display section 1 as drive signals for the display bodies 3b to 3f via the switching circuit 15 shown in FIG. That is, the signal on the output line 26a drives the display 3b to display, and the signal on the output line 26b
is the display body 3c, the output line 26c is the display body 3d, the output line 26d is the display body 3e, and the output line 26e is the display body 3
e are respectively driven to display. Further, the output line 26f is applied to the counter 21 via the OR circuit 20 to clear its contents, and is also applied to the counter counting section 14 as a clear signal. The signal output from the output line 27 of the decoder 23 is sent to the switching circuit 15 as a switching signal. Further, the signals output from the output lines 26a to 26e of the decoder 23 are applied to the other input terminals of the AND circuits 32a to 32e, respectively. That is, these AND circuits 32a to 32e are specified by the output of the decoder 23, and the output is applied to the AND circuits 41a to 41e in the counter counting section 14. Further, the output of the pulse generation circuit 42 is applied to the AND circuits 41a to 41e. This pulse generation circuit 42 includes, for example, first to fifth output terminals a to e, and the frequency division and timing circuit 12
In each period of the clock pulse φe shown in FIG.
From then on, different numbers of pulse signals are sequentially output as shown in FIGS. 4b to 4f. In other words, 1 from terminal a
Two pulse signals are output from terminal b, three pulses from terminal c, four pulses from terminal d, and five pulse signals from terminal e. The pulse signals outputted from the pulse generating circuit 42 are selected by the AND circuits 41a to 41e, and then sent to the counting circuit 44 via the OR circuit 43 and counted. The counting contents of this counting circuit 44 are as follows:
5 to the display section 1, and is switched and displayed on the time display section 2.

Next, the operation of the present invention configured as described above will be explained. Normally, the switching circuit 15 is switched to the clock section 13 side because the binary flip-flop 24 is in the reset state and the Q side output is "0", and the clock information in the clock section 13 is displayed on the display section 1. Sent and displayed. When the time is to be adjusted, switch _S1 is operated. Switch S ₁
When is operated once, the content of the counter 21 becomes "1" and the output line 25a of the decoder 23 is designated. When the switch _S3 is operated in this state, a pulse signal is output from the AND circuit 31 in response to the operation, and is sent to the decoder 23. At this time, since the output line 25a of the decoder 23 is designated as described above, the pulse signal from the AND circuit 31 is output from the output line 25a, and is sent to the timekeeping section 13 as a correction signal in units of "hour". The clock contents in units of "hour" count up sequentially in response to the operation of switch _S3 . Then, when the clock contents in the hour unit of the timer section ₁₃ match the correct time by operating the switch S3, the switch _S1 is operated again. By operating this switch _S1 , the content of the counter 21 becomes "2", and the output line 25b of the decoder 23 is specified, and then by operating the switch _S3 , the time is corrected in units of "10 minutes". . Next, the time is adjusted in minutes by operating switches _S1 and _S3 . Then, when the switch _S1 is operated, the content of the counter 21 becomes "4" and the output line 25d of the decoder 23 is designated. In this state, wait until the time reaches 0 seconds, and when the time reaches 0 seconds, operate switch _S3 . By operating this switch _S3 , the time measurement contents for "seconds" of the timer section 13 are cleared, and the contents of the counter 21 also become "0", and the counting operation of the counter section 13 is started from 0 seconds.

Therefore, in order to operate it as a counting device, switch _S2 is operated to switch the binary flip-flop 2.
Set 4. When this binary flip-flop 24 is set, its Q side output becomes "1", and the decoder 23 outputs the output lines 26a to 26f, 2
7 is specified. The switching circuit 15 is switched from the clock section 13 to the counter counting section 14 side by the signal outputted from the output line 27, and the contents of the counting circuit 44 are displayed. When the switch _S1 is operated in this state, the contents of the counter 21 are counted up sequentially. The contents of this counter 21 are decoded by a decoder 23, outputted from output lines 26a to 26e, and sent to the display section 1 via the switching circuit 15. The display bodies 3b to 3f in the result display section 1 are driven to display according to the contents of the counter 21. Further, the signals outputted from the output lines 26a to 26e of the decoder 23 are outputted from the AND circuits 32a to 32e.
Specify one of the following. Now, for example, Switch S ₃ 1
If the count is to be incremented by "3" for each operation, first operate switch _S1 three times to set the content of the counter 21 to "3" and set the output line 26 to "3".
c is specified, and the display body 3d is driven and displayed. The "1" signal output from the designated output line 26c is sent as a drive signal for the display element 3d of the display section 1 and is also applied to the AND circuit 32c. The above completes the count preparation, so
Next, when the switch _S3 is operated according to the object, one pulse signal having a period of the clock pulse φe is outputted from the AND circuit 31 in response to one operation of the switch _S3 , and sent to the AND circuits 32a to 32e. Added. At this time, the output of the AND circuit 31 is also sent to the decoder 23, but at this point the flip-flop 24 is set and the output lines 26a to 26f are
Since the side is designated, no signals are output from the output lines 25a to 25d. Therefore, when the output of the AND circuit 31 is applied to the AND circuits 32a to 32e, since the AND circuit 32c is specified by the output of the decoder 23 as described above,
A "1" signal is output from the AND circuit 32c, opening the gate of the AND circuit 41c. As a result, three pulse signals are outputted from the output terminal c of the pulse generation circuit 42 every cycle of the clock pulse φe as shown in FIG. 44 and counted. Thereafter, in the same manner, each time the switch _S3 is operated, the contents of the counting circuit 44 are counted up by "3". Further, by sequentially incrementing the setting contents of the counter 21 to "6", the output line 26f is designated and the contents of the counter 21 and the counting circuit 44 are cleared.

In the above embodiment, the counting circuit 44 is cleared when the setting content of the counter 21 reaches "6", but the counting circuit 44 can be cleared by other means, for example, by continuously turning on the switch _S3 for 2 seconds or more. 44 may be cleared. In this case, initially counter 2
Set 1 to "5" and set "5" every ₃ operations of Switch S
It is also possible to perform a counting operation in increments of 1, set the counter 21 to "1" halfway through, and perform a counting operation in increments of "1" every time the switch _S3 is operated. Further, the count-up value caused by one operation of the switch _S3 is not limited to this embodiment, and may be a large number such as "10", "20", or "100", and furthermore, this count-up value can be controlled externally. etc., and other circuits are not limited to this embodiment.

Further, in this embodiment, the count is counted up by a set value for each operation, but it is also possible to set a predetermined value in the counting circuit in advance and count down by the set value for each switch operation. Also, the counting circuit 44 does not count the number of input pulses, but for example, the input signal has a weight of "1", "2", "4", "8", etc.
It may be a BCD code and the BCD code may be calculated.

Further, in the above embodiment, a case has been described in which the counting circuit is combined with a clock, but it goes without saying that the counting circuit may be combined with an electronic desk calculator with an electronic clock.

As described above, according to the present invention, the count-up value can be arbitrarily set by one switch operation, so one count can be set according to the flow of objects or according to the unit number of objects. By setting the count-up value, it is possible to perform counting operations reliably even when the flow of objects is fast or when the number of objects constituting one unit is a predetermined number, and furthermore, the count-up value The device can also be made smaller because it serves both as a means for setting the time and a means for setting the input digits for time correction.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is a diagram showing the configuration of a display section, FIG. 2 is a circuit configuration diagram,
3 is a circuit configuration diagram showing details of the control section and counter counting section in FIG. 2, and FIG. 4 is a diagram showing the pulse output state of the pulse generation circuit in FIG. 3. 2... Time display section, 3... Second display section, 4...
AM/PM display section, 14... Counter counting section, 1
6...Control unit, 21...Counter, 23...Decoder, 42...Pulse generation circuit, 44...Counting circuit.

Claims (1)

[Claims] 1. A time counting means for counting a reference signal to obtain time information consisting of a plurality of time units, an optical display means for displaying the time information obtained by the time counting means, and one of the plurality of time units. a designation switch means for selecting and designating one time unit; a modification means for modifying the information of the time unit selected and designated by the designation switch means; In the counting device with an electronic clock, the counting circuit includes a counting circuit that sequentially counts the counted values of When the count value of the counting circuit is displayed on the optical display means, a plurality of settings are made for the predetermined count value to be counted according to one operation of the operation switch by operating the designated switch means. a count value setting means for selecting and setting a value from among the values; a display means for displaying a setting value selected and set by the count value setting means; a display means for displaying a setting value selected and set by the count value setting means; A counting device with an electronic clock, comprising a control means for causing the counting circuit to count in accordance with one operation of an operating switch.