JPS6373443A - Stall monitoring system - Google Patents

Abstract

PURPOSE:To monitor a stall even in the case of a power supply trouble of a central processing unit CPU by adding a power supply device different from that of the CPU to a stall monitor device and at the same time setting the monitor time via a service processor. CONSTITUTION:The power supply devices different from those of CPU11 and 12 are provided to the stall monitor devices 21 and 22. At the same time, the monitor time is set to the devices 21 and 22 via an external service processor 6. Both devices 21 and 22 holds each set monitor time and also replace the set value at fixed time intervals to inform the end of replacement to the processor 6 when the end of replacement is detected. Thus the processor 6 knows that the CPU has abnormality and carries out the necessary processing.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a stall monitoring system for information processing devices, and more particularly to a stall monitoring system that includes a stall monitoring device connected to each central processing unit.

(Prior Art) Conventionally, this type of stall monitoring device has been installed inside the central processing unit.

(Problems to be Solved by the Invention) The conventional stall monitoring device described above is installed inside the central processing unit and uses the same power source and the same clock as the central processing unit. Alternatively, if the central processing unit becomes inoperable due to a failure of the relevant clock, there is a drawback that the stall cannot be monitored.

An object of the present invention is to enable a central processing unit to issue an instruction to start/stop stall monitoring, and to provide the stall monitoring device with a power supply unit different from the central processing unit, so that an external service processor can issue an instruction to start/stop stall monitoring. By making it possible to set the monitoring time, holding the set value, updating the value at regular intervals from the set value, and notifying the service processor of the end of the update when the end of the update is detected, the above drawbacks can be overcome. It is an object of the present invention to provide a stall monitoring method configured to eliminate this problem and monitor stalls regardless of the operation of a central processing unit.

(Means for Solving the Problems) The stall monitoring system according to the present invention comprises one or more central processing units, a service processor, and one or more stall monitoring devices placed for each central processing unit. be.

In the above, the central processing unit is capable of instructing the stall monitoring device to start/stop monitoring.

On the other hand, the stall monitoring device consists of an independent power supply device, a register means for externally setting the monitoring time and holding the set value, and a value that changes the value at regular intervals from the set value in response to a monitoring start instruction from the central processing unit. and counter means for updating, detecting the end of the update, and notifying the service processor of the end of the update.

(Example) Next, the present invention will be explained with reference to an open view.

FIG. 1 is a block diagram showing an embodiment of the stall monitoring method according to the present invention. In Figure 1, 11
．． 12 is a central processing unit, 21 and 22 are stall monitoring devices, 31 and 32 are input/output control devices, 4 is a system control device, S is a main storage device, and 6 is a service processor.

In FIG. 1, central processing units 11 and 12 and input/output control units 3] and 32 access main storage unit 5 via system control unit 4. In FIG. The service processor 6 accesses the main storage device 5, the central processing unit 11.12, and the input/output control device 31.32 via the system control device 4. The stall monitoring devices 21 , 22 are each connected to the central processing unit 11 , 12 and also to the service processor 8 .

Figure @2 is a block diagram showing in detail the stall monitoring device 21, 22 of Figure 1. In FIG. 2, 10 is a clock oscillator, 11 is a power supply, 12 is an OR gate, 13 is a clip-flop, ]4 is an AND gate, IS is a counter, and 16 is a register.

In FIG. 2, the stall monitoring devices 21 and 22 include a clock oscillator lO, a power supply device 11, and a counter 1, respectively.
5, register 16, clip 70 knob 13, OR
It is composed of a gate 12 and an AND gate 14.

When the service processor 6 outputs a setting time signal via the signal line 202 and simultaneously outputs a setting instruction signal via the signal line 203, the monitoring time is set in the register 16. For example, if the monitoring time is 1 second and has an 8-bit configuration, the monitoring time will be from 1 second to 266 seconds, but this can be increased or decreased as necessary.

Next, when the stall monitoring start command is executed in the central processing units 11 and 12, a stall monitoring start instruction signal is outputted via the signal line 201. As a result, the flip-flop 13 is set and the output of the register 16 is set in the counter 15, and the output of the flip-flop 13 (on signal line 206) and the output of the clock oscillator (on signal line 205) are connected to , and the logical product of both is calculated here. The logical product instructs the counter 15 to count down via the signal line 207. The countdown continues for the period in which the flip-flop 13 is set to %11, but during this period, either the stall monitoring start instruction signal is output from the central processing unit 11.12 again, or the stall monitoring stop instruction signal is output. If not output via line 200, counter 15
When the value of is exhausted, a borrow signal is output, and an update completion signal is notified to the service processor 6 via the signal line 204.

At this time, the flip-flop 13 is also reset.

When instructing the central processing units 11 and 12 to stop stall monitoring, a stop instruction signal may be output to the signal line 200.

When the service processor 6 receives the update completion signal from the stall monitoring device, the processing on the central processing unit (for example, the central processing unit 11) connected to the stall monitoring device (for example, the stall monitoring device 21) is abnormal. software (operating system: 08) via another central processing unit (for example, central processing unit 12)
)Know the KA, use software to collect information about the system at that time, and ask them to leave clues to help uncover the cause of the stall.

(Effects of the Invention) As explained above, the present invention enables the central processing unit to issue an instruction to start/stop stall monitoring, and also provides the stall monitoring device with a power supply device different from the central processing unit. , the monitoring time can be set from an external service processor, the set value is retained, the value is updated at regular intervals from the set value, and when the end of the update is detected, the service processor is notified of the end of the update. This has the advantage that stalls can be monitored even in the case of a power failure or clock failure of the central processing unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the stall monitoring method according to the present invention. FIG. 2 is a block diagram showing an embodiment of the stall monitoring device shown in FIG. 1. 11.12... Central processing unit 2], 22... Stall monitoring device 31.32... Ota power control device 4... System control device 5... Main memory Device 6...Service processor 10, fist...φ clock oscillator 1]...power supply]2...urn...OR gate 33 a a a a #a clip 70 knob ]4・
. . . AND gate 15 - . . . Kakunta 16 . . . Register 101.102. ]11. ]12,200~207...
··Signal line

Claims (1)

[Claims] A stall monitoring method comprising one or more central processing units, a service processor, and one or more stall monitoring devices placed in each of the central processing units, wherein the central processing unit causes the stall monitoring device to monitor the stalls. The stall monitoring device includes an independent power supply device, register means for externally setting a monitoring time and holding a set value, and the central processing unit. and a counter means for updating the value from the set value at regular intervals in response to an instruction to start the monitoring from, detecting the end of the update, and notifying the service processor of the end of the update. A stall monitoring method featuring: