JPS60252961A - Program trouble supervisory device of information processing device - Google Patents

Abstract

PURPOSE:To prevent erroneous alarm display immediately after resuming of a program by masking output signal of a watchdog timer by a mask register set by a resuming signal. CONSTITUTION:When resuming a program interrupting a program in execution, a reset button of a device is depressed. The program is reset, and by releasing the reset button, a resuming signal S1 is generated at a point of time T1. The program starts running again, and an initial setting of the program is made. As the reset button is depressed by a man, it needs several seconds in some cases, and it is possible that an output signal S3 of the watchdog timer 1 is stopped and becomes ''0''. Accordingly, a mask register 2 is set by rising of the resuming signal S1, and an output signal S4 of ''1'' is applied from the mask register 2 to an OR circuit to make alarm operation impossible.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention provides a watchdog tie to prevent runaway programs executed in information processing devices including microprocessors and the like.
(Watch Dog Timer).

The present invention relates to a program failure monitoring device for an information processing device.

[Conventional technology]

Conventionally, in information processing devices using microprocessors and the like, a watched timer has been used to monitor runaway programs executed in mosquito devices, that is, failures that cause programs to no longer be executed in the correct order. The block configuration of the device in that case is shown in FIG. In the device shown in FIG. 3, watchdog timer 1. Microprocessor 11. ROM1 for storing programs etc.
A 2° working ORAM 13 and an I10 device 14 are interconnected via a path 15.

The microgrocer 11 sequentially reads and executes programs stored in the ROM 12. Timer 1 is a circuit that, upon receiving a program access signal from microprocessor 11 at its input terminal, continues to send out an output signal for a certain period of time, and stops sending out the output signal after a certain period of time has elapsed, and within the certain period of time. When the next access signal is received, the output signal continues to be sent for a certain period of time from the time of reception. Then, an alarm signal (warning signal) generated by stopping the output signal of the timer 1 indicates that there is a fault in the program.

In order to monitor failures such as program runaway, the program should be configured to send an access signal to timer 1 at regular intervals, even if the time measured by watchdog timer 1 is short, to keep updating timer 1. Just create one. As a result, as long as the output signal of timer 1 continues to be sent out, the program is operating normally. When the output signal was stopped, the access signal that was supposed to be generated every Ll constant period was not generated, so it can be determined that a problem such as a program runaway has occurred.

[Problem that the invention seeks to solve]

When you turn on the information processing device, or when you use the reset button, etc. to start (resume) a program running on the device,
Initial settings of the program, such as a memory all clear instruction, an I10 code zero setting instruction, etc. are executed. Since no access signal is sent to the watchdog timer while this initial setting is being performed or while the reset button is being pressed, the output signal from the timer is stopped and an alarm is not displayed during this time. There is a possibility that

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention uses a watchdog timer to monitor runaway of a program executed in an information processing device including a processor. In a program failure monitoring device for an information processing device, a mask register that is set and reset by a program restart signal and reset after receiving a program access signal to a watchdog timer, and a mask register that is reset after receiving a program access signal to a watchdog timer; The present invention is characterized by comprising a gate circuit that masks the good news signal according to the output signal of the mask register. A program failure monitoring device for an information processing device is provided.

[Effect]

The alarm signal based on the output signal of the watchdog timer is masked by the mask register being set by the resume signal. Then, the mask register is automatically reset by an access signal to the watched timer or after a certain period of time has elapsed, and the mask of the alarm signal is released. This prevents false alarms from being issued after the program is restarted and before the periodic access signal is generated.

〔Example〕

FIG. 1 shows a program failure monitoring device for an information processing device as an embodiment of the present invention. In FIG. 1, a program access signal S2 is input to the watchdog timer 1 from the i microgross processor via a terminal 4, and its output signal S3 is input to one input terminal of an OR circuit 3. .

The mask register 2 is composed of a solip-frozzo circuit, and the above-mentioned access signal S2 is inputted to its reset input terminal, and the restart signal S1 generated at the start of the program is inputted to its set input terminal via a terminal 5.

The output signal S4 of the mask regimen 42 is input to the other input terminal of the OR circuit 3, and the output terminal of the OR circuit 3 sends out an alarm signal S5 via the terminal 6, thereby generating an alarm warning of a fault in the siprogram. Display is performed.

The operation of the apparatus of FIG. 1 will now be described with reference to FIG. FIG. 2 is a diagram showing the waveforms of signals 81 to S5 in each part of the device shown in FIG. 1 when the program is restarted;
) is the restart signal S1, (b) is the access signal S2, (
C) shows the output signal S3 of the timer 1, (d) shows the output signal S4 of the U mask register 2, and (e) shows the alarm signal S5.

When the program is being executed normally, the access signal S2 continues to be input to watchdog timer 1 at a cycle shorter than the fixed time measured by the timer (for example, 1 second), so the timer 1 remains at the "1" level. The output signal s3 continues to be sent out. Therefore, the alarm signal S5 output from the OR circuit 3 is at the "1" level, and no alarm display is performed.

If a problem such as runaway occurs in the program, the access signal S2 is stopped, and the output signal S3 of the timer 1 eventually becomes a "0" level. Since the mask register 2 is in the reset state, its output signal S4 is at "0"level;
Therefore, the OR circuit 3 outputs an "O" level alarm signal s.
5 is output and an alarm is displayed.

Next, a case will be described in which a program being executed on the device is stopped and the program is restarted. By pressing the reset button on the device, the program is reset, and by releasing the methane, a restart signal S1 is generated at time T1 to start the program running again and initialize the program.

Since this reset button is pressed by a human, it may take several seconds, and the initial setting of the program may take several hundred milliseconds, so it takes a long time for the reset button to be pressed before the regular access signal S2 is generated. , there is a possibility that the output signal S3 of the dog-dog timer 1 is stopped and becomes "0".

Such a case is shown in FIG. 2(c).

Therefore, the mask register 2 is set at the rising edge of the restart signal S1, and the output signal S4 of "1" is applied from the mask register 2 to the OR circuit 3. As a result, the alarm signal output from the fiOR circuit 3 becomes "1" and no alarm operation is performed. When the access signal S2 is periodically generated at time T2 by the program, the timer 1 is updated by this access signal 82 and always sends out the output signal S3 of "1", and the OR circuit 3 alarm signal S5 is also “1
”.

Since the mask register 2 is reset (by the access signal S2 generated at time T2) and the output signal S4 becomes "0", from now on, when the output signal S3 of the timer 1 falls to "0", the output signal from the OR circuit 3 is reset. The alarm signal s5 of "0" is output and an alarm operation is performed. The mask register 2 is thus busy masking the occurrence of the alarm signal s5 between times T1 and T2.

Various modifications are possible in implementing the invention. For example, in the device shown in FIG. 1, a flip-flop circuit is used as a mask register, but the invention is not limited to this. For example, a monostable multivibrator circuit that is activated by a restart signal can be used, and its output and pulse time width can be programmed. If the time period from when the program is restarted until the access signal is generated is made sufficiently long, it is possible to prevent false alarm display after the program is restarted, as described above.

〔Effect of the invention〕

According to the present invention, since the output signal of the watched timer can be masked by the mask register set by the restart signal, it is possible to prevent erroneous alarm display immediately after restarting the program.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a program failure monitoring device for an information processing device as an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part of the device shown in FIG. 1, and FIG. 3 is a schematic diagram of a conventional device. This is a professional drawing. DESCRIPTION OF SYMBOLS 1... Watchdog timer, 2... Mask register, 3... OR circuit, 11... Microprocessor, 12... ROM, l 3... RAM, 14...
... Engineering equipment, 15... - Nonosu Patent applicant Fujitsu Limited Patent agent Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney 1) Yukio Patent attorney Akiyuki Yamaguchi Figure 1 1 #J2Figure 1 TI T2 Figure 3

Claims (1)

[Claims] 1. A watchdog timer is used to monitor runaway of a program executed in an information processing device including a processor. In a program failure monitoring device of an information processing device, the watchdog is set by the program restart signal.
It is characterized by comprising a mask register that is reset after receiving a program access signal to the timer, and a gate circuit that masks an alarm signal based on the output signal of the watchdog timer according to the output signal of the mask register. . A program failure monitoring device for information processing equipment. 2. The apparatus of claim 1, wherein the mask register is a frizzofrog circuit that is reset by a program access signal. 3. The device according to claim 1, wherein the mask register is a SET, TRI, RISE, TC type flip-flop circuit.