JPS6373342A - Program debug device - Google Patents

Abstract

PURPOSE:To improve the efficiency of a debug by providing a debug information control set part which sets whether the output of debug information is necessary or not and a storage decision part which decides whether the storage integration of the debug information is necessary or not. CONSTITUTION:A trace output instruction is inserted into a check point where trace information is wanted to be obtained and the debug control set part 6 sets the control information for executing the decision whether it is necessary information for the debug or not. By executing an initializing instruction an initializing control part 5 initializes a storage part 2. By executing a debug objective program, every time the trace output instruction passes the check point the trace output instruction signal is obtained and the trace information is obtained via an output control part 4. A storage decision part 7 decides whether it is necessary or not as the debug information and integrates the debug information in the storage part 2 in case of being decided that it is necessary.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a device for debugging a computer program, and particularly to control of a trace function of debug information.

[Conventional technology]

FIG. 3 shows, for example, a conventional program debugging device disclosed in Japanese Unexamined Patent Publication No. 57-6946.
fl+ is a clock unit that generates time, (2) is a debug information storage unit, (3) is an input control unit that transfers depack information in the storage unit (2) to the processor in response to an input command from the processor, and (4) is a processor an output control unit (5) that transfers debug information to the storage unit (2) according to an output command from the
is an initialization control unit that initializes the storage unit (5).

Next, the operation will be explained. First, the initialization control section (5)
initializes the storage unit (21) according to the initialization signal from the processor.The output control unit (4) outputs the time generated by the clock unit (1) as debug information by the trace output command signal incorporated in the program on the processor. The checkpoint position and trace contents output from the processor are accumulated in the storage unit (2).

The input control section (3) transfers the debug information accumulated in the storage section (2) to the processor according to an input command signal from the processor.

The procedure for debugging a program using the apparatus shown in FIG. 3 is to first insert a trace output command into a checkpoint of the program to be debugged.

Next, an initialization instruction is executed to initialize the storage section (2), and then the program to be debugged is executed, so that debug information is accumulated in the storage section (2) every time a checkpoint is passed. Storage unit after program execution (2)
Debug information can be obtained by reading the contents of the file using an input command.

[Problem that the invention seeks to solve]

Conventional program debugging devices are configured as described above, so that debugging information is not output when debugging is completed and debugging information is no longer needed at certain checkpoints in the program debugging process. In this case, the trace instruction inserted at the checkpoint of the program must be deleted, and when debugging is required again, the trace output instruction must be inserted again to obtain debugging information, and the program to be debugged must be deleted. There was a problem that debugging efficiency was poor because trace output instructions had to be inserted or deleted.

This invention was made in order to solve the above-mentioned problems, and when the debugging of a program is completed and the debugging information is no longer needed, the trace output instruction inserted at the checkpoint of the program to be debugged is not deleted. To provide a program debugging device which can not output debugging information and can obtain debugging information without injecting all trace output instructions into a program to be debugged when trace information is needed.

[Means for solving problems]

The program debugging device according to the present invention includes a debug control information setting section as a means for setting whether debug information is necessary for a program, and determines whether or not to store and accumulate debug information based on the set control information. Memory judgment department as a means? By providing this, debug information can be controlled.

[Effect]

In this invention, whether or not to output debug information is set in the debug information setting section, and whether or not this setting information and the debug information output by the trace output instruction are to be accumulated in the storage section is determined by the trace output command signal or check. Determination is made based on the point number, and debugging information that is no longer needed is not stored and accumulated.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) to (5) are equivalent to the conventional ones with the same reference numerals in FIG. 7) determines whether the debug information set by the debug control information input unit (6) is necessary or not, as a trace output signal obtained from the output control unit (4) or debug information such as checkpoint NO, and stores it in the storage unit (2). ) is a debug information storage determination unit that determines whether or not the debug information is to be accumulated in the debug information storage.

Next, the operation will be explained. The procedure for debugging a program using the apparatus shown in FIG. 1 is to first insert a trace output command into a checkpoint from which trace information of the program to be debugged is desired. Next, the debug control information setting unit (6) sets control information for determining whether the trace information is information necessary for debugging. Next, by executing the initialization instruction, the initialization control section (5) obtains an initialization signal from the processor and initializes the storage section (2).

Next, by executing the program to be debugged, a built-in trace output command signal is obtained every time the program passes a checkpoint, and trace information is obtained via the entire output control section (4). Next, the storage judgment unit (
7), and if it is determined that the debug information is necessary, the debug information is accumulated in the storage unit (2). If it is determined that this debug information is unnecessary, this debug information is not accumulated in the storage unit (2).

After the program execution is completed, the input control unit (3)
) The debug information can be obtained by reading out the debug information accumulated in the processor using an input command and transferring it to the processor.

FIG. 2 shows an example of debug information obtained using the apparatus according to the present invention.

〔Effect of the invention〕

As described above, according to the present invention, there is provided a debug information control setting section that sets whether or not output of debug information is necessary, and a storage determination section that determines whether or not storage and accumulation of debug information is necessary. It is no longer necessary to delete the trace output instruction of the program to be debugged, and when tracing is needed again, there is no need to insert a new trace output instruction, allowing for efficient debugging. This has the effect of making it possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an example of debug information obtained using the apparatus according to the present invention, and FIG. 3 is a block diagram showing a conventional embodiment. In the figure, (1) is the clock section, (2) is the storage section, and (3)
is an input control section, (4) is an output control section, (5) is an initialization control section, (6) is a debug control information setting section, and (7) is a storage determination section. Note that in each figure, the same reference numerals indicate the same parts.

Claims (1)

[Claims] a time section for generating a time; a storage section; means for storing trace contents and the time at which the trace output instruction occurred in the storage section according to a trace output instruction from a program on the processor; The device includes: means for transferring the contents of the storage section to the processor; means for setting whether trace contents from the processor are necessary as debug information; and means for determining whether to store the trace contents in the storage section. A program debugging device characterized by: