JPS6372145A - Integrated circuit device - Google Patents

Abstract

PURPOSE:To enable good-yield formation of an IC card on which a plurality of ICs are mounted, by composing the whole device of the first module, on which integrated circuits are, mounted in the plural number smaller than the whole number, and the second module which are composed of a plurality of the first modules connected with each other. CONSTITUTION:A plurality of ICs 1 to 4 are mounted on a substrate 5. Output terminals 6 are disposed on the substrate 5. These output terminals 6 are arranged at intervals larger than the intervals at which output terminals 7 of ICs 1 to 4 are arranged. Therefore the output terminals 7 of each IC are connected to the output terminals 6. Because each one of the output terminals 7 of the IC is approximately 100muX100mu in size, it finds difficult to provide 50mu or more for mutual positioning accuracy between these ICs 1 to 4 mounted on the substrate 5. Therefore the IC output terminals 7 ere arranged all ever the surface of the ICs and so the mutual connection between ICs can be facilitated. Hence, two steps in this module composition enable an IC card to be improved in its yield.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an integrated circuit device equipped with a plurality of semiconductor integrated circuits, which is commonly called an IC card, for example.

(Prior Art) In IC cards equipped with a plurality of integrated circuits (hereinafter referred to as ICs), the yield rate decreases as the number of ICs increases.

In other words, if the yield of one IC is now 90%, then the yield of 2 ICs is 90%.
The yield is 81% with 10 ICs, but 22% with 10 ICs.
However, in the case of 20 pieces, the yield is actually 4%, which is a meaningless figure from an industrial perspective.

This can ensure a practical yield for cards that use one memory IC and one CPU IC among IC cards, but for cards that use many memory ICs, This shows that the yield is poor and it is not practical.

(Problems to be Solved by the Invention) The present invention provides an IC card structure that allows the production of such IC cards with a plurality of ICs at a high yield.

[Structure of the invention]

(Means for solving the problems and their effects) In the present invention, the number of ICs mounted on one board is N,
Focusing on the fact that if the yield of an individual IC is P, then the yield of the board on which the IC is mounted is the key, first select N such that pN is 0.9 or more for the IC as the first module. IC
Equipped with

That is, if we now set P = 0.95 and N as 4, then pN = 0
．． 902>0.9 is satisfied.

The yield of such a first module is 90%, so if 100 are manufactured, 10 ICs will be discarded as defective. The yield of the original IC itself was 95chi, so
The number of ICs that are good but thrown away is 95 90 chips = 5 chips.

Now, if the number of ICs mounted on one IC card is M, the yield of the IC card obtained by inspecting the ICs after all the ICs are mounted is pM.

Now, if M = 20, PM = 0.04, and the number of ICs that are not defective and are thrown away is 95-4 to 91%, which means that most ICs are thrown away even though they are not defective. .

Now, looking at the yield of the N=4 module mentioned earlier, it is 90.
Therefore, if you add these 5 modules together, the total number of ICs will be 20.

Since each module is generally inspected, the rate of further increase in defects is extremely close to zero.

Therefore, five tested first modules are combined. The yield of the second module is 100%,
Overall, the yield is 90% of the yield of the first module.
becomes.

Therefore, in this case, the number of good ICs that are discarded is 95% - 5% = 5%, which is a significant improvement in yield compared to the case where all 2Q ICs are mounted as one module.

To express it more accurately, if the yield when mounting a plurality of modules is q, then the yield of the second module assembled using the module of formula 1 is q, pN. Now, if N→l, this value becomes the maximum.

Inspection time is minimized.

Therefore, the best relationship between N and M is determined based on economic balance.

First, the loss caused by N being too large is now P=0.95. M=20. b=3000. a=60
When 0, the cost is minimum when N=4.

On the other hand, if N=20, the loss will be 56,400 yen.

As described above, it is economically meaningful to test once using the first module.

For this reason, the present invention provides an IC card structure that is formed in two stages.

In the present invention, the first module has approximately 3 to 6 I/O modules.
C on the same board.

These modules are then connected.

(Example) The present invention will be explained in detail below.

In Figure M1, a plurality of workpieces C1 are mounted on the board 5. Here, an output terminal 6 is arranged on the substrate 5. The output terminals 6 are arranged at a coarser pitch than the output terminals 7 of the ICs 1 to 4. This situation is shown in FIG. For this reason, the output terminal 7 of each IC is wired to the output terminal 6 like M3.

This means that the output terminal 7 of one IC is approximately 100μ×10
Although it is 0μ, if 4 is mounted on the ICI above the board 5,
This is because it is difficult to make the mutual positional accuracy of these ICs 50μ or more, so by arranging the output terminals 7 of the ICs over the entire surface of the ICs, mutual connection can be facilitated.

'After the pads arranged in this manner are arranged as shown in FIG. 4, these pads are connected by an interconnection board 10.

This mutual wiring board may be a board with a pattern formed in advance, such as a flexible board, or it may be something like printed wiring that is connected to each other after the first modules are arranged.

〔Effect of the invention〕

In this way, the two-stage module configuration not only improves yield, but also allows mutual alignment accuracy to be optimized according to each process. That is, in the first module,
Using thin film technology and photolithography, it is possible to extract lead wires with an accuracy on the order of 10 μm for an IC output pad size of 100 μm, and the lead terminals taken out from this can be extracted with an accuracy of 10 μm. By rearranging the pads, the connection accuracy between modules can be improved by Q, l t
trx or so, and therefore it is possible to connect modules by flexible cables or by printing with organic paste.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing a part of the embodiment of the present invention, FIG. 2 is a plan view showing a part of the embodiment of the invention, and FIG. 3 is a plan view showing the main parts of the first module. FIG. 4 is a plan view showing the entire embodiment of the present invention. 1.2, 3, 4... integrated circuit, 5... first module -
6... Output terminal (connection terminal), 7... IC output terminal, 10... Mutual wiring board, 20... IC card (second module tool).

Claims (6)

[Claims] (1) In a device configured by mounting a plurality of integrated circuits, a first module configured by mounting a plurality of integrated circuits smaller than the total number of the device configured by the plurality of integrated circuits. , this first module, and this first module.
An integrated circuit device characterized in that the entire device is constituted by a second module formed by interconnecting a plurality of modules. (2) The integrated circuit device according to claim 1, wherein the integrated circuit is a memory IC. (3) The integrated circuit device according to claim 1, wherein the plurality of integrated circuits constituting the first module all have the same circuit configuration. (4) The integrated circuit device according to claim 1, wherein the plurality of integrated circuits constituting the first module all have the same structure. (5) The integrated circuit device according to claim 1, wherein the circuit connecting the first modules is flexible. (6) a pad larger than the pad disposed on the at least one integrated circuit at the output terminal of the first module;
The integrated circuit device according to claim 1, characterized in that a wide spacing between pads is provided.