JPS637164A - Nonconduction detector for thyristor - Google Patents

Nonconduction detector for thyristor

Info

Publication number
JPS637164A
JPS637164A JP14967086A JP14967086A JPS637164A JP S637164 A JPS637164 A JP S637164A JP 14967086 A JP14967086 A JP 14967086A JP 14967086 A JP14967086 A JP 14967086A JP S637164 A JPS637164 A JP S637164A
Authority
JP
Japan
Prior art keywords
thyristor
output
light
circuit
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14967086A
Other languages
Japanese (ja)
Other versions
JPH0614783B2 (en
Inventor
Keiji Maeda
前田 啓二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14967086A priority Critical patent/JPH0614783B2/en
Publication of JPS637164A publication Critical patent/JPS637164A/en
Publication of JPH0614783B2 publication Critical patent/JPH0614783B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Power Conversion In General (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To effectively prevent a nonconduction detector for a thyristor from erroneously detecting by judging that the detector has no malfunction and the thyristor is nonconductive on conditions that a photodetector receives the light of a light emitting element for intermittently emitting a light synchronously with the specific period of an AC power source to produce an output. CONSTITUTION:When a light emitting element 7 intermittently emits light in response to the repetition of conduction and nonconduction of a thyristor 2 synchronous with the specific period of an AC power source 1, counters 11, 12 are alternately reset by the output change of the photodetector 9 which receives the light. At this time, the output of an AND circuit 14 is '1'. When any of components 3-10 becomes defective, the photodetector 9 cannot receive the light, and the counter 11 or 12 is not reset. When the counted value of the counter 11 or 12 becomes a predetermined value or more, the output of the AND circuit 14 is intermittently interrupted to judge the malfunction.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はサイリスタの非導通検出器に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a non-conduction detector for a thyristor.

〔従来の技術〕[Conventional technology]

第3図は例えば実開昭53−81557号公報に示され
た従来のサイリスタ非導通検出器を示す概要図であシ、
図において、1は交流電源、2はサイリスク、3は固定
抵抗器、6はダイオード、7は発光素子、8は光ファイ
バ、9は受光素子である。
FIG. 3 is a schematic diagram showing a conventional thyristor non-conduction detector disclosed in, for example, Japanese Utility Model Application Publication No. 53-81557.
In the figure, 1 is an AC power supply, 2 is a silice, 3 is a fixed resistor, 6 is a diode, 7 is a light emitting element, 8 is an optical fiber, and 9 is a light receiving element.

次に動作について説明する。サイリスタ2が導通したと
きは該サイリスタによって固定抵抗器3と発光素子7の
直列回路が短絡され該発光素子は発光しない。そして、
サイリスタ2が不導通になると、交流電源1の出力電圧
は上記直列回路に印加され、発光素子7が発光する。こ
の発光素子7、からの光を光ファイバ8を介して受光素
子9に導入することによシ、受光素子9からサイリスタ
2が不導通であることを示す検出信号を得るものである
Next, the operation will be explained. When the thyristor 2 is conductive, the series circuit of the fixed resistor 3 and the light emitting element 7 is short-circuited by the thyristor, and the light emitting element does not emit light. and,
When the thyristor 2 becomes non-conductive, the output voltage of the AC power supply 1 is applied to the series circuit, and the light emitting element 7 emits light. By introducing light from the light emitting element 7 to the light receiving element 9 via the optical fiber 8, a detection signal indicating that the thyristor 2 is non-conducting is obtained from the light receiving element 9.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のサイリスタネ導通検出器は以上のように構成され
ているので、例えば受光素子を含む受光部が光を受光し
ていないにもかかわらず受光している状態に故障した場
合には、サイリスタの導通。
Conventional thyristor conduction detectors are configured as described above, so if, for example, the light receiving section including the light receiving element fails in a state where it is receiving light even though it is not receiving light, the thyristor continuity detector is configured as described above. Continuity.

非導通に無関係に非導通であると誤検出するという問題
点があった。
There is a problem in that non-conduction is erroneously detected regardless of non-conduction.

この発明は上記のような問題点を解消するためになされ
たもので、交流電源の周期に同期して継続することを条
件に、検出器に異常がなく、サイリスタが非導通である
と誤まシなぐ判断するサイリスタ非導通検出器を得るこ
とを目的とする。
This invention was made to solve the above-mentioned problems, and on the condition that it continues in synchronization with the cycle of the AC power supply, it can be mistakenly assumed that there is no abnormality in the detector and that the thyristor is non-conducting. The purpose of the present invention is to obtain a thyristor non-conduction detector that determines when the signal is off.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係るサイリスタ非導通検出器は、サイリスタ
と並列接続した発光素子の光を受光する受光素子と、ク
ロックパルスの計数値がある値以上になると出力し、か
つ、前記受光素子の出力I01でリセットされる第1の
カウンタと、クロックパルスの計数値がある値以上にな
ると出力し、かつ、前記受光素子の出力”1”でリセッ
トされる第2のカウンタと、前記第1、第2のカウンタ
出力を論理するOR回路と、このOR回路の出力と前記
受光素子の出力を論理するAND回路とを具備したもの
である。
The thyristor non-conduction detector according to the present invention includes a light receiving element that receives light from a light emitting element connected in parallel with the thyristor, and outputs an output when the count value of clock pulses exceeds a certain value, and outputs an output I01 of the light receiving element. a first counter that is reset; a second counter that is output when the count value of clock pulses exceeds a certain value; and that is reset when the output of the light receiving element is "1"; The device includes an OR circuit that logics the counter output, and an AND circuit that logics the output of this OR circuit and the output of the light receiving element.

〔作 用〕[For production]

この゛発明における第1.第2のカウンタは、交流電源
の特定周期に同期して継続する受光素子の出力により、
計数値がある値以上になる前にリセットされるため、出
力が零に維持され、OR回路の出力も零となる。このた
め、サイリスタの非導通で発光素子が発光したときは、
受光素子の出力を受けてAND回路の出力がI 1 m
となυ、サイリスク非導通検出器が正常であシ、かつ、
サイリスタが非導通であると誤まりなく判断する。
First in this invention. The second counter is activated by the output of the light receiving element that continues in synchronization with a specific cycle of the AC power supply.
Since it is reset before the count value exceeds a certain value, the output is maintained at zero, and the output of the OR circuit also becomes zero. Therefore, when the light emitting element emits light due to non-conduction of the thyristor,
After receiving the output of the light receiving element, the output of the AND circuit is I 1 m
Tona υ, Cyrisk non-continuity detector is normal, and
To accurately determine that a thyristor is non-conducting.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。前記
第3図と同一部分に同一符号を符した第1図において、
4.5は固定抵抗器、6−1〜6−4はダイオード、1
0はクロックパルス発振器、11はクロックパルス発振
器10からのクロックパルスを計数し計数値がある値以
上になると信号を出力し、R端子の入力信号が零になる
とリセットされる第1のカウンタ、12はクロックパル
ス発振器10からのクロックパルスを計数し計数値があ
る値以上になると信号を出力し、R端子の入力信号が零
になるとリセットされる第2のカウンタ、13は第1.
第2のカウンタ11,12の出力を入力するOR回路、
14はOR回路13の出力を否定端子に受光素子9の出
力を他の端子に入力するかの回路である。
An embodiment of the present invention will be described below with reference to the drawings. In Fig. 1, in which the same parts as in Fig. 3 are given the same reference numerals,
4.5 is a fixed resistor, 6-1 to 6-4 are diodes, 1
0 is a clock pulse oscillator, 11 is a first counter that counts clock pulses from the clock pulse oscillator 10, outputs a signal when the counted value exceeds a certain value, and is reset when the input signal of the R terminal becomes zero; 12 13 is a second counter which counts clock pulses from the clock pulse oscillator 10 and outputs a signal when the counted value exceeds a certain value, and is reset when the input signal at the R terminal becomes zero;
an OR circuit that inputs the outputs of the second counters 11 and 12;
14 is a circuit for inputting the output of the OR circuit 13 to a negative terminal and the output of the light receiving element 9 to another terminal.

第2図は上記第1図の動作を説明するためのタイムチャ
ート図で、第2口伝)において、eは交流電圧波形、f
、gは発光素子7が発光しなくなる電圧レベルを示す。
Figure 2 is a time chart diagram for explaining the operation of Figure 1 above. In the second oral history), e is an AC voltage waveform, f
, g indicate the voltage level at which the light emitting element 7 stops emitting light.

第2図(b)は電圧レベルf2gに従い発光素子が発光
している期間を1ハイ”とし、g<e<fの間は10つ
”となることを示している。
FIG. 2(b) shows that the period during which the light emitting element emits light according to the voltage level f2g is 1 high", and when g<e<f, the period is 10".

この第2図(b)に示す信号が第1.第2のカウンタ1
1.12の計数値は第2図(c) 、 (d)のように
変化する。
The signal shown in FIG. 2(b) is the first signal. second counter 1
The count value of 1.12 changes as shown in Figure 2 (c) and (d).

次に動作について説明する。サイリスタ2が交流電源1
の特定周期に同期して導通、非導通を繰返すことに対応
して、発光素子7が断続的に発光すると、この光を受け
た受光素子9の出力変化によって第1.第2のカウンタ
11.12が交互にリセットされる。このため、第1.
第2のカウンタ11.12はいずれもその計数値がある
値以上を越えることはない。
Next, the operation will be explained. Thyristor 2 is AC power supply 1
When the light emitting element 7 emits light intermittently in response to repeating conduction and non-conduction in synchronization with a specific cycle of the first . The second counters 11,12 are reset alternately. For this reason, 1.
The second counters 11, 12 never exceed a certain value.

従って、OR回路13の出力は”0”であシ、サイリス
タ2が非導通となって発光素子7が発光し、その光を受
けた受光素子9の出力が11゛となることにより、AN
D回路14の出力がI+ 11となり、サイリスタ非導
通検出器が正常であシサイリスタが非導通であると誤な
シなく判断できる。
Therefore, the output of the OR circuit 13 is "0", the thyristor 2 becomes non-conductive, the light emitting element 7 emits light, and the output of the light receiving element 9 that receives the light becomes 11'.
The output of the D circuit 14 becomes I+11, and it can be determined without error that the thyristor non-conduction detector is normal and the thyristor is non-conductive.

−方、第1図の構成部品3〜lOのいずれかに故障など
の不具合が発生すると、例えば、光ファイバ8が断線す
ると受光素子9は光を受光できず該受光素子の出力は常
10”となる。このため、第2のカウンタト2はリセッ
トされることがなくな9、その計数値はある値以上にな
る。
On the other hand, if a malfunction such as a failure occurs in any of the components 3 to 10 in FIG. Therefore, the second counter 2 is not reset 9 and its count value exceeds a certain value.

また、上記とは反対に、受光素子9に故障が生じ(たと
えば、光を受けていないにもかかわらず受光している状
態の故障)該受光素子の出力を連続して@1″としてし
1つだ場合には、第1のカウンタ11はリセットされる
ことがなくなシ、その計数値はある値以上になる。
Also, contrary to the above, if a failure occurs in the light receiving element 9 (for example, a failure occurs in a state in which it is receiving light even though it is not receiving light), the output of the light receiving element is continuously set to @1''. In this case, the first counter 11 is not reset and its count value exceeds a certain value.

上記のように第1.第2のカウンタ11.12の一方ま
たは双方の計数値がある値以上になると、OR回路13
に出力が生じAND回路14には連続して出力が生じな
くなる。そこで、上記OR回路13の出力を利用するか
、AND回路14の出力が連続して生じないことから、
サイリスタ2が導通している、もしくは、サイリスタ非
導通検出器に異常があると判断することができる。
As mentioned above, the first. When the counted value of one or both of the second counters 11 and 12 exceeds a certain value, the OR circuit 13
An output is generated in the AND circuit 14, and no output is generated continuously in the AND circuit 14. Therefore, the output of the OR circuit 13 may be used, or since the output of the AND circuit 14 is not generated continuously,
It can be determined that the thyristor 2 is conducting or that there is an abnormality in the thyristor non-conducting detector.

なお、上記実施例では発光素子、光ファイバ。Note that in the above embodiments, the light emitting element and the optical fiber are used.

受光素子を設けたものを示したが、これらの代夛に7オ
ト・カプラーを設けてもよい。また、上記実施例では単
相回路を示したが、3相全波整流回路の各サイリスタの
非導通検出器としても上記実施例と同様の効果を奏する
Although a light-receiving element is shown, a 7-oto coupler may be provided in place of these elements. Further, although a single-phase circuit is shown in the above embodiment, the same effect as in the above embodiment can be obtained even as a non-conduction detector for each thyristor of a three-phase full-wave rectifier circuit.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、受光素子が交流電源
の特定周期に同期して断続発光する発光素子の光を受け
て出力することを条件に、検出器に異常がなく、サイリ
スタが非導通であると判断するように構成したので、サ
イリスクが導通しているのにも係らず非導通と誤検出す
るような不具合を確実に除去できる信頼性の高いサイリ
スタ非導通検出器が得られる効果がある。
As described above, according to the present invention, on the condition that the light receiving element receives and outputs the light of the light emitting element that emits light intermittently in synchronization with a specific cycle of the AC power supply, there is no abnormality in the detector and the thyristor is in a non-operating state. Since the structure is configured to judge that the thyristor is conductive, it is possible to obtain a highly reliable thyristor non-conduction detector that can reliably eliminate the problem of erroneously detecting non-conduction even though the thyristor is conductive. There is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例によるサイリスタ非導通検
出器の回路図、第2図はその回路動作を示すタイミング
チャート図、第3図は従来のサイリスタ非導通検出器の
概要図である。 2はサイリスタ、7は発光素子、9は受光素子、10は
クロックパルス発振器、11は第1のカウンタ、12は
第2のカウンタ、13はOR回路、14はAND回路。 なお、図中、同一符号は同−又は相当部分を示す0 特許出願人  三菱電機株式会社 代理人 弁理士  1)澤 博 昭 (外2名) to  tltz  t3 手続補正器(自発)
FIG. 1 is a circuit diagram of a thyristor non-conduction detector according to an embodiment of the present invention, FIG. 2 is a timing chart showing the circuit operation, and FIG. 3 is a schematic diagram of a conventional thyristor non-conduction detector. 2 is a thyristor, 7 is a light emitting element, 9 is a light receiving element, 10 is a clock pulse oscillator, 11 is a first counter, 12 is a second counter, 13 is an OR circuit, and 14 is an AND circuit. In addition, in the figures, the same numerals indicate the same or equivalent parts 0 Patent applicant Mitsubishi Electric Co., Ltd. agent Patent attorney 1) Hiroshi Sawa (2 others) to tltz t3 Procedure corrector (spontaneous)

Claims (1)

【特許請求の範囲】[Claims] 特定周期の交流電圧が印加されるサイリスタと、前記サ
イリスタと並列に接続された発光素子と、前記発光素子
からの光を受ける受光素子と、クロックパルス発振器か
らのクロックパルスを計数して計数値がある値以上にな
ると出力し前記受光素子の出力”0”でリセットされる
第1のカウンタと、前記クロックパルスを計数して計数
値がある値以上になると出力し前記受光素子の出力”1
”でリセットされる第2のカウンタと、前記第1、第2
のカウンタの出力を論理するOR回路と、前記OR回路
の出力が”0”で前記受光素子の出力が”1”のとき出
力”1”となるAND回路を備えたサイリスタの非導通
検出器。
A thyristor to which an alternating voltage of a specific period is applied, a light emitting element connected in parallel with the thyristor, a light receiving element receiving light from the light emitting element, and a clock pulse from a clock pulse oscillator are counted to obtain a count value. a first counter that outputs an output when it exceeds a certain value and is reset with the output of the light receiving element "0"; and a first counter that counts the clock pulses and outputs when the counted value exceeds a certain value and outputs the output of the light receiving element "1".
”; and a second counter that is reset by
A thyristor non-conduction detector comprising: an OR circuit that logics the output of a counter; and an AND circuit that outputs "1" when the output of the OR circuit is "0" and the output of the light receiving element is "1".
JP14967086A 1986-06-27 1986-06-27 Thyristor non-conduction detector Expired - Fee Related JPH0614783B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14967086A JPH0614783B2 (en) 1986-06-27 1986-06-27 Thyristor non-conduction detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14967086A JPH0614783B2 (en) 1986-06-27 1986-06-27 Thyristor non-conduction detector

Publications (2)

Publication Number Publication Date
JPS637164A true JPS637164A (en) 1988-01-13
JPH0614783B2 JPH0614783B2 (en) 1994-02-23

Family

ID=15480264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14967086A Expired - Fee Related JPH0614783B2 (en) 1986-06-27 1986-06-27 Thyristor non-conduction detector

Country Status (1)

Country Link
JP (1) JPH0614783B2 (en)

Also Published As

Publication number Publication date
JPH0614783B2 (en) 1994-02-23

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