JPS636949Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gate pulse generation circuit, and more particularly to a gate pulse generation circuit that generates gate pulses suitable for extracting burst signals contained in different types of color signals.

Various color television systems are used, such as PAL and SECAM. In this case, the position of the burst signal included in the color signal will be somewhat different in each of the above methods. In other words, it is known that if the gate pulse width is set based on the extraction of the burst signal in the PAL method, the pulse width will be insufficient for the SECUM method, and a sufficient burst signal will not be obtained.

Therefore, in conventional color television receivers, different gate pulse generation circuits are used for the PAL method and the SECUM method, and it has been strongly desired to make them common.

To solve this problem, a circuit that generates two types of gate pulses using a phase shift circuit has been proposed, but this has the problem of making the circuit complicated and expensive. ing.

Therefore, an object of the present invention is to provide a gate pulse generating circuit which is a simple circuit and which can be applied to color television receivers of the PAL and SECAM systems.

In order to achieve this purpose, the present invention applies a DC bias to the input pulse and integrates it, and extracts the integrated output by cutting the DC component, thereby obtaining a gate pulse suitable for the pulse method.
By extracting the integral output as it is, a gate pulse suitable for the SECUM method is obtained. Hereinafter, the gate pulse generation circuit according to the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a gate pulse generation circuit according to the present invention. In the figure, 1 is a transistor as a switching element that uses the input pulse IN as a base input, and its collector is connected to the power supply +B via a resistor 2, and its emitter is connected to ground via a resistor 3. . Reference numeral 4 denotes an integrating circuit for integrating the collector output of the transistor 1, and is composed of a resistor 5, a coil 6 connected in series, and capacitors 7 and 8. Reference numeral 9 denotes a capacitor that extracts only the AC component from the output of the integrating circuit 4, and 10 is a resistor connected between the output terminal of the capacitor 9 and the ground, and the voltage across this resistor 10 is output as the gate pulse A. Reference numeral 11 denotes a resistor for taking out the output of the integrating circuit 4 as a gate pulse B.

In the gate pulse generation circuit configured in this way, when a negative input pulse IN is supplied to the base of transistor 1, transistor 1 is normally on, and the input pulse IN is "L".
It will only be turned off during this period. Therefore, in normal times, the collector of transistor 1 sends out an output obtained by dividing the voltage of power supply +B by resistors 2 and 3, and during the off period of transistor 1, power supply +B is sent out. become. Therefore, this transistor 1 and resistors 2 and 3 make the input pulse IN positive by inverting it, and supply an output biased by the voltage divided by the power supply +B by the resistors 2 and 3 to the integrating circuit 4. I will do it. This integrating circuit 4 integrates a DC biased positive polarity pulse signal in an integrating system including a resistor 5 and a capacitor 7 and an integrating system including a coil 6 and a capacitor 8, and outputs the integrated signal. In this case, the output signal width of the integrating circuit 4 is widened by a value corresponding to the biased value by the resistors 2 and 3, compared to the case where the input pulse IN is simply integrated with positive polarity. It turns out. Therefore, when the output signal of the integrator circuit 4 is taken out via the capacitor 9, the output signal, that is, the gate pulse A, becomes a signal with the DC bias component cut off, and this has a narrow width corresponding to the pulse width of the input pulse IN. Become something. On the other hand, when the output of the integrating circuit 4 is taken out through the resistor 11, the output signal, that is, the gate pulse B, remains the integrated output, and thus becomes the gate pulse B whose width is expanded by the DC bias. As a result, gate pulse A is suitable as a signal for extracting a burst signal from a color signal using the PAL method, and gate pulse B
Since the width is expanded, it is suitable for extracting a burst signal from a color signal based on the SECUM method. Since both of these gate pulses A and B can be obtained at the same time, a large degree of freedom can be obtained in the manner in which they are used.

Note that the pulse width of the gate pulse B is the same as the output width of the integrating circuit 4, so it changes in accordance with the voltage division ratio by the resistors 2 and 3. The partial pressure ratio can be adjusted to suit.

As explained above, the gate pulse generation circuit according to the present invention integrates the input pulse signal after applying a DC bias, and takes out the output of this integrating circuit via a capacitor to generate a narrow width signal with the DC component cut off. A gate pulse is generated, and the output of the integrating circuit is taken out as a wide gate pulse. Therefore, although the circuit configuration is simple, it has excellent effects such as being able to easily obtain two types of gate pulses having different widths and simultaneously obtaining both gate pulses.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a gate pulse generation circuit according to the present invention. 1...transistor (switching element), 2,
3, 5, 10, 11...resistance, 4...integrator circuit,
7, 8, 9... Capacitor.

Claims (1)

[Scope of utility model registration request] A switching element whose emitter and collector are connected between the power supply and the ground via first and second resistors, respectively, and which outputs a DC-biased rectangular pulse signal by being driven by a rectangular input pulse signal. , an integrating circuit for integrating the output of the switching element, and a capacitor for outputting a DC component cut from the output of the integrating circuit as a first gate pulse suitable for extracting a burst signal in the pulse method, A gate pulse generation circuit characterized in that a second gate pulse suitable for extracting a burst signal in a SECUM method having a width corresponding to a DC bias based on a voltage division value by the first and second resistors is obtained from the circuit.