JPS6368053U - - Google Patents
Info
- Publication number
- JPS6368053U JPS6368053U JP16038686U JP16038686U JPS6368053U JP S6368053 U JPS6368053 U JP S6368053U JP 16038686 U JP16038686 U JP 16038686U JP 16038686 U JP16038686 U JP 16038686U JP S6368053 U JPS6368053 U JP S6368053U
- Authority
- JP
- Japan
- Prior art keywords
- ram
- terminal
- chip enable
- power source
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
Description
第1図は本考案のRAMのチツプイネーブル信
号回路、第2図はその動作説明のための波形図で
t1は電源投入時、t2は電源切断時を示す。第
3図は従来回路を示す回路図である。
1……リセツト回路、R1・R2・R3・R4
・R5・R6・R7……抵抗、D1・D2・D3
・D4・D5……ダイオード、C……コンデンサ
、Q1・Q2……トランジスタ、X″tal……
水晶発振器、VCC……システム電源、VN……
バツテリ、VR……リセツト信号、VC1……ト
ランジスタQ1のコレクタ電位、VC2……トラ
ンジスタQ2のコレクタ電位、VDD……RAM
及びCPUの電源端子、CE2……RAMのチツ
プイネーブル端子、RST……CPUのリセツト
端子。
FIG. 1 is a chip enable signal circuit of a RAM according to the present invention, and FIG. 2 is a waveform diagram for explaining its operation, where t1 shows when the power is turned on and t2 shows when the power is turned off. FIG. 3 is a circuit diagram showing a conventional circuit. 1...Reset circuit, R1 , R2 , R3 , R4
・R 5・R 6・R 7 ...Resistance, D 1・D 2・D 3
・D 4・D 5 ……diode, C ……capacitor, Q 1・Q 2 ……transistor, X″tal……
Crystal oscillator, VCC...system power supply, VN...
Battery, VR...Reset signal, VC1 ...Collector potential of transistor Q1, VC2...Collector potential of transistor Q2 , VDD...RAM
and CPU power supply terminal, CE2...RAM chip enable terminal, RST...CPU reset terminal.
Claims (1)
ドを介してRAMの直流駆動電源端子に接続し、
CPUのリセツト信号出力端を積分回路を介して
エミツタ接地トランジスタのベースに接続し、該
トランジスタのコレクタを前記RAMのチツプイ
ネーブル端子に接続してなるRAMのチツプイネ
ーブル回路。 A battery power source and another DC power source are each connected to the DC drive power terminal of the RAM via a diode,
A chip enable circuit for a RAM, in which a reset signal output terminal of a CPU is connected to the base of a common emitter transistor via an integrating circuit, and a collector of the transistor is connected to a chip enable terminal of the RAM.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16038686U JPS6368053U (en) | 1986-10-20 | 1986-10-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16038686U JPS6368053U (en) | 1986-10-20 | 1986-10-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6368053U true JPS6368053U (en) | 1988-05-07 |
Family
ID=31085717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16038686U Pending JPS6368053U (en) | 1986-10-20 | 1986-10-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6368053U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63122087A (en) * | 1986-11-12 | 1988-05-26 | Nec Corp | Dynamic storage device |
JPH03283091A (en) * | 1990-03-29 | 1991-12-13 | Nec Corp | Semiconductor memory circuit device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59132022A (en) * | 1983-12-23 | 1984-07-30 | Matsushita Electric Ind Co Ltd | Backup circuit of semiconductor ic |
JPS6025035B2 (en) * | 1977-04-15 | 1985-06-15 | 松下電工株式会社 | electrical equipment |
-
1986
- 1986-10-20 JP JP16038686U patent/JPS6368053U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6025035B2 (en) * | 1977-04-15 | 1985-06-15 | 松下電工株式会社 | electrical equipment |
JPS59132022A (en) * | 1983-12-23 | 1984-07-30 | Matsushita Electric Ind Co Ltd | Backup circuit of semiconductor ic |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63122087A (en) * | 1986-11-12 | 1988-05-26 | Nec Corp | Dynamic storage device |
JPH03283091A (en) * | 1990-03-29 | 1991-12-13 | Nec Corp | Semiconductor memory circuit device |
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