JPS6123730U - reset circuit - Google Patents
reset circuitInfo
- Publication number
- JPS6123730U JPS6123730U JP10659184U JP10659184U JPS6123730U JP S6123730 U JPS6123730 U JP S6123730U JP 10659184 U JP10659184 U JP 10659184U JP 10659184 U JP10659184 U JP 10659184U JP S6123730 U JPS6123730 U JP S6123730U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- reset circuit
- diode
- reset
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のリセット回路、第２図はこの考案の一実
施例によるリセット回路、第３図はそのタイミング図、
第４図はこの考案の別の実施例によるリセット回路図で
ある。
１．２・・・・・・コンパレータ、３，４，５，４２・
・・・・・抵抗、６，２５・・・・・・電源スイッチ、
２１，２２，４１・・・・・・トランジスタ、２３，２
４・・・・・・ダイオード。FIG. 1 is a conventional reset circuit, FIG. 2 is a reset circuit according to an embodiment of this invention, and FIG. 3 is a timing diagram thereof.
FIG. 4 is a reset circuit diagram according to another embodiment of this invention. 1.2...Comparator, 3, 4, 5, 42.
...Resistor, 6,25...Power switch,
21, 22, 41...Transistor, 23, 2
4...Diode.
Claims (1)
をもって出力する回路において、トランジスタをシリー
ズに接続し、そのエミツタ側を電源スイッチと連動しな
い電源ラインにダイオードを介して接続し、ベース側を
電源スイッチと連動する電源ラインにダイオードを介し
て接続し、各トランジスタのコレクタ側からそれぞれリ
セット信号を取出すようにしたことを特徴とするリセッ
ト回路。In a circuit that outputs multiple reset signals with time differences when the electronic circuit is powered off, transistors are connected in series, their emitters are connected via a diode to a power line that does not work with the power switch, and the base side is connected to the power switch. A reset circuit is connected to a power supply line linked to the transistor via a diode, and a reset signal is output from the collector side of each transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10659184U JPS6123730U (en) | 1984-07-13 | 1984-07-13 | reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10659184U JPS6123730U (en) | 1984-07-13 | 1984-07-13 | reset circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6123730U true JPS6123730U (en) | 1986-02-12 |
Family
ID=30665872
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10659184U Pending JPS6123730U (en) | 1984-07-13 | 1984-07-13 | reset circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6123730U (en) |
-
1984
- 1984-07-13 JP JP10659184U patent/JPS6123730U/en active Pending
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