JPS6365785A - Video output circuit - Google Patents

Abstract

PURPOSE:To simplify the circuit constitution without requiring a DC recovery circuit by changing its collector potential in response to a pedestal potential of a video signal of a collector of transistors (TRs) of differential connection. CONSTITUTION:The connecting point of emitters of the TRs 8, 9 of differential connection is connected to a reference potential point VEE via the collector and emitter of a current source TR 5. A video signal including a reference pulse PR is fed to the base of the TR 5, the pulse PR is detected from the collector of the TR 9, the base voltage of the TR 9 is controlled by a voltage compared (19) with the variable control voltage 20a to adjust the contrast. The potential of the pedestal period is detected from the collector of the TR 9 to change the collector potential of the TR 9 in response to the detected voltage to obtain a video signal making the potential of the pedestal period constant by the collector of the TR 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video output circuit used in television receivers and the like.

[Summary of the invention]

In a video output circuit used in a television receiver or the like, the present invention connects the connection point of the respective emitters of differentially connected first and second transistors to the collector of a third transistor for a current source. A video signal containing a reference pulse is applied to the base of a third transistor connected to a reference potential point via an emitter path, the reference pulse is detected from the collector of this second transistor, and the detection level of this reference pulse is and the variable control voltage to control the base voltage of one of the first and second transistors to adjust the contrast, and detect the potential during the pedestal period from the collector of the second transistor. By changing the collector potential of the second transistor according to the potential and obtaining a video signal from the collector of the second transistor with a constant potential during the pedestal period, a large-capacity coupling capacitor is not required. This has the advantage of enabling miniaturization, especially chip mounting, and simplifying the circuit configuration.

[Conventional technology]

First, Utility Model No. 59-127372 (Utility Application No. 58-220
48), a reference pulse is inserted into a predetermined portion of the video signal, and this reference pulse is used to adjust the contrast of the image on the cathode ray tube of a television receiver.
! A conditioning device has been proposed.

A video output circuit as shown in FIG. 3 has been proposed in which such a contrast adjustment device is constructed using a differential amplifier circuit.

That is, in Figure 3, (IR), (IG) and (I
B) indicates video signal input terminals to which red, green and blue video signals are respectively supplied, and these video signal input terminals (IR),
A video output circuit (2R
), (2G) and (2B) to the color cathode ray tube (3). This video output circuit (2R),
(2G) and (2B) have the same configuration, so only the video output circuit (2R) will be described. The video signal supplied to the video signal input terminal (IR) is passed through a reference pulse insertion circuit (4) that inserts a reference pulse PR at a predetermined position on the back porch of the horizontal synchronizing signal of the video signal, as shown in FIG. 4A. The current is supplied to the base of an npn transistor (5) constituting a current source. In this case, the reference pulse PR supplied to the reference pulse input terminal (4a) is set to have a level of, for example, 80% of the white level of the video signal.

The emitter of this transistor (5) is connected to the reference voltage VIE! through a resistor (6). The collector of this transistor (5) is connected to the power supply terminal (7) to which + is supplied, and the collector of this transistor (5) is connected to the npn transistors (8) and (9) that constitute a differential amplifier circuit.
are connected to the connection points of the respective emitters of the transistors (8) and (9), and the respective collectors of the second class transistors (8) and (9) are connected to the respective resistors (10).
), (11) to the power supply terminal (12) to which positive DC voltage VCC is supplied, and this transistor (
9) is grounded via a battery (13) from which a reference voltage can be obtained.

The video signal obtained at the collector of this transistor (9) is transferred to an amplifier circuit (14), a coupling capacitor (15), an amplifier circuit (16) constituting a DC regeneration circuit, and an amplifier circuit (1
7) to the color cathode ray tube (3). Further, the connection point between the amplifier circuit (14) and the capacitor (15) is connected to the input side of a sampling hold circuit (18) for detecting the level of the reference pulse PR. In this case, the sampling signal input terminal (18a) of this sampling hold circuit (18) is connected to the reference pulse P inserted into the back porch of the horizontal synchronizing signal of the video signal as shown in FIG. 4B.
A sampling signal (18S) corresponding to R is supplied, and the level of this reference pulse PR is detected and held. The level detection signal of the reference pulse PR obtained at the output side of this sampling and holding circuit (18) is supplied to the comparison and integration circuit (19).
) of the contrast adjustment variable resistor (20).
20a), and sends a control signal corresponding to the difference between the adjusted voltage and the level detection signal to the buffer amplifier circuit (20a) constituting the level and impedance conversion circuit.
1) through which the transistors (8
). In this case, the contrast of the video screen can be adjusted by adjusting the movable element (20a) of the contrast adjustment variable resistor (20).

Since the DC voltage of the video signal varies when the contrast is adjusted, the video signal is subjected to DC reproduction before being supplied to the color cathode ray tube (3).

That is, the output side of the amplifier circuit (17) is connected to the resistor (22) and (
23) to ground through a series circuit of this resistor (22).
The video signal obtained at the connection midpoint of (23) is supplied to a sampling hold circuit (24) that detects the bed scale level of this video signal. The sampling signal input terminal (24a) of this sampling hold circuit (24)
In this case, as shown in FIG. 4C, a sampling signal (24S) corresponding to the pedestal portion of the horizontal synchronizing signal of the video signal is supplied, and the level of the pedestal portion of the video signal is detected and held. Hold circuit (
The pedestal level detection signal of the video signal obtained at the output side of A control signal corresponding to the difference between the level detection signal and the constant DC voltage is supplied to the bias voltage control terminal of the amplifier circuit (16) via the impedance conversion circuit (27) to control the bias voltage of the amplifier circuit (16). It is possible to control the pedestal level of the video signal to a constant voltage value.

[Problem that the invention seeks to solve]

In such a video output circuit, the gain of the video signal can be varied by the DC voltage obtained at the movable element (20a) of the contrast adjustment variable resistor (20). Since the output level also changes, a DC regeneration circuit is required on the output side, which complicates the circuit configuration and requires a large-capacity coupling to cut the DC component between the video signal gain control circuit and the DC regeneration circuit. There is an inconvenience that a capacitor (15) is required, and there is an inconvenience that miniaturization, especially chip mounting, is not possible.

In view of this point, the present invention aims to improve the above-mentioned disadvantages.

[Means for solving problems]

The video output circuit of the present invention connects the emitters of the first and second transistors (8) and (9) which are differentially connected as shown in FIG.
) to the reference potential point VEH via the collector-emitter path of
A video signal including a reference pulse PR is applied to the base of this third transistor (5), and this reference pulse PR is detected from the collector of this second transistor (9). The first and second transistors +81.
The contrast is adjusted by controlling the base voltage of one (9) of (91), and the potential during the pedestal period is detected from the collector of (9) by this second transistor, and the second transistor (9) is controlled according to this detected potential. By changing the collector potential of transistor (9), a video signal with a constant potential during this pedestal period is obtained from the collector of this second transistor (9).

[Effect]

According to the present invention, the first, second and third transistors (8
), <9), (5) configures a multiplier type gain control circuit, detects the level of the reference pulse PR from the collector of this second transistor (9), and compares the detected level of the reference pulse PR with the variable control voltage. The voltage of the first and second transistors +81. (Since the base voltage of one of the transistors (9) is controlled, the contrast can be adjusted by adjusting the variable control voltage, and the pedestal potential of the video signal of the collector of this second transistor (9) is detected. Since the collector potential of this second transistor (9) is changed according to the detected potential, a video signal with a constant potential during the pedestal period of the video signal can be obtained, so there is no need for a DC regeneration circuit, and the circuit configuration can be reduced to just that. It can be simplified, does not require a large-capacity coupling capacitor, and can be miniaturized, especially chip-mounted.

〔Example〕

An embodiment of the video output circuit of the present invention will be described below with reference to FIG. In FIG. 1, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

In this example, a video signal supplied to a video signal input terminal (IR) is supplied to the base of a transistor (5) constituting a constant current source via a reference pulse insertion circuit (4). This reference pulse insertion circuit (4) inserts a reference pulse PR having a predetermined width of 80% of the white level into the back porch of the video signal as shown in FIG. 4A in the same manner as in FIG. The emitter of this transistor (5) is connected via a resistor (6) to a power supply terminal (7) to which reference voltage EE is supplied, and the collector of this transistor (5) is connected to a transistor ( This transistor (8) is connected to the connection point of each emitter of (8) and (9).
) through a resistor (10) to a positive DC voltage V
CC is connected to the power supply terminal (12) supplied with the transistor (8), and the base of this transistor (8) is connected to the battery (12) from which the reference voltage is obtained.
3) to ground via.

In addition, the collector of this transistor (9) is connected to the buffer amplifier circuit (14a) of the gain control circuit, the amplifier circuit (14b),
The buffer amplifier circuit (14c) of this amplifier circuit (14b)
) and a final stage amplifier circuit (17) in series to the color cathode ray tube (3). The connection point between the amplifier circuits (14c) and (17) is connected to the input side of a sampling hold circuit (18) for detecting the level of the reference pulse PR. The sampling signal input terminal (18a) of this sampling hold circuit (18) is supplied with a sampling signal (18S) corresponding to the reference pulse PR inserted into the bank pouch of the horizontal synchronizing signal of the video signal, as shown in FIG. 4B. Then, the level of this reference Hals PR is detected and held.

The level detection signal of the reference pulse PR obtained at the output side of this sampling hold circuit (18) is compared and integrated by
19), and the movable element (20a) of the contrast adjustment variable resistor (2o) is supplied to the comparison and integration circuit (19).
) A control signal corresponding to the difference between the variable control voltage obtained in Supply to the base. In this case, by adjusting the movable element (20a) of the contrast adjustment variable resistor (20), this movable element (
The variable control voltage obtained in step 20a) is adjusted, and the contrast of the video screen can be adjusted satisfactorily.

In addition, in this example, the output side of the final stage amplifier circuit (17) is grounded through a series circuit of resistors (22) and (23), and when the resistors (22) and (23) are connected, The video signal obtained at this point is supplied to a sampling and hold circuit (24) that detects the bed scale level of this video signal. The sampling signal input terminal (24a) of this sampling hold circuit (24) is supplied with a sampling signal (24S) corresponding to the pedestal portion of the horizontal synchronizing signal of the video signal as shown in FIG. 4C, and this video signal The level of the pedestal is detected and held. The level detection signal of the pedestal of the video signal obtained on the output side of this sampling and hold circuit (24) is compared and integrated by the integration circuit (24).
5) and this comparison/integration circuit (25)
A constant DC voltage for pedestal level clamping is supplied from the pond (26), and the DC voltage corresponding to the difference between this pedestal level detection signal and this constant DC voltage is connected to the impedance conversion circuit (27) and the resistor (11) in series. It is connected to the collector of the transistor (5) through a circuit. In this case, the voltage obtained on the output side of the impedance conversion circuit (27) is, for example, 5V to 10V.

Since this example is configured as described above, by adjusting the movable element (20a) of the contrast adjustment variable resistor (20), the variable control voltage obtained at the movable element (20a) can be adjusted, and the result can be maintained as well as in the conventional case. Contrast adjustment can be performed. In addition, the potential during the pedestal period of the video signal is detected, and the power supply voltage of the transistor (9) is changed so that the potential during this pedestal period is constant.
For example, as shown in Figure 2 A and B, even if this gain changes due to contrast adjustment, the bed scale level of the video signal remains constant and only the power supply voltage of the transistor (9) changes, so a separate DC regeneration circuit is required. There is no. Therefore, according to this example, since a DC regeneration circuit is not required, the circuit configuration can be simplified and a large-capacity coupling capacitor is not required, which has the advantage of enabling miniaturization, especially chip mounting. Furthermore, in this example, since the level of the video signal is kept constant, direct connection after this video output circuit is possible. Further, in this example, since the video signal for detecting the pedestal level is obtained from the output side of the final stage amplifier circuit (17), there is an advantage that all fluctuations due to temperature characteristics etc. at intermediate stages can be absorbed.

In addition, in the above embodiment, a transistor (
9), but this buffer circuit (2)
Depending on the polarity obtained on the output side of 1), the transistor (
Of course, the same effects as described above can also be obtained by controlling the base voltage of transistor (8) and keeping the base voltage of transistor (9) constant.

Furthermore, it goes without saying that the present invention is not limited to the above-described embodiments, and can take various other configurations without departing from the gist of the present invention.

〔Effect of the invention〕

According to the present invention, since a DC regeneration circuit is not required, there is an advantage in that the circuit configuration can be simplified, and since a large-capacity coupling capacitor is not required, there is an advantage in that miniaturization, especially chip mounting, is possible. .

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an embodiment of the video output circuit of the present invention;
2 and 4 are diagrams for explaining the present invention, respectively, and FIG. 3 is a configuration diagram showing an example of a video output circuit. (IR), (IG), and (IB) are video signal input terminals, (3) is a color cathode ray tube, (4) is a reference pulse insertion circuit, (51, (81, and (9) are transistors, respectively, 7) and (12) are power supply terminals, (13)
and (26) are batteries, respectively, (14b) and (17) are amplifier circuits, (18) and (24) are sampling and holding circuits, (19) and (25) are comparison and integration circuits, respectively, and (20) is a comparison and integration circuit. This is a variable resistor for contrast adjustment. A B Figure 2 Figure 4

Claims (1)

[Claims] The emitter connection point of each of the differentially connected first and second transistors is connected to a reference potential point via the collector-emitter path of a third transistor for a current source, and a video signal containing a reference pulse is transmitted. The reference pulse is applied to the base of the third transistor, the reference pulse is detected from the collector of the second transistor, and the detection level of the reference pulse is compared with the variable control voltage. The contrast is adjusted by controlling the base voltage of one of the transistors, and the potential of the pedestal period is detected from the collector of the second transistor, and the collector potential of the second transistor is changed according to this detected potential. A video output circuit characterized in that a video signal having a constant potential during the pedestal period is obtained from the collector of the second transistor.