JPS6363867U - - Google Patents
Info
- Publication number
- JPS6363867U JPS6363867U JP1986159116U JP15911686U JPS6363867U JP S6363867 U JPS6363867 U JP S6363867U JP 1986159116 U JP1986159116 U JP 1986159116U JP 15911686 U JP15911686 U JP 15911686U JP S6363867 U JPS6363867 U JP S6363867U
- Authority
- JP
- Japan
- Prior art keywords
- month
- data
- day
- year
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000013500 data storage Methods 0.000 claims 1
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- RRLHMJHRFMHVNM-BQVXCWBNSA-N [(2s,3r,6r)-6-[5-[5-hydroxy-3-(4-hydroxyphenyl)-4-oxochromen-7-yl]oxypentoxy]-2-methyl-3,6-dihydro-2h-pyran-3-yl] acetate Chemical compound C1=C[C@@H](OC(C)=O)[C@H](C)O[C@H]1OCCCCCOC1=CC(O)=C2C(=O)C(C=3C=CC(O)=CC=3)=COC2=C1 RRLHMJHRFMHVNM-BQVXCWBNSA-N 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
- Electric Clocks (AREA)
Description
第１図は本考案の一実施例に係る電子腕時計を
示す外観図、第２図は表示部２の表面部を示す拡
大図、第３図は同実施例の内部回路を示すブロツ
ク図、第４図はＲＡＭ５の主要な内部構成を示す
図、第５図および第６図ａ〜ｅはそれぞれにおけ
る各種表示状態の一例を示す図、第７図は同実施
例の全体的な処理動作を示すフローチヤート、第
８図は第７図のキースイツチ処理の概要を示すフ
ローチヤート、第９図は第８図のキースイツチＳ
１処理を具体的に示すフローチヤート、第１０図
は第８図のキースイツチＳ２処理を具体的に示す
フローチヤート、第１１図は第８図のキースイツ
チＳ３処理を具体的に示すフローチヤート、第１
２図は第８図のキースイツチＳ４処理を具体的に
示すフローチヤート、第１３図は第１２図の日数
計算処理を具体的に示すフローチヤート、第１４
図は第７図の計時処理を具体的に示すフローチヤ
ートである。
２……表示部、２ａ……表示バツフア、３……
ＲＯＭ、５……ＲＡＭ、７……演算回路、９……
発振器、１２……分周回路、Ｒ……日付データレ
ジスタ、Ｍ……モードフラグ、Ｌ，Ｋ……フラグ
、Ｘ，Ｙ，Ｚ……レジスタ、Ｎ……データ数記憶
レジスタ、Ｐ……ページ記憶レジスタ、ｎ……次
回報知のページ記憶レジスタ。
FIG. 1 is an external view showing an electronic wristwatch according to an embodiment of the present invention, FIG. 2 is an enlarged view showing the surface of the display section 2, and FIG. 3 is a block diagram showing the internal circuit of the embodiment. FIG. 4 is a diagram showing the main internal configuration of the RAM 5, FIGS. 5 and 6 a to e are diagrams showing examples of various display states in each, and FIG. 7 is a diagram showing the overall processing operation of the same embodiment. Flowchart, FIG. 8 is a flowchart showing an overview of the key switch processing in FIG. 7, and FIG. 9 is a flowchart showing the key switch S in FIG.
10 is a flowchart specifically showing the key switch S2 process in FIG. 8, FIG. 11 is a flowchart specifically showing the key switch S3 process in FIG. 8, 1st
2 is a flowchart specifically showing the key switch S4 process in FIG. 8, FIG. 13 is a flowchart specifically showing the number of days calculation process in FIG. 12, and FIG.
This figure is a flowchart specifically showing the time measurement process in FIG. 7. 2...display section, 2a...display buffer, 3...
ROM, 5...RAM, 7... Arithmetic circuit, 9...
Oscillator, 12... Frequency divider circuit, R... Date data register, M... Mode flag, L, K... Flag, X, Y, Z... Register, N... Data number storage register, P... Page Memory register, n...Page memory register for next notification.
Claims (1)
ータを得る計時手段と、 年月日データの入力手段と、 前記入力手段により入力された年月日データを
記憶する記憶手段と、 前記記憶手段に記憶されている年月日データが
前記計時手段で得られた年月日データに対して現
在、過去、未来のいずれのデータであるかを判断
する判別手段と、 前記判別手段の判別結果が未来であれば、記憶
月日までの残り日数を表示し、過去であれば、そ
の経過年数及び又は経過日数と次に来る同月同日
までの残り日数を表示する手段とを具備すること
を特徴とするデータ記憶装置。[Claims for Utility Model Registration] Timekeeping means for counting reference clock signals to obtain at least year, month, and day data; input means for the year, month, and day data; and storage means for storing the year, month, and day data input by the input means. and a determining means for determining whether the date data stored in the storage means is present, past, or future data with respect to the date data obtained by the clocking means, and the determining means If the determination result of the means is in the future, it displays the number of days remaining until the memorized month and day, and if it is in the past, it displays the number of years and/or days that have passed and the number of days remaining until the same day of the same month that comes next. A data storage device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986159116U JPH0726761Y2 (en) | 1986-10-16 | 1986-10-16 | Data storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986159116U JPH0726761Y2 (en) | 1986-10-16 | 1986-10-16 | Data storage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6363867U true JPS6363867U (en) | 1988-04-27 |
| JPH0726761Y2 JPH0726761Y2 (en) | 1995-06-14 |
Family
ID=31083246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986159116U Expired - Lifetime JPH0726761Y2 (en) | 1986-10-16 | 1986-10-16 | Data storage |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0726761Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5265479A (en) * | 1975-11-27 | 1977-05-30 | Seiko Instr & Electronics Ltd | Portable electronic watch |
| JPS5485654A (en) * | 1977-12-20 | 1979-07-07 | Nec Corp | Processor for data information |
| JPS5654563A (en) * | 1979-10-12 | 1981-05-14 | Canon Inc | Electronic apparatus with calendar function |
-
1986
- 1986-10-16 JP JP1986159116U patent/JPH0726761Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5265479A (en) * | 1975-11-27 | 1977-05-30 | Seiko Instr & Electronics Ltd | Portable electronic watch |
| JPS5485654A (en) * | 1977-12-20 | 1979-07-07 | Nec Corp | Processor for data information |
| JPS5654563A (en) * | 1979-10-12 | 1981-05-14 | Canon Inc | Electronic apparatus with calendar function |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0726761Y2 (en) | 1995-06-14 |
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