JPS6358875A - Thin film transistor element - Google Patents

Abstract

PURPOSE:To obtain a thin transistor of high quality where electric leakages rarely develop by depositing an ultrathin film semiconductor at a comparatively low temperature of a substrate and depositing the above semiconductor up to the desired thickness at a comparatively high temperature of the substrate after annealing it. CONSTITUTION:Polysilicon 2' on the order of 100 Angstrom is deposited on a glass substrate 1 at a substrate temperature of 400 deg.C with a process of plasma CVD. Then it is annealed at a temperature of 600 deg.C in an atmosphere of hydrogen for an hour and after that a polysilicon film 2'' on the order of 3,000 Angstrom is deposited at the substrate temperature of 600 deg.C with the process of CVD under reduced pressure. And then the polysilicon film is separated into island-like portions and films of silicon oxide and polysilicon are deposited in sequence. Subsequently, the films of a silicon oxide and polysilicon other than those of a gate part are removed and an ion implantation of phophorus is carried out and as a result, the number of level in the grain boundary within a semiconductor film can be so drastically reduced that this approach helps 7 lessen leakages of electricity.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor, and particularly to a thin film transistor element suitable for suppressing leakage current.

[Conventional technology]

A thin film transistor formed on an insulating substrate such as borosilicate glass must be manufactured using a low temperature process of 600 degrees or less because the strain point of borosilicate glass or the like is around 600 degrees. The Vo-ID characteristics of thin film transistors subject to such constraints were discussed in Proceedings of the 46th Japan Society of Applied Physics Academic Conference, Autumn 1985, 4a-W-1 (P, 451).
As shown in Figure 3, In increases almost symmetrically around Va'' = OV. (Figure 3) This shows that the leakage current is large, and this point is different from that of single crystal MOS, which has a similar device structure. This is very different from a field effect transistor.Currently, in order to suppress this leakage current, attempts are being made to make the channel layer ultra-thin, hydrogen treatment, etc., but it is difficult to say that the leakage current has been suppressed sufficiently.

[Problem that the invention seeks to solve]

FIG. 2 shows a cross-sectional structure of a thin film transistor formed on an insulating substrate. The semiconductor film 2 is an i layer, and the ohmic layer 3 is an n layer.
The leakage current when a negative voltage is applied to the gate electrode 5 will be considered in the OFF state of the thin film transistor in the case of a layer. When a negative voltage is applied to the gate electrode 5, holes are accumulated on the surface of the i-layer, which becomes an apparent P, and the omic layer 3+1 layer 2. Ohmic layer 3 is npn
Looks like a joint. As is well known, in the case of single crystal silicon, n
Even if a voltage is applied across a pn junction, one of the two junctions will always be in a reverse bias state, so almost no current will flow through that junction.However, a polysilicon thin film transistor has the device structure shown in Figure 1. When a positive voltage is applied to the gate electrode 5 (n p n junction) and a voltage is applied between the drain electrode 6 and the source electrode 7, a current that cannot be ignored as a leakage current flows.

This indicates that the junction of the polysilicon thin film transistor is insufficient. Then, why can a sufficient junction be formed in a single crystal MOS transistor, but not in a polysilicon thin film transistor?

The main reason is that the polysilicon film has grain boundaries (G
This is because it has a rain-boundary. Since the grain boundary is a defect in the film, it can be assumed that there are more levels there than in other locations that capture carriers that can move freely within the film. Here, pn
When a junction is made and a reverse bias voltage is applied, most of the applied voltage is applied to the junction, and the high electric field in the vicinity pulls out many electrons and holes that were trapped within the grain boundary. As a result, leakage current increases. Therefore, the conclusion is that in order to suppress the leakage current of a thin film transistor, it is necessary to reduce the levels within the grain boundary. Currently, as a means to reduce the level within the grain boundary,
Hydrogen treatment, etc. are commonly attempted, but increasing the grain size is also one way to reduce the levels. J
our own of Applied Physics
Vol, 55 No, 6 Partl 15 Marc
h 1984 P1590-1595 Matsui, Shirai.

According to Sakiyama et al., when polysilicon is deposited on an insulating substrate, the initial process starts from a mixed state of amorphous and polysilicon and gradually grows from polysilicon grains. In other words, the thicker the polysilicon film, the larger the grain size. Of course, this effect seems to disappear when the film thickness exceeds a certain level. However, when actually operating a thin film transistor, if the film thickness is too thick, leakage current increases, so the film thickness is practically limited to a certain value or less. After all, at this stage, thin film transistors are manufactured in a region where the grain size is relatively small, in other words, in a region where leakage current is large. The purpose of the present invention is to
It is an object of the present invention to provide a thin film transistor element capable of suppressing leakage current of a thin film transistor, in other words, a thin film transistor element with few levels within the grain boundary.

[Means for solving problems]

In order to solve the above problems, we have invented a thin film transistor device using a new semiconductor film manufacturing process.

First, an ultra-thin semiconductor film is deposited and annealed at a relatively low substrate temperature. The substrate is then deposited to a desired thickness at a relatively high temperature. Thereafter, by manufacturing a thin film transistor using a conventional process based on this semiconductor film, a high quality thin film transistor with low leakage current can be provided.

[Effect]

The above-mentioned new method for manufacturing a semiconductor film was proposed based on the following grounds. That is, from the above explanation, the size of the polysilicon grains grows based on the grain size of the polysilicon deposited immediately before. Therefore, after an ultra-thin film of polysilicon is deposited, it is annealed to increase the grain size of the polysilicon to some extent. Then, polysilicon was deposited on the enlarged polysilicon grains to a desired thin thickness in an attempt to obtain polysilicon with even larger grain sizes. Here, we previously deposited a polysilicon film on an insulating substrate using the plasma CVD method and annealed it at 600°C. When the substrate temperature during deposition was relatively low, in experiments we found that the best annealing occurred at 400°C. It was discovered that the grain size of later polysilicon becomes larger. Therefore, the first deposition on the insulating substrate is performed by depositing and annealing even when the substrate temperature is relatively low.

This results in the formation of polysilicon with a comparatively large grain size. Next, based on the enlarged polysilicon grains, polysilicon is deposited at a relatively high substrate temperature to obtain a grain size even larger than that during annealing.

〔Example〕

The manufacturing process of the thin film transistor element of the present invention will be explained with reference to FIG.

(a) Polysilicon 2' is deposited to a thickness of about 100 angstroms on a glass substrate 1 by plasma CVD at a substrate temperature of 400° C. and a chamber pressure of 100 mtorr.

Thereafter, annealing is performed at 600° C. for 1 hour in a hydrogen atmosphere.

(b) After annealing, the substrate temperature is 600% by low pressure CVD method.
℃, chamber pressure 100 mtorr polysilicon I
I! 22" to a thickness of about 3000 angstroms.

(a) After depositing the polysilicon film 2, the polysilicon film is first divided into islands, and a silicon oxide film and a polysilicon film are sequentially deposited. Next, the silicon oxide film and polysilicon film other than the gate portion are removed, and P (phosphorus) ions are implanted. Thereafter, a silicon oxide film is deposited, source and drain windows are opened, metal is deposited, and unnecessary metal parts are removed to complete the thin film transistor of the present invention.

〔Effect of the invention〕

According to the present invention, the number of levels within the grain boundaries in the semiconductor film can be significantly reduced, so that leakage current can be reduced, the threshold voltage Vt)+ can be lowered, and the field effect mobility μf can be reduced.
This has the effect of increasing e.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of a thin film transistor, Fig. 2 is a manufacturing process diagram of semiconductor film deposition used in the thin film transistor element of the present invention, and Fig. 3 is an illustration of a conventional thin film transistor.
It is a characteristic diagram. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Semiconductor film, 3... Ohmic layer, 4... Insulating film, 5... Gate electrode, 6...
- Drain electrode, 7... Source electrode, 2'... Semiconductor film (first deposition), 2''... Semiconductor film (second deposition).

Claims (1)

[Claims] 1. In a thin film transistor element formed on an insulating substrate, a semiconductor film deposited on the insulating substrate is first deposited at a relatively low substrate temperature, annealed, and then deposited at a relatively high temperature to a desired level. A thin film transistor element characterized by being deposited to a thickness of . 2. The thin film transistor element according to claim 1, wherein the upper limit of the relatively low temperature is 400°C, and the upper limit of the relatively high temperature is 600°C. 3. The thin film transistor element according to claim 1, wherein the semiconductor film is a polycrystalline silicon film. 4. The thin film transistor element according to claim 1, wherein the insulating substrate is a glass substrate.