JPS6357983B2 - - Google Patents

Info

Publication number
JPS6357983B2
JPS6357983B2 JP14996281A JP14996281A JPS6357983B2 JP S6357983 B2 JPS6357983 B2 JP S6357983B2 JP 14996281 A JP14996281 A JP 14996281A JP 14996281 A JP14996281 A JP 14996281A JP S6357983 B2 JPS6357983 B2 JP S6357983B2
Authority
JP
Japan
Prior art keywords
circuit
signal
phase
switch
burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14996281A
Other languages
Japanese (ja)
Other versions
JPS5851640A (en
Inventor
Susumu Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14996281A priority Critical patent/JPS5851640A/en
Priority to US06/448,906 priority patent/US4644531A/en
Priority to PCT/JP1982/000094 priority patent/WO1982003515A1/en
Priority to EP82901002A priority patent/EP0075601B1/en
Priority to DE8282901002T priority patent/DE3278307D1/en
Publication of JPS5851640A publication Critical patent/JPS5851640A/en
Publication of JPS6357983B2 publication Critical patent/JPS6357983B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/10Arrangements for reducing cross-talk between channels

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Radio Relay Systems (AREA)

Description

【発明の詳細な説明】 本発明は時分割通信方式やSingle Channel
Par Carrier等に用いる送信出力スイツチに関
し、特にデータ信号がベースバンドで帯域制限さ
れている時、該データ信号を発信又は停止する際
の不要波を除去する変調回路に関する。
[Detailed Description of the Invention] The present invention utilizes a time division communication system and a single channel communication system.
The present invention relates to a transmission output switch used in a Par Carrier, etc., and particularly relates to a modulation circuit that removes unnecessary waves when transmitting or stopping a data signal when the data signal is band-limited in the baseband.

第1図は時分割通信方式の原理図、第2図はス
イツチをオンオフするバースト信号A及び不要波
Bの波形のタイムチヤートである。
FIG. 1 is a principle diagram of the time division communication system, and FIG. 2 is a time chart of the waveforms of burst signal A and unnecessary wave B for turning on and off switches.

図中1は低域波器、2は変調器、3はスイツ
チである。
In the figure, 1 is a low-band filter, 2 is a modulator, and 3 is a switch.

時分割通信方式では入力信号を低域波器1で
帯域制限をし、変調器2で変調し、変調された信
号を自局割当時間帯に送信するために、第2図A
に示す如きバースト信号でスイツチ3をオンオフ
する。しかしこの場合Bに示す如き、バースト信
号の前縁及び後縁に瞬時パルスの不要波が発生す
る。これを防止するため従来以下に説明する方式
がある。
In the time-division communication system, the input signal is band-limited by the low-band transmitter 1, modulated by the modulator 2, and the modulated signal is transmitted in the time slot allocated to the own station.
The switch 3 is turned on and off using a burst signal as shown in FIG. However, in this case, as shown in B, unnecessary waves of instantaneous pulses are generated at the leading and trailing edges of the burst signal. In order to prevent this, there is a conventional method described below.

第3図は波形のタイムチヤートでA,Eは位相
変調波のエンベロープ波形、Bはオンオフ信号、
C,DはAの波形をオンオフした波形、FはEの
波形をオンオフした波形の拡大図である。
Figure 3 is a time chart of the waveforms, A and E are envelope waveforms of phase modulated waves, B is on/off signal,
C and D are waveforms obtained by turning on and off the waveform of A, and F is an enlarged view of the waveform obtained by turning on and off the waveform of E.

この方式は位相変調や振巾変調の如く振巾成分
が重畳されている特性を利用して振巾が0、の所
でスイツチングして不要波が発生しない方法を用
いている。例えば2相位相変調で説明すると、第
1図の如くベースバンド信号を低域波器1を介
することにより帯域制限をすれば第3図Aに示す
如く変調波のエンベロープ波形はなめらかな波形
となる。しかしイの点でBに示す信号で第1図に
示すスイツチ3をオンオフすればCに示す如く立
上りが急峻になつてしまう。この為ベースバンド
信号をバースト信号に対応してオンオフして0に
なつたロの点で第1図に示すスイツチ3をオンオ
フすれば第3図Dの如きスイツチング点にて急峻
な波形のない波形が得られ不要波が生じなくな
る。2相変調回路の如き比較的簡単な変調器の場
合は問題にならないが4相、8相、……N相の変
調回路では変調器素子の不整合のため第3図Eの
如くキヤリヤ洩れを生じ完全に0になる所がない
欠点を持つ。
This method utilizes the characteristic that amplitude components are superimposed, such as phase modulation and amplitude modulation, and uses a method in which switching is performed when the amplitude is 0, so that unnecessary waves are not generated. For example, in the case of two-phase phase modulation, if the baseband signal is band-limited by passing it through the low-frequency wave generator 1 as shown in Figure 1, the envelope waveform of the modulated wave becomes a smooth waveform as shown in Figure 3A. . However, if the switch 3 shown in FIG. 1 is turned on and off using the signal shown in B at point A, the rise will become steep as shown in C. For this reason, if the baseband signal is turned on and off in response to the burst signal and the switch 3 shown in FIG. is obtained, and unnecessary waves are no longer generated. This is not a problem in the case of relatively simple modulators such as two-phase modulation circuits, but in 4-phase, 8-phase,...N-phase modulation circuits, due to mismatching of the modulator elements, carrier leakage occurs as shown in Figure 3E. It has the disadvantage that there is no place where it occurs and becomes completely zero.

第4図は従来例の4相の場合の時分割多重通信
方式のブロツク図、第5図は変調器の回路図、第
6図は第5図の場合のベースバンド信号の電圧と
変調波の位相を示す図である。
Figure 4 is a block diagram of a conventional four-phase time division multiplex communication system, Figure 5 is a circuit diagram of a modulator, and Figure 6 is a diagram of the baseband signal voltage and modulated wave in the case of Figure 5. It is a figure showing a phase.

図中1−1,1−2は低域波器、2−1,2
−2は変調器、4−1,4−2はドライバー回
路、5は90度位相器、6はハイブリド回路であ
る。
In the figure, 1-1, 1-2 are low frequency devices, 2-1, 2
-2 is a modulator, 4-1 and 4-2 are driver circuits, 5 is a 90 degree phase shifter, and 6 is a hybrid circuit.

この場合変調器2−1,2−2、ハイブリド回
路6が理想的な素子であれば、入力信号はドライ
バー回路4−1,4−2により各々等振巾で、オ
フセツト電圧0で完全な4相変調波となり、かつ
入力信号をスイツチSW1,SW2で切断し変調
器2−1,2−2の入力を0とすれば第3図Dの
如く変調波出力が0からスイツチされたこととな
り不要波は生じない。即ち変調器2−1,2−2
に用いているバランス・ミクサーは第5図に示す
如く構成されており第6図に示す如くベースバン
ド信号入力を0にすれば搬送波と変調波とは完全
に分離されることになる。しかし実際はこのミク
サーを始めハイブリド回路6等の素子の不完全性
やキヤリヤー洩れ等の為、変調器2−1,2−2
に入る信号の振巾や、ドライバー回路4−1,4
−2のオフセツト電圧をずらして4相変調回路出
力で等価的に4相変調されるように調整する。そ
の為ベースバンド信号をスイツチSW1,SW2
でオンオフした時第3図Eに示す如くキヤリヤー
漏れを生じ完全に0になる点がなくなる。そこで
Eに示す変調波をオンオフすればFに示す如くキ
ヤリヤー洩れに相当する部分aa′部分だけ瞬時応
答してしまい不要波を生ずる欠点を有する。
In this case, if the modulators 2-1, 2-2 and the hybrid circuit 6 are ideal elements, the input signals are given equal amplitude by the driver circuits 4-1, 4-2, and a perfect 4-channel signal with an offset voltage of 0. It becomes a phase modulated wave, and if the input signal is cut off by switches SW1 and SW2 and the inputs of modulators 2-1 and 2-2 are set to 0, the modulated wave output is switched from 0 as shown in Figure 3D, so it is unnecessary. No waves occur. That is, modulators 2-1, 2-2
The balance mixer used in the system is constructed as shown in FIG. 5, and when the baseband signal input is set to 0 as shown in FIG. 6, the carrier wave and modulated wave are completely separated. However, in reality, due to imperfections in the mixer and other elements such as the hybrid circuit 6, carrier leakage, etc., the modulators 2-1 and 2-2
The amplitude of the signal entering the driver circuit 4-1, 4
-2 offset voltage is shifted and adjusted so that equivalent four-phase modulation is performed by the output of the four-phase modulation circuit. Therefore, switch the baseband signal to SW1 and SW2.
When it is turned on and off, carrier leakage occurs as shown in Figure 3E, and there is no point where it becomes completely zero. Therefore, if the modulated wave shown at E is turned on and off, only the portion aa' corresponding to the carrier leakage responds instantaneously, as shown at F, resulting in the generation of unnecessary waves.

本発明の目的は上記の欠点をなくするためにス
イツチング時不要波を除去する変調回路の提供に
ある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a modulation circuit that eliminates unnecessary waves during switching in order to eliminate the above-mentioned drawbacks.

本発明は上記の目的を達成するために自局送信
データバースト発信時と停止時に変調器の前段の
ドライバー回路の入力信号を所定バースト信号長
でスイツチし0又は一定電圧とし、オフセツト電
圧をデータバースト時は変調波が所定の特性を得
る電圧とし、データバースト時以外はキヤリヤ洩
れが0となる電圧に切替えることを特徴とする。
In order to achieve the above object, the present invention switches the input signal of the driver circuit at the front stage of the modulator at a predetermined burst signal length to 0 or a constant voltage at the time of sending and stopping the transmission data burst of the own station, and sets the offset voltage to the data burst. It is characterized in that it is set to a voltage at which the modulated wave has predetermined characteristics at times, and is switched to a voltage at which carrier leakage is zero at times other than data bursts.

以下本発明の実施例につき図に従つて説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.

第7図、第8図は本発明の実施例の時分割通信
方式の原理図である。
FIGS. 7 and 8 are principle diagrams of a time division communication system according to an embodiment of the present invention.

図中7,14はドライバー回路、8,15は低
域波器、9,16は変調器、10はスイツチ、
11,13,19,20は制限器、12,17は
搬送波発振器、18は切替器である。
In the figure, 7 and 14 are driver circuits, 8 and 15 are low frequency devices, 9 and 16 are modulators, 10 is a switch,
11, 13, 19, and 20 are limiters, 12, 17 are carrier wave oscillators, and 18 is a switch.

ドライバー回路7,14にて所定のバースト長
で、制限器11,19を介することにより、入力
信号をスイツチすると共にドライバ回路7,14
のオフセツト電圧をもデータバースト時にそれ以
外の時間に切替える。即ちデータバースト時は変
調波が所定の特性を得るようなオフセツト電圧と
し、入力信号停止時はキヤリヤー洩れが0になる
ようオフセツト電圧をずらしておく。このような
構成とすれば入力信号停止時はキヤリヤー洩れが
生ぜず、この時点でキヤリヤー又は変調波をオン
オフすれば第3図Dに示した如き不要波の生じな
いバースト信号を得ることが出来る。第7図と第
8図の違いは、第7図では変調器9の出力をバー
スト長に合せて制限器13を介してスイツチ10
にて変調波全体をオンオフする方式であり、第8
図は搬送波発振器17の出力を、バースト長に合
せて制限器20を介することにより、切替器18
にてオンオフしている方式であり、出力は共に同
じ波形が得られる。
The driver circuits 7, 14 switch the input signal by passing it through the limiters 11, 19 at a predetermined burst length, and the driver circuits 7, 14
The offset voltage of the data burst is also changed at other times. That is, the offset voltage is set so that the modulated wave has predetermined characteristics during a data burst, and the offset voltage is set so that the carrier leakage becomes zero when the input signal is stopped. With such a configuration, carrier leakage will not occur when the input signal is stopped, and if the carrier or modulated wave is turned on and off at this point, a burst signal without unnecessary waves as shown in FIG. 3D can be obtained. The difference between FIG. 7 and FIG. 8 is that in FIG.
This is a method in which the entire modulated wave is turned on and off at the 8th
In the figure, the output of the carrier wave oscillator 17 is passed through the limiter 20 in accordance with the burst length, so that the output of the carrier wave oscillator 17 is
This is a method in which the output is turned on and off at the same time, and the same waveform is obtained for both outputs.

第9図は本発明の実施例のドライバ回路を主体
とした4相変調回路の回路図、第10図は本発明
の実施例のドライバ回路の前にデイジタル形波
器を用いた時の回路図、第11図は本発明の実施
例の入力信号のオンオフをナンド回路で行う場合
の回路図である。
Fig. 9 is a circuit diagram of a four-phase modulation circuit mainly including a driver circuit according to an embodiment of the present invention, and Fig. 10 is a circuit diagram when a digital waveform generator is used in front of the driver circuit according to an embodiment of the present invention. , FIG. 11 is a circuit diagram of an embodiment of the present invention in which input signals are turned on and off using a NAND circuit.

図中21はノツト回路、22はドライバ回路、
23,24は変調器、25はハイブリド回路、2
6は90度位相器、27は搬送波発振器、28はノ
ツト回路21、スイツチSW3及びドライバ回路
22を有をする回路と同一の回路、29はシフト
レジスタ、30はナンド回路、SW3,SW4は
スイツチ、Va,Vbはオフセツト電圧、R1〜R8
Roは抵抗である。
In the figure, 21 is a knot circuit, 22 is a driver circuit,
23 and 24 are modulators, 25 is a hybrid circuit, 2
6 is a 90 degree phase shifter, 27 is a carrier wave oscillator, 28 is the same circuit as the circuit having the knot circuit 21, switch SW3 and driver circuit 22, 29 is a shift register, 30 is a NAND circuit, SW3 and SW4 are switches, Va, Vb are offset voltages, R 1 to R 8 ,
R o is the resistance.

第9図にてバースト発信時は制御信号によりス
イツチSW3をオンとしスイツチSW4をオフセ
ツト電圧Va側とする。このオフセツト電圧Vaを
調整することにより、4相変調器出力(ハイブリ
ド回路25の出力)が理想的な変調波になるよう
入力信号(ベースバンド信号)の振巾等を調整し
て各素子の不完全性を補正する。
In FIG. 9, when transmitting a burst, the switch SW3 is turned on by the control signal, and the switch SW4 is set to the offset voltage Va side. By adjusting this offset voltage Va, the amplitude of the input signal (baseband signal) is adjusted so that the output of the four-phase modulator (output of the hybrid circuit 25) becomes an ideal modulated wave, and the amplitude of each element is reduced. Correct completeness.

バーストオフ時にはスイツチSW3をオフとし
スイツチSW4をオフセツト電圧Vb側とする。各
素子が理想的であれば入力信号が0の時オフセツ
ト電圧も0とすると変調波出力も0となる。しか
し素子の不完全性のためキヤリヤー洩れを生ずる
のでオフセツト電圧Vbを調整してキヤリヤー洩
れの位相を打消して変調波出力を0になるように
する。
When bursting off, the switch SW3 is turned off and the switch SW4 is set to the offset voltage Vb side. If each element is ideal, when the input signal is 0 and the offset voltage is also 0, the modulated wave output will also be 0. However, carrier leakage occurs due to imperfections in the element, so the offset voltage Vb is adjusted to cancel the phase of the carrier leakage and make the modulated wave output zero.

このようにすることにより第7図、第8図で説
明した、不要波の生じない変調波が得られる。
By doing this, it is possible to obtain a modulated wave that does not generate unnecessary waves, as explained in FIGS. 7 and 8.

即ち、第7図のスイツチ10、第8図の切替器
18をバーストの始めと終りで切り替えればキヤ
リヤー洩れの無い信号を、低域波器8,15の
伝達関数に従つてスイツチされるため第3図Dの
如き不要波のないバースト信号を得ることが出来
る。尚この伝達関数となるべき低域波器8,1
5はドライバ回路7,14の後に入つているが、
系が直線動作する場合はドライバ回路8,15の
前でも同じである。第10図はドライバ回路22
の前にシフトレジスタ29により構成されるデイ
ジタル形の波器を入れたもので、バーストオフ
時にリセツト信号によりシフトレジスタ29をリ
セツトすれば、出力はある一定電圧となり、この
電圧を基準にしてドライバ回路22のオフセツト
電圧VaVbを前述の如く調整しておけば第9図の
説明と同様の効果が得られる。
That is, by switching the switch 10 in FIG. 7 and the switch 18 in FIG. A burst signal without unnecessary waves as shown in FIG. 3D can be obtained. Furthermore, the low-frequency amplifiers 8 and 1 that should serve as this transfer function
5 is installed after the driver circuits 7 and 14,
The same holds true before the driver circuits 8 and 15 when the system operates linearly. Figure 10 shows the driver circuit 22
A digital wave generator consisting of a shift register 29 is inserted in front of the circuit.If the shift register 29 is reset by a reset signal during burst off, the output becomes a certain constant voltage, and the driver circuit uses this voltage as a reference. If the offset voltage VaVb of 22 is adjusted as described above, the same effect as explained in FIG. 9 can be obtained.

第11図は第9図のスイツチSW3のかわりに
ナンド回路30を用いたもので入力信号を制御信
号によりナンド回路30をオンオフすることによ
り、オフ時に一定電圧を得ることが出来るのでド
ライバ回路22のオフセツト電圧Va,Vbを第9
図の説明と同様に調整しておけば同様の効果が得
られる。このようにドライバ回路22のオフセツ
ト電圧Va,Vbを調整しておくことにより不要波
を完全に除去出来る。変調波出力がマイクロ波帯
の場合でも、第7図のスイツチ10、第8図の切
替器18にピンダイオードを用いて、特にピンダ
イオードの電流を制御してオンオフ信号の波形を
制御して整形することなしに、オンオフしても不
要波が生じないので、安価に容易に可能である。
FIG. 11 uses a NAND circuit 30 instead of the switch SW3 in FIG. The offset voltages Va and Vb are
Similar effects can be obtained by making adjustments in the same manner as explained in the figure. By adjusting the offset voltages Va and Vb of the driver circuit 22 in this manner, unnecessary waves can be completely removed. Even when the modulated wave output is in the microwave band, the waveform of the on/off signal can be controlled and shaped by using a pin diode in the switch 10 in Fig. 7 and the switch 18 in Fig. 8, and in particular controlling the current of the pin diode. Since unnecessary waves are not generated even if the device is turned on and off without any need to do so, it can be easily done at low cost.

以上は2相と4相の場合につき説明したが8相
16相など多相の位相変調方式にも適用出来る。
The above was explained for 2-phase and 4-phase cases, but 8-phase
It can also be applied to multi-phase phase modulation methods such as 16-phase.

以上詳細に説明した如く本発明によればスイツ
チング時不要波を安価に容易に除去出来る効果が
ある。
As described above in detail, the present invention has the advantage that unnecessary waves can be easily removed at low cost during switching.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は時分割通信方式の原理図、第2図はス
イツチをオンオフするバースト信号及び不要波の
タイムチヤート、第3図は波形のタイムチヤー
ト、第4図は従来例の4相の場合の時分割多重通
信方式のブロツク図、第5図は変調器の回路図、
第6図は第5図の場合のベースバンド信号の電圧
と変調波の位相を示す図、第7図、第8図は本発
明の実施例の時分割通信方式の原理図、第9図は
本発明の実施例のドライバ回路を主体とした4相
変調回路の回路図、第10図は本発明の実施例の
ドライバ回路の前にデイジタル形波器を用いた
時の回路図、第11図は本発明の実施例の入力信
号のオンオフをナンド回路で行う場合の回路図で
ある。 図中、1,8,15は低域波器、2,2−
1,2−2,9,16,23,24は変調器、
3,10,SW1〜SW4はスイツチ、18は切
替器、4−1,4−2,7,14,22はドライ
バー回路、6,25はハイブリド回路、5,26
は90゜位相器、12,17,27は搬送波発振器、
11,13,19,20は制限器、21はノツト
回路、29はシフトレジスタ、30はナンド回
路、R1〜R8,Roは抵抗、Va,Vbはオフセツト
電圧を示す。
Figure 1 is a principle diagram of the time division communication system, Figure 2 is a time chart of burst signals and unnecessary waves that turn on and off switches, Figure 3 is a time chart of waveforms, and Figure 4 is a diagram of the conventional four-phase case. A block diagram of the time division multiplex communication system, Figure 5 is a circuit diagram of the modulator,
FIG. 6 is a diagram showing the voltage of the baseband signal and the phase of the modulated wave in the case of FIG. A circuit diagram of a four-phase modulation circuit mainly including a driver circuit according to an embodiment of the present invention, FIG. 10 is a circuit diagram when a digital waveform generator is used in front of the driver circuit according to an embodiment of the present invention, and FIG. 11 1 is a circuit diagram of an embodiment of the present invention in which input signals are turned on and off using a NAND circuit; FIG. In the figure, 1, 8, 15 are low frequency amplifiers, 2, 2-
1, 2-2, 9, 16, 23, 24 are modulators,
3, 10, SW1 to SW4 are switches, 18 is a changeover, 4-1, 4-2, 7, 14, 22 are driver circuits, 6, 25 are hybrid circuits, 5, 26
is a 90° phase shifter, 12, 17, and 27 are carrier wave oscillators,
11, 13, 19, and 20 are limiters, 21 is a knot circuit, 29 is a shift register, 30 is a NAND circuit, R 1 to R 8 and Ro are resistances, and Va and Vb are offset voltages.

Claims (1)

【特許請求の範囲】[Claims] 1 自局割当時間に送信を行なう通信方式におい
て、データ信号がベースバンドで帯域制限されて
いる時、自局送信データバースト発信時と停止時
に変調器の前段のドライバ回路の入力信号を切断
又は一定電圧とし、かつオフセツト電圧を可変す
ることを特徴とする変調回路。
1 In a communication system that performs transmission during the own station's allocated time, when the data signal is band-limited in the baseband, the input signal of the driver circuit in the previous stage of the modulator is cut off or kept constant when transmitting the own station's transmitted data burst and when it is stopped. A modulation circuit characterized in that the offset voltage is variable.
JP14996281A 1981-04-07 1981-09-22 Modulation circuit Granted JPS5851640A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP14996281A JPS5851640A (en) 1981-09-22 1981-09-22 Modulation circuit
US06/448,906 US4644531A (en) 1981-04-07 1982-04-01 Time division communication system
PCT/JP1982/000094 WO1982003515A1 (en) 1981-04-07 1982-04-01 Time-sharing communicating system
EP82901002A EP0075601B1 (en) 1981-04-07 1982-04-01 Time-sharing communicating system
DE8282901002T DE3278307D1 (en) 1981-04-07 1982-04-01 Time-sharing communicating system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14996281A JPS5851640A (en) 1981-09-22 1981-09-22 Modulation circuit

Publications (2)

Publication Number Publication Date
JPS5851640A JPS5851640A (en) 1983-03-26
JPS6357983B2 true JPS6357983B2 (en) 1988-11-14

Family

ID=15486404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14996281A Granted JPS5851640A (en) 1981-04-07 1981-09-22 Modulation circuit

Country Status (1)

Country Link
JP (1) JPS5851640A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58176590A (en) * 1982-04-12 1983-10-17 株式会社東芝 High temperature coolant cleanup device

Also Published As

Publication number Publication date
JPS5851640A (en) 1983-03-26

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