JPS6356767A - Multiplier - Google Patents

Abstract

PURPOSE:To obtain a doubly balanced modulator which operates with a low voltage of about 1V by connecting a transistor (TR) in which a first signal is inputted, and second and third TRs to function as a mixer in the parallel relation between power sources. CONSTITUTION:First TRQ11 and Q12 function as the buffer of an input signal and by the output taken out from a collector, second TRQ3, Q6, Q7 and Q10 are driven. A local signal is added to respective bases of third TRQ4, Q5, Q8 and Q9 through TRQ1 and Q2 to function as a buffer amplifier. Thus, the TR, to which the above-mentioned first signal is added, and the TR, to which a second signal is added, are arranged in parallel without coming into the relation of a serial multistage connection as previously between a power source voltage Vcc and a ground and for example, the modulator can be operated even by the low voltage of about 1V.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a multiplier having a frequency conversion function, and more particularly to a multiplier operating at low voltage.

B1 Summary of the Invention The present invention provides a multiplier for obtaining a required multiplication output.
inputting the collector output of the first transistor to which the signal is inputted to the base of the second transistor, and connecting the third transistor to the base of which the second signal is inputted and the second transistor in common emitter connection; This ensures operation at low voltage.

C9 Prior Art Conventionally, as a multiplier, there is a double-balanced modulator as shown in FIG.

To briefly explain the double-balanced modulator shown in FIG. 2, transistors Q21. Q22. Q23, Q24.
Q25. Q26. Q27, transistors Q21 . Q22 and Q25. Q26 is a transistor pair for differential amplification, and transistors Q23 . Q27 is
Input signals (S I GN
AL) is input, and transistor Q24 functions as a constant current source. Local oscillation signals (LOCAL) such as carrier waves are applied to loads R21 and R26, respectively, with respect to power supply potential Vcc.
The transistor Q21 whose collector is connected via
and are input to the base of Q26 as signals having mutually opposite phases.

The multiplication output (○UTPtJT) is taken out from the collectors of the transistors Q21 and Q26, respectively.

D1 Problem to be Solved by the Invention A double-balanced modulator having such a configuration has a problem that it cannot operate satisfactorily when the power supply potential Vcc becomes a low potential, for example, about IV.

That is, for example, if the power supply potential Vcc is set to IV, the collector-emitter voltage Vce (sat) of the saturated stripes of transistor Q24, transistor Q23, and transistor Q21 (same for other transistors) is each about 0.2'V. Therefore, the difference between the maximum value and the minimum value of the multiplication output is only about 0.4V.

In the current situation where electronic devices and ICs are becoming increasingly low-voltage, it is necessary to ensure a dynamic range even at low voltages, and a multiplier that can operate satisfactorily even at low voltages is desired.

Therefore, in view of the above-mentioned technical problem, the present invention aims to provide a multiplier that can operate satisfactorily even at low voltage.

E8 Means for Solving Problems The present invention provides a first transistor whose collector is connected to a power supply potential through a load and whose emitter is connected to a constant current source, and a transistor whose emitters are both connected to a constant current source. and a second and third transistor forming a pair, the collector of the first transistor is connected to the base of the second transistor, and a first signal is input to the base of the first transistor. The above problem is solved by a multiplier in which a second signal is input to the base of the third transistor to obtain a required multiplication output.

F1 action In the multiplier of the present invention, the first transistor to which the first signal is input is in a multistage connection relationship with the second and third transistors functioning as a mixer between the power supply potential VCC and the ground. Therefore, the dynamic range can be expanded by the collector-emitter voltage Vce (sat) of one transistor.

G. Example Preferred embodiments of the present invention will be described with reference to the drawings.

l) An embodiment of the calculator of the present invention is an example of a double-balanced modulator as shown in FIG. .

First, as shown in FIG. 1, the double-balanced modulator of this embodiment has a collector connected to a power supply potential Vcc via a load, for example, R3, and an emitter connected to a constant current source, for example, a transistor Q14. 1 transistor, for example Qll
and a second . A third transistor, for example Q3. It has Q4.

Furthermore, the collector of the first transistor, for example Qll, is
Each is connected to the base of the second transistor, for example Q3.

At the base of the first transistor Qll,
An input signal (SIGNAL), which is a first signal, is input, and a second signal (LOCAL) is input to the base of the third transistor, for example, Q4, and a predetermined modulated output signal (○tJTPUT) is input. For example, Mr. 1 anti-R4
For example, it is taken out from the midpoint of transistor Q3.

That is, the double-balanced modulator as a multiplier of this embodiment is provided with four transistor pairs each consisting of a second transistor and a third transistor. a transistor pair consisting of a transistor Q6. A transistor pair consisting of transistors Q5 and Q7. A transistor pair consisting of transistor Q8 and a transistor pair consisting of transistors QIO and Q9 are provided as a differential transistor pair whose emitters are connected in common. By providing the four differential transistor pairs in this way, it is possible to handle the input signal and the local oscillation signal, which are in positive phase and negative phase, respectively, and to obtain a double-balanced modulated output. Further, the transistor Q3. Q4 and the above transistor Q5. Q
The commonly connected emitters of 6 are further commonly connected to a transistor Q15 which functions as a constant current source, and this transistor Q15 is fi? Grounded via WR9. Further, the transistor Q7. Q8
and the above transistor Q9. The commonly connected emitters of QIO are further commonly connected to a transistor Q16 that functions as a constant current source, and this transistor Q16 is grounded via a load RIO.

Transistor Q11 as a first transistor; transistor Q12 as another first transistor
and the emitters thereof are commonly connected to form a differential transistor pair, and the commonly connected emitters are connected to a transistor Q14 functioning as a constant current source, and the transistor Q1
4 is grounded via a load 8. Furthermore, the power supply potential V
The collector of the transistor Qll, which is connected to CC via the load R3, is connected to the bases of the transistors Q3 and Qll, respectively.
The collector of the transistor Q12 connected through the transistor Q5 is connected to the bases of the transistors Q6 and Q7, respectively. And transistor Qll and transistor Q
12, input signals (SIGNAL) having mutually opposite phases are inputted to the base.

A local oscillation signal (LOCAL) as a second signal is input as a mutually opposite phase signal to a transistor pair of transistors Q1 and Q2 whose emitters are connected in common, and the emitters connected in common function as a constant current source and load It is connected to the grounded transistor Q13 via R7. Furthermore, the collector of the transistor Q1, which is connected to the power supply potential Vcc via the load R1, is connected to the bases of the transistors Q4 and Q5, respectively, and the collector of the transistor Q1 is connected to the power supply potential Vcc through the load R1.
The collector of transistor Q2, which is connected to C through load R2, is connected to the bases of transistors Q8 and Q9, respectively.

The collector of the transistor Q3 as the second transistor is connected to the power supply potential ■cc via the load R4,
Furthermore, it is connected to the collector of the transistor Q7, and this becomes one of the output terminals. Further, the collector of the transistor QIO as the second transistor is connected to the load R6.
It is connected to the power supply potential VCC through the transistor Q6, and further connected to the collector of the transistor Q6, and becomes the other output terminal.

Note that the transistor Q13 functioning as the constant current source
．． Q14. Q15. The base of Q16 has a bias potential (
BIAS) is supplied.

In the doublet f%j transformer of this embodiment having such a configuration, the first transistor Q11゜Q12 is
Functions as a buffer for the input signal (SIGNAL),
By the output taken from that collector, the second
transistor Q3. Q6, Q7. Drives QIO.

Further, the local oscillation signal (LOCAL) is transmitted through transistors Ql and Q2 functioning as buffer amplifiers to three transistors Q4. Q5. Q8. Q9 is added to each base of the second transistor Q3.
Q6. Q7. Switching QIO or its GM (
The required multiplication power can be obtained by varying the mutual contaliquence).

In the double-balanced modulator of this embodiment, the required multiplication output can be obtained, but the transistor to which the first signal is applied and the transistor to which the second signal is applied are at the power supply potential Vcc. There is no multi-stage connection with the ground, and therefore sufficient operation is possible even with a low voltage, for example, IV.

That is, the second transistor Q3. Q6. Q7, QI
The potential of the collector of O becomes the output potential. For example, when the power supply potential Vcc is set to 1■, the collector-emitter voltage V ce (sat) of the transistor Q15 or Q16 functioning as the constant current source is approximately 0. 2V
and the second transistor Q3. Q6. Q
7. QIO collector-emitter voltage Vce(sat
) is approximately 0.2■, its output voltage (O
The potential difference between the maximum and minimum values of UT P UT) is approximately 0.
．． It will be about 6V. When compared with a multiplier as shown in FIG. 2, it can be seen that it is easy to obtain a Guinami no clean range that exceeds 0.4 V, which is the potential difference between the maximum and minimum values of the conventional output voltage (OUTPUT).

In this way, the double-balanced modulator, which is the multiplier in this embodiment, is
For example, even at a low voltage of about 1V, a larger value can be obtained than in the past.

In the above embodiment, a double-balanced modulator has been described as an example of a multiplier, but the present invention is not limited to this, and other multipliers may be used.

H0 Effects of the Invention In the present invention, the first transistor to which the first signal is input and the second and third transistors functioning as a mixer are not in a multi-stage connection relationship between the power supply potential Vcc and the ground. Therefore, even if the voltage is as low as, for example, 1V, a large potential difference between the maximum and minimum output values can be obtained.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a double-balanced modulator as an example of the configuration of a multiplier according to the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional multiplier. Qll, Q12...first transistor Q3. Q6.
Q7. QIO...second transistor Q4. Q5. Q8. Q9: Third Transis patent applicant Patent attorney representing Sony Corporation
Koike Mima Sakae Tamura

Claims (1)

[Claims] A first transistor whose collector is connected to a power supply potential via a load and whose emitter is connected to a constant current source; a second transistor whose emitters are both connected to a constant current source and constitutes a transistor pair; a third transistor; the collector of the first transistor is connected to the base of the second transistor; the first signal is input to the base of the first transistor; A multiplier in which a second signal is input to the base of a transistor to obtain the required multiplication output.