JPS6355625U

JPS6355625U -

Info

Publication number: JPS6355625U
Application number: JP14918486U
Authority: JP
Priority date: 1986-09-29
Filing date: 1986-09-29
Publication date: 1988-04-14

Description

[Brief explanation of the drawing]

第１図は本考案実施例のシンセサイザー受信機
の回路図、第２図はのこぎり波掃引を示す掃引動
作図、第３図は本考案の掃引動作を説明するオー
トプリセツト掃引動作図、第４図は本考案のダブ
リ防止動作を説明するフローチヤート図である。２…高周波増幅回路、５…制御トランジスタ、
６…局部発振回路、７…ＰＬＬ回路、８…プログ
ラマブル分周器、１３…分周比設定手段、１７…
一時記憶メモリ、１８，２０…比較回路、２３…
プリセツト用メモリ、２８…出力禁止回路、２９
…キー入力手段、３１…オートプリセツトモード
記憶フリツプ・フロツプ、３３…ＬＯＣＡＬ／Ｄ
Ｘ受信モード記憶制御回路、３６…受信モード記
憶フリツプ・フロツプ、３７…受信モードデータ
出力回路、３９…オートプリセツトモード解除回
路、４３…ダブリ防止回路、４７…ＢＣＤカウン
タ、４８…１０進デコーダ、５０…アドレス番号
比較回路、５２…一致検出回路、ＡＰ…オートプ
リセツトキー、Ｐ_１〜Ｐ_５…プリセツトキー。 FIG. 1 is a circuit diagram of a synthesizer receiver according to an embodiment of the present invention, FIG. 2 is a sweep operation diagram showing a sawtooth wave sweep, FIG. 3 is an auto preset sweep operation diagram explaining the sweep operation of the present invention, and FIG. The figure is a flowchart for explaining the double prevention operation of the present invention. 2... High frequency amplifier circuit, 5... Control transistor,
6... Local oscillation circuit, 7 ... PLL circuit, 8... Programmable frequency divider, 13... Frequency division ratio setting means, 17...
Temporary storage memory, 18, 20... Comparison circuit, 23...
Preset memory, 28...Output prohibition circuit, 29
...Key input means, 31...Auto preset mode memory flip-flop, 33...LOCAL/D
X reception mode storage control circuit, 36...Reception mode storage flip-flop, 37...Reception mode data output circuit, 39...Auto preset mode release circuit, 43...Double prevention circuit, 47...BCD counter, 48...Decimal decoder, 50... Address number comparison circuit, 52... Match detection circuit, AP... Auto preset key, _P1 to _P5 ... Preset key.

Claims

[Scope of utility model registration request]

A local oscillation circuit configured with a PLL circuit, a high frequency amplification circuit, a switching means for switching the high frequency amplification circuit to a LOCAL or DX reception state, and receiving mode data indicating whether LOCAL reception or DX reception is to be supplied to the switching means. L to set the high frequency amplifier circuit to LOCAL or DX reception state.
OCAL/DX setting means, temporary storage memory,
Preset memory, auto preset key, and the above LO by turning on the auto preset key.
The CAL/DX setting means operates the switching means to switch the high frequency amplifier circuit to a LOCAL receiving state, sets the contents of the frequency division ratio setting means in the temporary storage memory, and causes the sweeping means to start sweeping. , the contents of the frequency division ratio setting means and the LOC are stored in the preset memory each time a receiving station is detected.
The reception mode data of the AL/DX setting means is preset, and when the content of the frequency division ratio setting means matches the content of the temporary storage memory, the LOCA
L/DX setting means supplies DX reception mode data to the switching means, and the high frequency amplification circuit is set to D.
A synthesizer receiver comprising control means for presetting the contents of the frequency division ratio setting means and the reception mode data of the LOCAL/DX setting means in the presetting memory every time the receiver switches to an X reception state and detects a reception station. In the control means,
After switching the DX reception of the high frequency amplifier circuit, each time a receiving station is detected, the frequency division ratio data of the receiving station is compared with the frequency division ratio data of the LOCAL receiving station preset in the preset memory, and if a match is detected. A synthesizer receiver comprising a double prevention means for activating the sweeping means and presetting the receiving station received by the DX reception sweep in the presetting memory upon detecting a mismatch.