JPS635456A - Microprocessor system - Google Patents

Abstract

PURPOSE:To improve a processing capacity by connecting an exclusive memory directly to a bus as the work memory of a microprocessor, thereby making the accesses from plural input/output devices to corresponding local memories independent of each other. CONSTITUTION:During accessing the local memory 104 by the MPU 101, when the I/O device 105 having a function of automatic reading/writing of a data accesses a memory 104, a decision circuit 103 stops the action of the MPU 101 after the ending of its W/R cycle, and shifts the occupation right to the local bus 113 from the MPU 101 to the device 105. Accordingly, the device 105 starts accessing the memory 104. During accessing the memory 104 by the device 105, when the MPU 101 executes a W/R to/from MPU exclusive memory 102, since an MPU bus 112 is occupied by the MPU 101, a W/R cycle is executed without accessing the decision circuit 103.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a microprocessor system, and particularly to a microprocessor system in which a plurality of input/output devices under a microprocessor autonomously read and write data into the memory space of the microprocessor. between processor systems.

(Prior Art) Conventionally, this type of microprocessor system has a system-shared memory that can be read and written at any time, and a plurality of input/output devices each having a function of autonomously reading and writing data to this memory. Prevention and determination of processor bus occupancy rights between multiple input/output devices that are connected to a single microprocessor bus and have the ability to autonomously read and write data to and from the microprocessor and memory at any time. In many cases, the configuration includes a bus occupancy determination circuit that performs the following.

FIG. 2 is a block diagram showing a conventional example of a microprocessor system having this configuration.

The system shared memory 203 is one of the input/output devices 204 that has a function of autonomously reading and writing data during the reading or writing cycle of the system shared memory 203 which is read and written by the microprocessor 201 at any time.
When it becomes necessary to read or write the bus 207, a request is made to the bus occupancy determination circuit 202 to occupy the bus 207.
In response to this request, the bus occupancy determination circuit 202 issues a bus use disallowance signal to the microprocessor 201, and when the read or write cycle of the microprocessor 201 is completed and a bus use disallowance response signal is returned from the microprocessor 201, the bus ownership determination circuit 202 autonomously outputs a bus use disallowance signal to the microprocessor 201. The input/output device M2O4, which has the function of reading and writing data, returns permission to occupy the bus 207 and passes the right to occupy the bus 207. When the use of the bus 207 is finished, the input/output device M2O4 issues a request to occupy the bus 207. stop. As a result, the bus occupancy determination circuit 202 stops the bus usage disallowance signal that was being sent to the microprocessor 201 and passes the occupancy of the bus 207 to the microprocessor 201.

(Problems to be Solved by the Invention) In the conventional microprocessor system described above, since there is only one bus for the processor, data is read or written to the system shared memory 203 by the microprocessor 201 or autonomously. Any one of the multiple input/output devices 204, 205, 206 with functions
There is only one thing that can be done, and Microbrosé Nsa 20
When 1 generates a bus occupancy request from an input/output device that has the function of autonomously reading and writing data at once while reading or writing to the system shared memory 203, microprocessor 20
The input/output devices 204, 205 and 206 have the function of stopping the operation of 1 and reading and writing data autonomously.
system shared memory 20 until it acquires bus occupancy.
3, data reading or writing cannot be performed and the operation stops, resulting in a disadvantage that the processing capacity of the entire system is reduced.

[Means for solving problems]

The microprocessor system of the present invention has a local memory in which a memory space is allocated to correspond to an input/output device, and a microprocessor system that allows reading or writing from both the input/output device and the microprocessor to the local memory. It has a local bus that is separate from the server bus, and a local bus occupancy determination circuit for each local bus that determines whether the local bus occupancy is for the input/output device or the microprocessor. It is characterized in that the microprocessor-dedicated memory is directly connected to the microprocessor bus.

In this way, each input/output device is provided with a local memory, a local bus, and a local bus occupancy determination circuit, so that while the microprocessor is accessing local memory on one local bus, it can access local memory on another local bus. Even if an input/output device accesses its corresponding local memory, the microprocessor's operation will not be stopped, and multiple input/output devices can access their corresponding local memory independently, and the microprocessor's Since the operation does not stop and the microprocessor can read from or write to the microprocessor-dedicated memory, processing power is improved compared to conventional systems.

(Example) Next, what is the drawing percentage for the example of the present invention? I will refer to and explain.

FIG. 1 is a block diagram of an embodiment of a microprocessor system according to the present invention.

In this embodiment, a microprocessor bus 112 of a microprocessor 101 that controls the processing functions of the entire system is used.
A microprocessor-dedicated memory 102 serving as a work area for the microprocessor 101 is connected to the top, and input/output devices 105, 108, and 111 each having a function of autonomously reading and writing data are connected to a local bus. + 13.114. + 15 and microprocessor bus 112 are separated, and microprocessor 10
1 and input/output devices 105.108. I I + from both local memories 104.107. + Local bus occupancy determination circuits 103, 106, and 109 for preventing contention when reading or writing to 10
% to the microprocessor bus 112.

Local memory 10 with one microprocessor 101
4. When the input/output device 105, which has the function of reading and writing data autonomously during access, issues an access request to the local memory 104, the local bus occupancy determination circuit 103 issues a request to occupy the local bus 113. A signal is sent, and the local bus occupancy determination circuit 103
When the read or write cycle of the microprocessor 101 is completed, the operation of the microprocessor 101 is stopped, the occupancy of the local bus 103 is transferred from the microprocessor 101 to the input/output device +05, and the occupancy permission signal of the local bus 113 is returned. The input/output device 105 starts accessing the local memory 104. After this access is completed, the input/output device 105 transfers data from the local bus 11 to the input/output device 105.
When the occupancy request signal No. 3 stops, the local bus occupancy determination circuit 103 restarts the operation of the microprocessor 101 and returns the occupancy of the local bus 113 to the microprocessor 101.

Next, the input/output bag M108, which has the function of autonomously reading and writing data on other local buses 114 that the microprocessor 101 is not accessing while accessing one local memory 104, writes data to the local memory 107. When an access request occurs, the input/output device 108 sends an occupancy request signal for the local bus 114 to the local bus occupancy determination circuit 106, but since the microprocessor 101 has not accessed the 0-cal memory 107, the local Bus occupancy determination circuit 106
immediately returns the occupancy permission signal for the local bus 114 to the input/output device 108 without stopping the operation of the microprocessor 101, so that the input/output device 108 starts accessing the local memory 107. After this access ends,
When the local bus 114 occupancy signal from the input/output bag M108 stops, the local bus occupancy right determination circuit 106
gives exclusive rights to the local bus 114 to the microprocessor 1.
01, the third input/output bag M105, which has the function of reading and writing data autonomously, acquires exclusive rights to the local bus 113, and while accessing the local memory 104, it autonomously reads and writes data. Even when the input/output device f108, which has read/write functions, requests access to the local memory 107, the local bus occupancy determination circuit 106 receives the local bus 114 occupancy request signal from the input/output device 108. , since the microprocessor 101 has not accessed the local memory 107, immediately issues a signal to permit occupation of the local bus 114 without stopping the operation of the microprocessor 101, and transfers ownership of the local bus 114 to the input/output device 10; Access to the local memory 107 of the input/output device 108 is started. When this access is completed, the occupancy permission signal for the local bus 114 from the input/output device 10 is stopped, and the local bus occupancy determination circuit 106 returns the occupancy right for the local bus 114 to the micro processor 101. Then, the input/output device 105, which has the function of autonomously reading and writing data, acquires exclusive rights to the local bus 113, and the microprocessor +01 reads the microprocessor-dedicated memory 102 while accessing the local memory 104M. Or, when it becomes necessary to write, the microprocessor bus 112 is always occupied by the microprocessor +01, so reading or writing can be performed immediately without accessing the local bus occupancy determination circuit 103.

〔Effect of the invention〕

As explained above, the present invention allocates a memory that is accessed by a plurality of input/output devices that have the function of autonomously reading and writing data as a local memory for each input/output device, and accesses this local memory. bus as a local bus, and a microprocessor bus as a local bus.
L! A conflict prevention circuit is provided for each local bus when local memory is accessed from both the microprocessor and the input/output device, and the microprocessor-dedicated memory is directly connected to the microprocessor bus as the microprocessor's working memory. [Continuing, while the microprocessor is accessing the local memory on one local bus, the input/output equipment that has the function of autonomously reading and writing data on another local bus is connected to the corresponding local memory. The microprocessor does not stop operating even when memory is accessed, has improved processing power compared to conventional systems, and has multiple input/output devices that have the ability to autonomously read and write data. In addition to being able to access the local memory that corresponds to each system independently, the microprocessor's operation does not stop, and the microprocessor can read and write to the microprocessor-dedicated memory, resulting in faster processing than conventional systems. It has the effect of improving abilities.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of a microprocessor system according to the present invention, and FIG. 2 is a block diagram of a conventional example. 101...Microprocessor, +02-...
...Microprocessor-dedicated memory, 103, 106
．． 109...Local bus occupancy right determination circuit 10
4.107,110 ...Local memory, +
05. +08. II+...Input/output device 112 that has the function of reading and writing data autonomously
...Microprocessor bus, +13. +
14. ＋15・・・Local bus.

Claims (1)

[Claims] In a microprocessor system in which there is one or more input/output devices that autonomously read and write to a memory space of one microprocessor, the memory space is allocated to correspond to the input/output devices. a local memory; a local bus separated from the microprocessor bus to enable reading or writing to the local memory from both the input/output device and the microprocessor; and a local bus occupancy determination circuit for each local bus that determines whether it is a device or a microprocessor, and is characterized in that a microprocessor-dedicated memory is directly connected to the microprocessor bus as working memory of the microprocessor. microprocessor system.