JPS635451A - Memory addressing system - Google Patents

Abstract

PURPOSE:To release the restrictions of the size of a memory and the number of segments and to effectively use memory space by employing a floating point address system, and dividing the large segments of an access descriptor to generate plural small segments at the inside of the descriptor. CONSTITUTION:A base address is read out by a bit field extracting circuit 5 from a memory 8 via a segment selector, etc., taken out from an access descriptor 2, and inputted to a register as a bit. By means of thus set value, a segment header is read out from the memory 8 and stored in a register 4. A segment length in said stored content and the exponent part from the descriptor 2 are compared with each other by a comparator 10; in case of coincidence, a floating point system operation without the restriction to the size of memory is executed, but in case of discrepancy a bit field extracting circuit 11 fetches the correction of a base address from the descriptor 2, the segment is divided by means of left-shifting, then processing similar to the above is executed. Thus the restriction to the segment length can be released, and the memory space can be effectively used.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a data addressing method in a segment-based memory management system.

(Prior Art) In data addressing using the conventional segment method, as shown in FIG. The target data in the target segment is accessed using the fixed length offset 32 and the included access descriptor 33.

That is, the segment selector 31 selects a specific segment disc libter 37 using an index of the segment disc libter table 36 having a fixed base address, and selects the base address of the target segment included in the segment disc libter 37 and the offset 32. The address of the target data was obtained by adding.

However, certain data processing systems, particularly object-oriented computing systems, tend to generate a large number of small segments. At the same time, large segments of image data are certainly needed. In such a case,
Memory access using the conventional method described above requires a very large access descriptor due to the large number of segments and huge segments.

To give a specific example, if we consider a 16-bit long segment discriminator consisting of a segment selector and an offset, each of which is 8 bits long, according to the conventional method, the maximum segment length is limited to 256 bytes, and the number of segments is limited to the size of the segment. Regardless, the number is limited to a maximum of 256.

In order to allow a large number of segments and a large segment at the same time, the bit length of the segment discriminator must be much longer.

In order to solve the above problem, floating point address (flo)
(point address) method has been proposed. (W, J, Dally, @An 0bje
ct Oriented Architecture-Cture
” Proceedings of the 1985
International Conference o
n Computer Architecture, p
p154 - An overview of the proposed floating point addressing system will be explained using FIG.

A bit field called an exponent part 42 is provided at a fixed position of the access descriptor 41, and when the value of the exponent part 42 is e, the lower e bit of the access descriptor 41 is set as the offset part 43, and the access descriptor 41
The remaining portion after removing the offset portion 43 is defined as a segment selector portion 44. Now, assuming that the access descriptor is 16 bits long, and 4 bits of it are the exponent part, as shown in Figure 5(a), according to the proposed floating point address system, Figure 5(a) As shown in the table b), a maximum of 211 segments with a segment length of 21,
Up to 210 segments with segment length 22,...
.

A maximum of two segments with a segment length of 2 can be created.

The proposed floating point addressing scheme as shown above solves the problem of large number of small segments and small number of dog segments to some extent.

However, the maximum number of segments with the same segment length is determined independently of segments with other segment lengths that exist in memory! Therefore, if a large number of small segments were generated, the limit on the number of segments could be reached even though there was sufficient free memory space. For example, the fifth
As shown in the figure, if the access descriptor is 16 bits long and the exponent part is 4 bits long, the memory space will be 64 bits.
However, the maximum number of segments of size 2 words is 2, or 4 words. The remaining 60I (words cannot have a segment of size 2 words).

(Problems to be Solved by the Invention) The present invention solves the above-mentioned drawbacks of the conventional floating point addressing method, and it is possible to efficiently allocate segment selectors to a small number of large segments and a large number of small segments. It is an object of the present invention to provide a data addressing method that can effectively use the entire memory space by eliminating restrictions on the maximum number of segments.

[Structure of the invention]

(Means for Solving the Problems) The present invention provides a data addressing method for accessing target data in a target segment using an access descriptor including a segment selector and an offset, the data addressing method comprising: accessing target data in a target segment using an access descriptor including a segment selector and an offset; A bit field as an exponent part is provided, and when the numerical value expressed by the exponent part is e, the access descriptor is decomposed into two bit fields: an e-bit bit field that does not include the exponent part, and a remaining part, When each is an offset part and a segment selector part, the segment has means for acquiring the base address of the corresponding segment from the segment selector by an address conversion mechanism, and the segment in the memory has a header part at the base address position, The header section includes a segment length t as one of the segment attributes, and the segment length t and the exponent section e are compared, and when they match, the target data in the target segment is extracted using the base address and the offset. accessing, when the segment length t is smaller than the exponent e, decomposing the offset into two bit fields, a bit field of t bits and a remaining part, and treating each as a true offset and a base correction; A memory addressing method characterized in that the true base address is determined from the base address and the base correction, and the target data in the target segment is accessed using the true base address and the true offset. Ru.

(effect) A specific example of the operation of the present invention will be explained using FIG. 2.

First, let the value of the exponent part 22 at a fixed position of the access descriptor 21 be e. Next, a bit field 23 with a length of e bits that does not include the exponent part 22 is extracted from the access descriptor 21 and used as an offset part, and the offset part 23 is extracted from the access descriptor 21.
The remaining portion except for the segment selector section 24 is the segment selector section 24.

25 is a segment discriminator table, which uses the segment selector as an index to determine the base address position of the corresponding segment.

By disallowing e=Q, it is possible to give different entries in the segment descriptor table for every segment selector.

The segment header 27 is accessed using the base address 26 of the segment obtained from the segment selector 24 via the segment descriptor table 25. The segment header 27 includes a segment length t.

Next, compare the segment length t and the index value e,
If the two match, the segment base address 2
6 and the offset 23, the target data in the target segment is accessed. However, if the segment length t is smaller than the exponent value e, the offset 23 is converted to a true offset section 27 having a length of t bits. and the remaining part of the base correction unit 28, and after scaling the base address correction 28 by 2, adding the base address 26 to obtain the true segment base address, The target data in the target segment is accessed by the true base address and the true offset 27.

Note that the header section located at the base address position of the segment is intended to include, as segment attributes, the segment type, reference count for garbage collection, etc. in addition to the segment length t.

(Example) FIG. 1 is a diagram showing an example of the present invention. In the figure 1
2 is a register that stores the base address of the segment descriptor table, 2 is a register that stores the access descriptor, 3 is a register that stores the base address of the segment, and 4 is a register that stores the segment header.

5 is a bit field extraction circuit which extracts a segment selector from the access descriptor 2 according to the exponent part of the access descriptor 2;

The segment selector and the base address 1 of the segment discriminator table are added by an adder 6, and the address is supplied to the memory 8 via the data selector 7, and the base address of the target segment is read from the memory and set in the register 3. .

Next, read the segment header from the memory 8 by passing the segment base address 3 through the adder 9 as it is and supplying it as the address of the memory 8;
Set to register 4.

The segment header contains the length, type, and reference information for garbage collection of the corresponding segment.

Reference numeral 10 denotes a comparison circuit, which checks whether the exponent part and the segment length match.

If the exponent part and the segment length match, the bit field extraction circuit 11 extracts the offset part from the access descriptor 2, and the adder 9 extracts the offset part from the access descriptor 2.
By adding it to segment base address 3, the address of the target data is obtained. Up to this point, the operation is almost the same as the conventional floating-point addressing method.

However, when the exponent part and the segment length are different, the bit field extraction circuit extracts the base address correction of the segment from the segment descriptor 11, shifts it to the left by t bits, and adds it to the segment base address 3. After that, it is set in register 3 again and becomes the true segment base address. Next, the header part of the target segment is read from the memory using the true segment base address and set in the register 4, the true offset is extracted from the access descriptor 2 by the bit field extraction circuit, and the true segment base address and the offset are extracted. and obtain the address of the target data in the target segment.

In the embodiment of the present invention described above, the number of comparison circuits 10, data selectors 12, and some control circuits are only slightly increased compared to the implementation of the conventional floating point addressing method. Nevertheless, embodiments of the present invention overcome the limitations on the maximum number of segments of conventional floating point addressing schemes.

〔Effect of the invention〕

The present invention includes the advantages of conventional floating point addressing schemes. That is, as long as the existence of a large segment is allowed, and any number of segment selectors can be assigned to a small segment, and the number of segments is within the range of the maximum number of segments in the conventional floating point addressing method as in the example of FIG. You can access the desired data with the same effort as with conventional methods.

Furthermore, in the method of the present invention, by subdividing a large segment and creating a plurality of small segments within it, it is possible to create and access segments exceeding the maximum number of segments in the conventional floating-point addressing method. can. Therefore, according to the present invention, there is no restriction on the number of segments other than the memory size, and memory space can be used effectively.

[Brief explanation of drawings]

Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram for explaining the operating procedure of the present invention, Fig. 3 is a diagram showing a conventional segment addressing method, and Fig. 4 is a diagram showing a proposed method. FIG. 5 is a diagram illustrating a floating point addressing method. FIG. 5 is a diagram showing the maximum number of segments corresponding to the segment length in the floating point addressing method. In FIG. 1, 1...Register for storing the base address of the segment descriptor table, 2...Register for storing the access descriptor, 3...Register for storing the segment descriptor (segment base address). 4...Register for storing segment header. 5.11... Bit field extraction circuit, 10...
Comparison circuit, 6, 9...addition circuit, 8...memory. Figure 1 Figure 2 Figure 3 Figure 4 Figure 6 (?)

Claims (1)

[Scope of Claims] In a memory addressing method in which target data in a target segment is accessed by an access descriptor including a segment selector and an offset, a bit field serving as an exponent part is provided at a fixed position in the access descriptor; When the numerical value expressed by the exponent part is e, the access descriptor is decomposed into two parts: an e-bit bit field that does not include the exponent part, and the remaining part, which are respectively used as an offset and a segment selector. means for obtaining a base address of a corresponding segment from the segment selector by a conversion mechanism, the segment in the memory has a header section at its base address location, and the header section has a segment length l as one of the segment attributes. and when the exponent part e and the segment length l match, the target data in the target segment is accessed by the base address and the offset, and when the segment length l is smaller than the exponent part e,
Decompose the offset into two bit fields, a bit field of l bits and the remaining part, define each as a true offset and a base correction, calculate the true base address from the base address and the base correction, and calculate the true base address from the base address and the base correction. A memory addressing method characterized by accessing target data in a target segment using a true base address and the true offset.