JPS6351432B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AGC voltage detection device that detects a control signal for controlling the gain of a composite video signal.
In particular, the present invention provides an AGC voltage detection device that can detect the level of a synchronization signal included in a composite video signal using a low voltage power supply and a simple circuit configuration.

Conventionally, a simple method for controlling the gain of a composite video signal to a constant value is to detect the average level of the composite video signal and control the gain of an amplifier using this average voltage. . However, with this method, when a signal from a dark screen is input, the average level decreases and the gain of the amplifier increases.
As a result, the black level of the signal rises to a gray level, and the level of the synchronizing signal also increases, causing other negative effects. As a means to solve this problem, conventional methods have been used to detect the magnitude of the synchronization signal included in the input composite video signal and control the gain of the amplifier using this detected voltage. It is possible to eliminate the drawbacks that occur when control is performed using the average value voltage of .

The conventional method for detecting the level of a synchronizing signal is to connect in series a transistor that constitutes a voltage source circuit, a load circuit, and a transistor that constitutes an amplifier circuit, as shown in Japanese Patent Application Laid-Open No. 54-92126. ,
A method has been used in which a signal obtained by delaying a synchronizing signal pulse is supplied to the base electrode of a transistor constituting a voltage source circuit. However, according to this method, since the voltage source circuit, load circuit, and amplifier circuit are connected in series, the dynamic range of the circuit design is required to efficiently and reliably detect the level of the synchronization signal. In other words, a high power supply voltage is required. Therefore, it is not suitable for implementation in an integrated circuit configured with a low-voltage power supply designed to reduce power consumption.

The present invention eliminates the drawbacks of the above-mentioned conventional example, and can reliably detect the level of a synchronization signal included in a composite video signal with a simple circuit configuration and even with a low voltage power supply.
The present invention provides an AGC voltage detection device.

An embodiment of the present invention will be described below based on the drawings. FIG. 1 is a circuit configuration diagram showing one embodiment of the present invention, and FIG. 2 is a signal voltage waveform diagram for explaining the operation of FIG. 1.

In FIG. 1, 1 is an input terminal for inputting a composite video signal, 2 is an output terminal, 3 is a switch that is opened and closed by a pulse obtained by delaying a synchronization signal separated from the composite video signal by about 2 to 3 μsec, T ₁ , T ₂ and T ₃ are transistors, D ₁ and D ₂ are diodes,
R ₁ , R ₂ , R ₃ are each a resistor, C ₁ is a capacitor,
E ₁ and E ₂ are the DC power supplies, and I ₁ and I ₂ are the currents of the current sources. When a positive composite video signal is supplied from input terminal 1 through capacitor C ₁ , the peak of the synchronizing signal is clamped by diode D ₁ . Therefore, the voltage V ₁ at the peak of the synchronization signal at the base of the transistor T ₁ becomes V ₁ E ₁ +V _D , where V _D is the forward voltage of the diode D ₁ . Here, a DC power supply E ₂ is supplied to the base of one of the transistors T ₁ and _{T 2} that constitute the differential amplifier, so that the potential of E ₂ becomes E ₂ = E ₁ + V _D V _{1. When set to _ _ _} The potential is constant regardless of the signal size.

FIG. 2b shows the voltage waveform at the output terminal 2 when the transistor _T3 is in the cut-off state.

Next, the synchronization signal separated from the composite video signal is
A pulse signal as shown in FIG. 2a is generated with a delay of about 2 to 3 .mu.sec, and the switch 3 is driven with this pulse signal as well. The switch 3 operates to conduct when the pulse signal is Hi and to shut off when the pulse signal is Low.

When the switch 3 becomes conductive, the current source current _I2 flows through the diode _D2 , and therefore the transistor _T3 , which forms a current mirror circuit with the diode _D2 , flows through the diode D2.
A current approximately equal to I ₂ also flows through the collector of . Therefore, a current I ₂ flows through the collector of the transistor T ₃ , and this current I ₂ becomes a part of the collector current of the transistor T ₁ , so the signal level at the output terminal 2 is I ₂ R ₁ compared to that in FIG. 2b. The potential increases only by
A voltage waveform as shown in FIG. 2c is obtained. That is, in FIG. 2c, V ₃ -V ₂ =I ₂ R ₁ .

In the voltage waveform of FIG. 2c, the potential V ₂ is the potential at the peak of the synchronization signal, and is always _a constant potential regardless of the magnitude of the composite video signal input to the input terminal 1. The value of V ₄ ) indicates the magnitude of the synchronization signal at the output terminal 2.

The magnitude of the synchronization signal at output terminal 2 (V ₂ −
V ₄ ) is calculated as follows: (V ₂ − _{V 4 )} ≒R ₁ /R ₂ +2r _e1 V ₀ (r _e1 is the emitter resistance of transistors T ₁ and T ₂ ). Therefore, the potential at output terminal 2 V ₄
Since the value of changes in proportion to the magnitude of the synchronization signal of the composite video signal input to input terminal 1, by detecting this potential _V4 , a signal for controlling the gain of the variable gain circuit can be obtained. .

Here, the switch 3 is driven by a delayed pulse (FIG. 2a) separated from the composite video signal, and the current I ₂ flowing to the collector of the transistor T ₃ is controlled, but the value of the current I ₂ is I ₂ R By setting ₁ to be approximately the same as the P-P value (from the synchronization signal peak value to the white peak value) of the composite video signal at the output terminal 2, for example, the synchronization signal included in the composite video signal It is possible to obtain a stable control signal even when the section becomes short in the transmission system.

FIG. 3 shows an embodiment of a circuit configuration for stably processing the signal detected at the output terminal 2 in the embodiment of FIG. In Figure 3, 1, 2, 3,
T ₁ , T ₂ , T ₃ , D ₁ , D ₂ , R ₁ , R ₂ , R ₃ , C ₁ , E ₁ ,
E ₂ and I ₂ have the same functions as those with the same reference numerals in the embodiment shown in FIG. The operation of the circuit configuration shown in FIG. 3 will be explained using the voltage waveform diagrams shown in FIGS. 4a, b, and c.

In FIG. 3, the transistor T ₄ and the resistor R ₄ and the transistor T ₅ and the resistor R ₅ are the first
It corresponds to the current source I ₁ shown in the figure, and the output terminal 2 has a fourth
The voltage waveform shown in FIG. b is obtained, and the potential V ₂ is given by V ₂ =V _cc −R ₁ I ₁ as in FIG.

On the other hand, if the collector current of transistor T ₇ is I ₄ , the collector potential V ₂ ′ of T ₇ becomes V ₂ ′ = V _cc −R ₇ I ₄ , so now R ₁ I ₁ ≒ R ₇ I ₄ Resistance _R7 ,
When the value of R ₈ is set, the base potential of transistor T ₈ becomes almost equal to the value of potential V ₂ at the peak of the sync signal at the base of transistor T ₁₁ , so transistors T ₉ and T ₁₀ form a differential amplifier. The voltage waveform at the collector of transistor _T10 is as shown in FIG. 4c. In FIG. 4c, the value of the potential V ₅ at the peak of the synchronization signal is V ₅ =V _cc −R ₁₂・I ₃ if the values of resistors R ₁₁ and R ₁₅ are equal and the values of resistors R ₁₃ and R ₁₄ are equal. /2 and is always at a constant potential regardless of the magnitude of the composite video signal input to input terminal 1.

Therefore, in Fig. 4c, the value (V ₆ - V ₅ ) represents the magnitude of the synchronizing signal, and when the peak potential of this V ₆ is detected by transistor T ₆ , capacitor C ₂ , and resistor R ₆ , the output terminal 4, a voltage proportional to the magnitude of the synchronizing signal of the composite video signal is obtained, and the gain of the variable gain circuit can also be controlled using this voltage.

As explained above, according to the present invention, the collector of a transistor constituting an amplifier circuit, a load circuit, and a DC power source are connected in series, and a current source circuit is connected in parallel to the load circuit, so that a current flows through the current source circuit. By controlling the synchronization signal pulse using a delayed signal, the level of the synchronization signal included in the composite video signal can be accurately detected with a simple circuit configuration even when the power supply voltage is low. Therefore, by controlling the gain of the variable gain circuit based on the level of the detected synchronization signal, a stable AGC circuit can be constructed even with a low voltage power supply, which is highly effective in designing integrated circuits.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a voltage waveform diagram for explaining the circuit operation of the embodiment of Fig. 1, and Fig. 3 is an output in the embodiment of Fig. 1. FIG. 4 is a circuit diagram showing an embodiment of a circuit for stably processing signals, and is a voltage waveform diagram for explaining the circuit operation of the embodiment in FIG. 1...Input terminal, 2...Output terminal, 3...Switch circuit, _T1 , _T2 , _T3 ...Transistor, _R1 ,
R ₂ , R ₃ ... Resistor, D ₁ , D ₂ ... Diode, C ₁ ...
...capacitor, E ₁ , E ₂ ... voltage source, I ₁ , I ₂ ... current source.

Claims (1)

[Scope of Claims] 1. A collector of a first transistor constituting an amplifier circuit, a load circuit, and a DC power source are connected in series, and the load circuit and a current source circuit are connected in parallel, Supplying a composite video signal in which the peak of the synchronization signal is clamped to a constant potential to a control terminal, and controlling the current of the current source circuit with a pulse obtained by delaying the synchronization signal separated from the composite video signal by a constant time, It is characterized in that it is configured to obtain an output signal from the load circuit.
AGC voltage detection device. 2. The current source circuit includes a second transistor complementary to the first transistor, the collector of which is connected to the collector of the first transistor, and the emitter of which is connected to the DC power supply directly or via an impedance element. AGC voltage detection according to claim 1, further comprising controlling the current of the current source circuit by supplying a pulse obtained by delaying the synchronizing signal by a certain time to the base of the second transistor. Device.