JPS6350172A - Video camera unit - Google Patents

Abstract

PURPOSE:To eliminate clamping off in the upper part of a picture that deteriorates picture quality by providing a clamp signal control section for stopping clamp signals for an optional time in time of accumulation of signal charge that becomes television signals. CONSTITUTION:A clamp signal stop signal 12 becomes potential Va in an optional period from the first read signal 9 to the second read signal 10, and becomes potential Vb (Va<Vb) in other period. By this clamp signal stop signal 12, a clamp signal 13 is not generated while the clamp signal stop signal is potential Va, and generated only when potential is Vb. Thus, by providing a clamp signal control section that stops the clamp signal in an optional period from the first read signal and the second read signal, clamping off in the upper part of a picture can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video camera device using a solid-state image sensor.

BACKGROUND OF THE INVENTION In recent years, low-speed playback, frame-by-frame playback, special playback of still images, etc. have become popular in video decks. For this reason, high-speed video cameras that reduce the amount of motion of a video subject during special playback are attracting attention.

An example of the conventional high-speed video camera mentioned above will be described below with reference to the drawings.

FIG. 3 is a block diagram showing the overall configuration of a high-speed video camera using a conventional interline charge-coupled solid-state image sensor (hereinafter abbreviated as IL-COD).

14 is an optical lens, 16 is an IL-COD, 16 is a signal processing unit that converts the signal output from 16 into a television signal, and 17 is operated by 15. The drive section 18 is a signal processing pulse generation circuit that generates the signals used in the drive section 16.

The operation of the conventional high-speed video camera using IL-COD configured as described above will be described below.

First, 1 optical signal is input through 14 optical lenses.
6 IL-CCI), and the accumulation time is divided into 17 IL-CCI).
The signal generated by the drive unit is controlled and converted into an electrical signal. Thereafter, in the 16 signal processing unit, the signal generated by the 18 signal processing pulse generation circuits is used to convert the signal into a television signal.

The configuration and operation of the IL-COD will be explained below with reference to FIGS. 4 and 5. In FIG. 4, 19 is a photodiode 20 as a photoelectric conversion element, and this vertical transfer register is a vertical transfer gate 21+2.
2.23.24. 2; 5 is a signal read gate, which is equivalently common to vertical transfer gates 21 and 23; 26 is a vertical transfer pulse supply terminal.

27 is a horizontal transfer register, and this horizontal transfer register is composed of horizontal transfer gates 28 and 29. 30
is a horizontal transfer pulse supply terminal.

Reference numeral 31 denotes a charge detection section, which converts the transferred signal charge into a signal voltage. The charge detection unit 31 normally has a 70-ring diffusion ann 7' (Floa eclipse Dif').
f'usion Amplifier). 32 is a signal output terminal.

The photodiode 19 photoelectrically converts incident light from a subject to obtain signal charges. The signal charge obtained by photoelectric conversion is transferred to the vertical transfer register 2 via the signal readout gate 25.
After reading n into the vertical transfer gates constituting 0, the data is sequentially transferred in the vertical direction, that is, in the direction of the horizontal register 27, by the vertical transfer pulse supplied from the vertical transfer pulse supply terminal 26. is loaded into. The signal charge read into the horizontal transfer register is sequentially transferred to the charge detection section 31 from the horizontal transfer pulse supplied from the horizontal transfer pulse supply terminal 30, converted into a voltage by the charge detection section 31, and then transferred from the signal output terminal 32. Obtained as a point sequential signal.

A television signal is obtained by passing the dot sequential signal obtained by the method described above through the signal processing section 16 shown in FIG.

FIG. 5 shows a timing chart of vertical transfer pulses supplied to the vertical transfer pulse supply terminal of the IL-COD,
A part of the timing chart of the signal outputted from 18 in FIG. 3 is shown and explained below.

33+ 34. are a first readout signal and a second readout signal for reading signal charges from the photoelectric conversion element to the vertical transfer register, respectively, and 36 is a horizontal readout signal for reading out the signal charges read out to the vertical transfer register by the first readout signal. This is a high-speed vertical transfer signal that is sequentially transferred to the transfer register at high speed, and 36 is a vertical transfer signal that sequentially transfers the signal charge read out to the vertical transfer register by the second read signal to the horizontal transfer register. 37 is IL
- This is a clamp signal for fixing the optical dark part of the signal output from the output terminal of the COD to an arbitrary potential.

The signal charge accumulated in the photoelectric conversion element between the first readout signal 33 of the first field and the second readout signal 34 of the first field is converted into the television signal of the first field based on the operation of the IL-COD. The signal charge accumulated in the photoelectric conversion element between the second read signal 34 of the first field and the first read signal 33 of the second field is transferred at high speed to the horizontal transfer register by the high speed vertical transfer signal 35. and is swept out during the vertical retrace period of the second field. The signal charge accumulated in the photoelectric conversion element between the first read signal 33 of the second field and the second read signal 34 of the second field is
Based on the operation of the COD, it becomes a second field television signal. The signal charge accumulated between the second read signal 34 of the second field and the first read signal 33 of the first field is transferred at high speed to the horizontal transfer register by the high speed vertical transfer signal 35, and It is swept out during the vertical retrace period.

Problems to be Solved by the Invention However, in a high-speed video camera device using the IL-COD, the signal charge swept out during the vertical retrace period overflows into the optically dark area, and the signal charge is lost during the vertical retrace period and the vertical scanning period. The clamping potential is different between the
It has the disadvantage that it adversely affects the screen.

In view of the above-mentioned problems, the present invention provides a video camera device capable of high-speed photography that eliminates clamping errors at the top of the screen by providing means for stopping the clamp signal while sweeping out the signal charge.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a solid-state imaging device that is provided with means for stopping the clamp signal during an arbitrary period between the first readout signal and the second readout signal. This device has a configuration including an element drive circuit.

Effect of the Invention With the above-described configuration, the present invention can eliminate clamping errors at the top of the screen that significantly degrade image quality.

Embodiments Hereinafter, video camera apparatuses according to embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of the overall configuration of a first embodiment of the present invention. In Figure 1, 1 is an optical lens, 2
are II, -COD, 3 is a signal processing unit, 4 is a solid-state image sensor drive circuit that drives 2, and 5 is a solid-state image sensor vertical drive circuit that is one of the components of 4; 6 is a clamp signal that is one of the components of 4; This is a signal processing pulse generation circuit that generates signals used in the control section 7ba3.

The operation of the high-speed video camera using the IL-COD configured as described above will be described below with reference to FIGS. 1 and 2.

1. First, FIG. 2 shows the timing of the vertical pulse supplied to the vertical pulse supply terminal of the IL-COD, the clamp signal stop signal generated from the clamp signal control section, and the clamp signal generated from the signal processing pulse generation circuit. It is a chart.

Signal 8 in FIG. 2 is signal 36 in FIG. 5, signal 9 is signal 33 in FIG.
The signal 1o is equivalent to 34, and the signal 11 is equivalent to 36.

IL-COD between the first read signal 9 of the first field and the second read signal 10 of the first field
The signal charge accumulated in the photoelectric conversion element of the IL-1c
Based on the operation of D, it becomes the television signal of the first field, and I
The signal charge accumulated in the photoelectric conversion element of the L-COD is transferred at high speed to the horizontal transfer register by the high-speed vertical transfer signal 11, and is swept out within the vertical retrace period of the second field. rL-CO between the first read signal 9 of the second field and the second read signal 1o of the second field
The electromagnetic signal charge accumulated in the photoelectric conversion element D is transferred to the IL-C
A second field television signal is generated based on the operation of the OD. I between the second read signal 10 of the second field and the first read signal 9 of the first field
The signal charge accumulated in the L-CCDOC type O-converting element is transferred at high speed to the horizontal transfer register by the high-speed vertical transfer signal 11 and is swept out during the vertical retrace period of the first field.

The clamp signal stop signal 12 has a potential V during an arbitrary period from the first read signal 9 to the second read signal 1o, and has a potential Vb (Va>Vb) during other periods. Due to the clamp signal stop signal 12, the clamp signal 13 is not generated during the period when the clamp signal stop signal is at the potential V&, but is generated only during the period when the clamp signal stop signal is at the potential Vb.

As described above, according to this embodiment, by providing a clamp signal control section that stops the clamp signal during an arbitrary period between the first read signal and the second read signal, the clamp at the top of the screen can be suppressed. The deviation can be eliminated, and a high-speed video camera device with good characteristics can be provided.

In the first embodiment, 2 in FIG. 1 is an IL-COD, but the same applies to a frame transfer charge-coupled solid-state imaging device.

Effects of the Invention As described above, according to the present invention, a clamp signal control unit is provided to stop the clamp signal for an arbitrary period within the signal charge accumulation time of the television signal, thereby reducing the problem at the top of the screen where image quality is degraded. The clamp can eliminate the misalignment and its effectiveness is excellent.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the overall configuration of the first embodiment of the present invention, FIG. 2 is a timing chart of signals of each part in FIG. 1, and FIG. 3 is a diagram of a conventional video camera device using IL-COD. 4 is a block diagram of the overall configuration, FIG. 4 is a configuration diagram of the camera section of FIG. 3, and FIG. 6 is a timing chart of signals of each part in FIG. 3. 2...xL-CCD13...signal processing section, 4...solid-state image sensor drive circuit, 5...
. . . Solid-state image sensor vertical drive circuit, 6 . . . Clamp signal control section, 7 . . . Signal processing pulse generation circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 3 Figure 4

Claims (1)

[Claims] It has a plurality of read signals for reading charges accumulated in the photoelectric conversion element of the solid-state image sensor into the vertical transfer register of the solid-state image sensor within one vertical retrace period, and the photoelectric conversion element of the solid-state image sensor is transferred to the In a video camera device that electrically controls the accumulation time of signal charges extracted as a motion signal, a clamp signal for fixing the optical dark part of the output signal of the solid-state image sensor to an arbitrary potential includes the accumulation time. A video camera device characterized by being stopped for an arbitrary period of time.