JPH01228378A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To equivalently increase the number of frames by reading out a stored signal charge several times to a first charge transfer part in an exposure period and transferring it to a second charge transfer part, adding the charge of the same picture element read out in one and the same exposure period by the second charge transfer part, and thereafter, outputting it. CONSTITUTION:The charge transferred by a vertical CCD 203 is read out of the transfer electrode V31 of a vertical CCD 205 through a storage gate 204, and added to the charge injected earlier. These operations are repeated several times, and thereafter, by driving pulses phi V31-34, the charge stored in the transfer electrode V31 is transferred at a high speed to a vertical CCD 206. Subsequently, these charges are transferred to a horizontal CCD 207 by one stage each at every horizontal blanking period, and outputted as the signal of one line through a charge detecting part 208 and an output amplifier 209 by the horizontal CCD 207. The charge generated in a photoelectric converting element 201 is added three times by the vertical CCD 205 and outputted in the next field. In such a way, an image where the image of a shutter time determined by t1 is overlapped by several frames can be obtained. Also, a signal outputted from an output amplifier 209 comes to conform with a standard TV signal.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an imaging device for photoelectrically converting an optical image formed by an optical lens in a video camera, an electronic still camera, etc. The present invention relates to a solid-state imaging device using (COD).

Conventional technology A commonly used COD type image sensor uses a photodiode as a photoelectric conversion element, a CD (CD) for vertical and horizontal transfer, and an FIT type image sensor that has a storage section (buffer memory) separate from the light receiving section. (Frame-Interl 1
ne-Transfer) -There is something called COD. This FIT-CICD is an IL (InterLin
e-transfer) - IL-CO, which has been the mainstream until now, has several characteristics compared to COD.
It is gradually being replaced by D.

Since the configuration and operation of IL-COD are well known, their explanation will be omitted. Examples of this FIT-CCD image sensor include Japanese Patent Laid-Open No. 55-52675 and Japanese Patent Laid-Open No. 55-1639.
This is shown in Publication No. 63.

The outline will be explained below using FIG. 3.

FIG. 3 shows the basic configuration of the FIT-COD, which is composed of a light receiving area A, a storage area B, a horizontal scanning area C9, a charge detection area, and an unnecessary charge discharge area E. The light-receiving area A includes a two-dimensional array of light-receiving elements 1, a gate 2 for reading out the signal charge accumulated in the light-receiving element 1, and a gate 2 for vertically transferring the signal charge read out through this gate. It consists of a vertical transfer register 3, and portions other than the light receiving element 1 are shielded from light by a light shielding mask 4. The vertical transfer register has a four-phase electrode structure made of polysilicon so that charges can be transferred in either the upper or lower direction in the vertical direction. Vertical transfer pulses φv1 to φ are applied to these four-phase electrodes.
v4 is applied. A vertical transfer electrode for receiving and taking signal charges accumulated in the light receiving element 1 is φv1. φ■3, and this vertical transfer electrode φV1. By superimposing a signal read pulse on the vertical transfer pulse applied to φ■3, the signal charge accumulated in the light receiving element 1 can be read into the vertical transfer register.

Therefore, φv1. By superimposing a signal read pulse on every other field on two vertical transfer pulses of φv3, 2:1 interlaced scanning can be performed.

A storage area B is arranged on an extension of the vertical transfer register. The storage area B is composed of vertical transfer registers, the number of pixels thereof is half that of the light receiving area A, and the transfer pole has a four-phase structure.

Each electrode of the vertical transfer register in storage area B has φM1 to φ.
A transfer pulse of M4 is applied. At the other end of the storage area B, a horizontal transfer area C is arranged. Horizontal transfer area C is 3
It is composed of phase transfer electrodes 5, 6.7, and horizontal transfer pulses φH1 to φH3 are applied to each transfer electrode. A charge detection area is arranged at one end of the horizontal transfer area C. Further, at the other end of the light receiving area A, an unnecessary charge discharge area E is arranged. The charge detection region is constituted by a well-known floating day fusion a/b (FDA), and has a drain for charge absorption and a lyse/sort gate of the floating day fusion.

A method for driving the FIT-COD with the above configuration will be explained with reference to FIGS. 3 and 4.

FIG. 4 shows the waveforms of the vertical transfer pulses φv1 to φv4 applied to the light receiving area A of the FIT-COD shown in FIG. 3 and the vertical transfer pulses φM1 to φM4 applied to each electrode of the vertical transfer register in the storage area B. This is an overview.

First, pseudo signals such as smear accumulated in the vertical transfer stage of the light receiving area A are transferred to the unnecessary charge discharge area E by the vertical transfer pulses φv1 to φv4 applied during the first half period 1A of the vertical retrace period. be excluded. Next φv1 or φ
The signal charge accumulated in the light receiving element is read out to the φv1 or φv3 electrode by the signal readout pulse φCH superimposed on v3. The signal charge transferred to the vertical transfer stage is
be done. The signal charges transferred at high speed to a predetermined location in storage area B are transferred to horizontal transfer area C one line at a time for each horizontal scan.
will be forwarded to. The signal charge transferred to the horizontal transfer area C is the horizontal transfer pulse φH1 applied to the horizontal transfer register.
~φH3, the signal charges are sequentially transferred to the charge detection area, and the signal charges are converted into signal voltages and taken out from the solid-state image sensor.

As mentioned above, the signal charge from the light receiving element is transferred to the vertical transfer electrode φV1. Reading can be performed by superimposing the signal readout pulse φCH on the vertical transfer pulse applied to φv3 and increasing the potential of the direct transfer stage. Therefore, as shown in FIG. 4, the signal readout pulses φv1 and φv3 are alternately
By superimposing CH, 2:1 interlaced scanning can be performed.

By the way, as shown in FIG. 4, the vertical transfer pulse φV1. If a new read pulse φS is superimposed on φv3 at an arbitrary time, the signal charge accumulated in the light receiving section is read out to the vertical transfer stage 3 at the time when the read pulse φS is applied. The read signal charges are transferred to the unnecessary charge discharge region E and discharged by vertical transfer pulses φv1 to φv4 applied during the period tX. Therefore, signal charges corresponding to the period tS are accumulated in the light receiving element 1, from the end of the read pulse φS until the next read pulse φCH is applied and the signal of the light receiving element 1 is read out. It turns out. This means that the exposure time to the light receiving area has reached t8. In other words, the solid-state image sensor itself has a shutter function. If a moving subject is imaged in the above state, an image with extremely good dynamic resolution can be obtained. Here, since the readout pulse φS for shuttering can be set at any time other than the period between the beginning of t and the end of tB, an image of any shuttering speed can be obtained.

In this way, unnecessary charges are discharged in the direction of the unnecessary charge discharge region E arranged on the extension of the light receiving region A, and signal charges are transferred at high speed to the storage region B arranged on the extension of the light receiving region A. If the signals stored in B are read out sequentially for each horizontal line, it is possible to obtain an image with extremely little vertical smear and good dynamic resolution.

Further, in the above example, reading out one pixel at a time was rarely possible, but by using the transfer pulse shown in FIG. 6, it is possible to perform two-pixel mixed readout driving. In this method, the signal charges of vertically adjacent light-receiving elements are mixed and transferred at the vertical transfer stage, and although the vertical resolution is slightly degraded, the vertical MTF is reduced, making moire less likely to occur. Even when such a shower drive is not performed, the signal charges of all the light receiving elements are read out every field, so the exposure time is 1/60 second, which is advantageous in terms of dynamic resolution.

On the other hand, if the exposure times are made equal, the signal charges of the two light receiving elements are added, so this method has a feature of better sensitivity than the above-mentioned single pixel readout.

Problems to be Solved by the Invention However, the above configuration has the following problems.

When photographing a subject by driving the shutter, high-speed shooting can be achieved with the exposure time of one frame (one field) being, for example, about 1/1000 seconds, but the number of frames is determined by the field frequency, and in the NTSC system, the exposure time is 6 per second.
Only 0 frames can be taken.

Therefore, there is a drawback that only a few frames can be photographed for a fast-moving subject such as a golf swing.

In view of the above, an object of the present invention is to provide a solid-state image pickup device that is compatible with standard television formats, increases the number of frames isometrically, and can take pictures in a manner that reproduces fast movements of a subject in detail. With the goal.

Means for Solving the Problems In order to achieve the above object, the solid-state imaging device of the present invention includes a photoelectric conversion element disposed in a light receiving section, and an unnecessary charge that resets the charges accumulated in the photoelectric conversion element during an exposure period. a second charge transfer section provided in the light shielding section such that one transfer stage corresponds to the discharge section and one or more of the photoelectric conversion elements; and a second charge transfer section provided on the extension of the second charge transfer section in the transfer direction. a third charge transfer section; and a first charge transfer section that transfers charges photoelectrically converted by the photoelectric conversion element to the second charge transfer section transfer stage corresponding to the photoelectric conversion element at least twice in the same exposure period. No, the charge of the photoelectric conversion element is read out to the first charge transfer part after an arbitrary period after the charge of the photoelectric conversion element is reset to the unnecessary charge discharge part, and the charge of the photoelectric conversion element is read out to the first charge transfer part during the same exposure period. After the generated charges are added at the corresponding second charge transfer unit transfer stage,
The second charge transfer section transfers charges to the third charge transfer section at high speed, and the third charge transfer section transfers and outputs the charges transferred from the second charge transfer section. It is an imaging device.

Operation With the above-described configuration, the signal charge accumulated in the photoelectric conversion element from the time when the charge is reset to the unnecessary charge discharge section until the time when it is read out to the first charge transfer section is transferred to the first charge transfer several times during the exposure period. The charge of the same pixel read out during the same exposure period (1 field) is added by the second charge transfer section and then outputted. In other words, several frames of images are multiplexed into one frame, and the number of frames is increased isometrically. An output signal suitable for this can be obtained.

Embodiment FIG. 1 is a block diagram of an embodiment of the solid-state imaging device of the present invention. In FIG. 1, 201 is a photoelectric conversion element, such as a photodiode, and in the case of an NTSC image sensor, about 500 stages are provided in the vertical direction. 202 is a readout gate for reading out the charges accumulated in the photoelectric conversion element 201, 203 is a vertical COD for transferring the charges read out through the readout gate 202, and drive pulses φV11~
14°φV21 to 24 are respectively applied to the electrodes and driven. The charges transferred by the vertical C0D 203 are read out to the vertical CCD 2o5 through the storage gate 204.

205 is vertical COD, considering interlace,
In the vertical direction, the number of stages may be the same as that of the vertical C0D 203 in the light receiving section. A vertical COD 206 is provided as an extension of the vertical CCD 205, has the same number of stages as the vertical CCD 205, and transfers charges to the horizontal COD. 20
7 is a horizontal COD that horizontally transfers the charges transferred from the vertical COD 206. 208 is a charge detection unit that detects the transferred charge, and 209 is an output amplifier. Then, a portion consisting of the photoelectric conversion element 201 to the vertical CCD 203 is a light receiving section 21o, a portion consisting of the vertical CCD 203 to the vertical C0D 20
5 is stored in the storage section 211. A portion consisting of the vertical C0D 206 to the output amplifier 209 is referred to as an output section 212. And 213 is an unnecessary charge discharge part for discharging unnecessary charges.

The operation of the solid-state imaging device of this embodiment configured as described above will be explained with reference to FIG. 2.

FIG. 2 is a timing chart for explaining the operation of the solid-state imaging device of this embodiment. φV11-14 and φ
V21-24. φV31~34°φV41~44 is the first
These are the respective pulses shown in the figure. φv11. φv1
3 has three values, and when the highest voltage is applied, the charge of the photoelectric conversion element 201 is transferred to the transfer electrode V11. of the vertical C0D203 through the readout gate 202. It is read out in V13.

If these read pulses are placed within the horizontal blanking period, they will not interfere with the output signal. These two charges are mixed and become one signal for the upper and lower pixels. The shaded parts in φV11 to 14 are unnecessary charge discharge parts 2
13 at high speed, and the charges read out by the storage gate pulse φS are discarded to the unnecessary charge discharge section 213. Thereafter, the storage gate pulse φCH is applied, and the charges of the photoelectric conversion element 201 are read out to the transfer electrodes v11 to v13 of the vertical CCD 203 through the read gate 202 again. If these read pulses are placed within the horizontal blanking period, they will not interfere with the output signal. These two charges are mixed and become one signal for the upper and lower pixels. And the vertical C0D 203 is driven at high speed,
The charges are transferred to the storage unit 211. The transferred charges are read out to the transfer electrode V31 through the storage gate 204 by a gate pulse superimposed on the drive pulse φV31 applied to the transfer electrode V31 of the vertical CCD 2o6. If this gate pulse is placed within the horizontal blanking period, it will not interfere with the output signal.

This operation is repeated again after a certain period of time, and the vertical C0D2
The charge transferred by 03 is read out to the transfer electrode v31 of the vertical C0D 205 through the storage gate 204, and added to the previously injected charge. Repeat these actions several times9
After returning, the charges stored in the transfer electrode v31 are transferred at high speed to the vertical C0D 206 by drive pulses φv31 to φv34. These charges are transferred to the horizontal C0D2 one stage at a time during each horizontal blanking period by driving pulses φV41 to 44.
07, and is output by the horizontal C0D 207 as a one-line signal through the charge detection section 208 and the output amplifier 209.

In FIG. 2, for each field (exposure period), nine charges generated in the photoelectric conversion element 201 are added three times by the vertical C0D 205 and output in the next field. In this way, it is possible to obtain an image in which three images with a shutter time determined by tl are superimposed. Furthermore, the signal output from the output amplifier 209 is compatible with standard television signals.

As described above, this embodiment substantially increases the number of frames and is compatible with standard television signals, so it can be used with conventional recording equipment and playback equipment without making any changes. . Since the manufacturing process, driving method, etc. are almost the same as conventional ones, it is extremely easy to realize.

In this embodiment, the charge addition in the vertical C0D 205 has been described as three times per one exposure period, but the invention is not particularly limited to this. Further, regarding charge readout, although the case of two-pixel mixed readout has been described, the present invention is not particularly limited to this.

In addition, the number of vertical stages of the vertical CCD 205 and the vertical CCD 206 is set to 2 times the number of stages of the vertical CCD 203 in the light receiving section.
By doubling the number of pixels, the above operation can be performed for all pixels during each exposure period, so it is also applicable to cameras such as HDTVs.

Further, even if the number of vertical stages of the vertical C0D 206 is reduced by the number of stages corresponding to the number of scanning lines between 10 in FIG. 2, there is no problem with the above operation. In this way, it is possible to reduce the chip area of the element.

Further, the unnecessary charge discharge part does not need to be placed on the opposite side of the storage part 211, and can be placed between the light receiving part 210 and the storage part 211, or can be placed directly next to or in a deep part of the photoelectric conversion element. good.

Effects of the Invention According to the present invention, while being compatible with the standard television system,
Its practical effects are significant, such as the ability to substantially increase the number of frames and the ability to capture fast-moving subjects in detail.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a timing diagram for explaining driving of a solid-state imaging device in the same embodiment, and FIG. 3 is a configuration diagram of a conventional solid-state imaging device. 4 is a timing diagram of drive pulses in the conventional example, and FIG. 5 is a timing diagram of drive pulses in the case of two-pixel mixed readout drive in the conventional example. 201...Photoelectric conversion element, 203.205. 208... Vertical CCD, 207... Horizontal CCD. 208... Charge detection unit, 209... Output amplifier, 213... Unnecessary charge discharge unit. Name of agent: Patent attorney Toshio Nakao and one other person K1
1- Senden Jakami Miko ff12 Figure 3

Claims (1)

[Claims] One transfer stage corresponds to the photoelectric conversion element arranged in the light receiving part, the unnecessary charge discharge part that resets the charge accumulated in the photoelectric conversion element during the exposure period, and one or more of the photoelectric conversion elements. a second charge transfer section provided in the light shielding section; a third charge transfer section provided on an extension of the second charge transfer section in the transfer direction; and a third charge transfer section provided on the extension of the second charge transfer section in the transfer direction; A first charge transfer section that transfers the charge to the second charge transfer section transfer stage corresponding to the element at least twice in the same exposure period, and for an arbitrary period after the charge of the photoelectric conversion element is reset to the unnecessary charge discharge section. Later, the charge of the photoelectric conversion element is read out to the first charge transfer section, and during the same exposure period, the charge generated in the photoelectric conversion element and transferred from the first charge transfer section is transferred to the second charge transfer section. After the charge is added in the second charge transfer stage, the second charge transfer unit transfers the charge to the third charge transfer unit at high speed, and the third charge transfer unit transfers the charge transferred from the second charge transfer unit. A solid-state imaging device configured to output