JPS6349911B2 - - Google Patents

Description

[Detailed description of the invention] [Field of the invention]

The present invention provides a mechanism in which minority carriers generated within a semiconductor substrate having a predetermined conductivity type are transported along a region on the surface side of the semiconductor substrate,
This invention relates to improvements in semiconductor devices that exhibit intended functions.

[Conventional technology]

Conventionally, the above-mentioned semiconductor device based on the principle described below with reference to FIG. 1 has been proposed. That is, for example, an N-type semiconductor substrate 1 and a P layer formed in the semiconductor substrate 1 from the main surface 2 side.
semiconductor regions 3 and 4 of the mold;
Electrodes 5 and 6 are formed on the main surface 2 side of the semiconductor substrate 1, and a semiconductor region 3 is formed on the main surface 2 of the semiconductor substrate 1.
and an electrode 8 formed on a region 7 between the semiconductor regions 3 and 4, respectively, and the semiconductor regions 3 and 4 are respectively an emitter region and a collector region, and a semiconductor substrate 1.
A lateral bipolar transistor Q in which region 7 is a base region, and electrodes 5, 6, and 8 are emitter electrodes, collector electrodes, and base electrodes, respectively.
It consists of In the case of such a semiconductor device, if an electrode is connected between electrodes 5 and 6 with the electrode 6 side being negative, and a control voltage is applied between the electrodes 5 and 8 with the electrode 8 side being negative, the semiconductor substrate 1 Minority carriers (holes in this case) 9 are generated in the region 7 from the semiconductor region 3 side,
The minority carrier 9 functions as a transistor Q by a mechanism in which the minority carrier 9 is transferred to a region 10 on the surface side of the region 7 of the semiconductor substrate 1 toward the semiconductor region 4 along the region 10 as shown by an arrow 11. .

[Problem to be solved by the invention]

However, all of the minority carriers 9 generated in the region 7 of the semiconductor substrate 1 from the semiconductor region 3 side are transferred to the semiconductor region 4 along the region 10 on the surface side of the region 7, as shown by an arrow 11. There is no guarantee that most of the minority carriers 9 generated in the region 7 of the semiconductor substrate 1 from the semiconductor region 3 side will bypass the region 10 on the surface side of the region 7 and enter the semiconductor region 4, as shown by the arrow 12. They are forced to be transferred. Therefore, in the case of the semiconductor device shown in FIG. 1, the function as the transistor Q cannot be obtained at high speed.
It had the following drawback. In addition, although a detailed explanation will be omitted, the semiconductor device exhibits a predetermined function by causing minority carriers generated within a semiconductor substrate having a predetermined conductivity type to be transported along the surface side region of the semiconductor substrate. A device having a configuration that constitutes a carrier transfer device has also been proposed. However, in the case of such a semiconductor device as well, although detailed explanation is omitted, most of the minority carriers generated within the semiconductor substrate are transported bypassing the region on the surface side of the semiconductor substrate, and therefore,
It had the disadvantage that it could not function as a carrier transfer device at high speed.

[Object of the present invention]

Therefore, the present invention provides a mechanism in which minority carriers generated in a semiconductor substrate having a predetermined conductivity type are transported along a region on the surface side of the semiconductor substrate. The purpose of this paper is to propose a new semiconductor device that can achieve a desired function such as a transfer device function at high speed, and this will become clear from the detailed description below. Dew. Embodiment 1 FIG. 2 shows the principle of a first embodiment of the essential parts of a semiconductor device according to the present invention, which has the configuration described below. That is, the semiconductor substrate 21 has a predetermined conductivity type, for example, N type, and the semiconductor substrate 21 is in contact with the semiconductor substrate 21 on its main surface 22 side and has a larger forbidden band width than the semiconductor substrate 21.
A semiconductor region 23 having the same conductivity type, ie, N type.
and an interface formed between the semiconductor body 21 and the semiconductor region 23 in a manner that it is attached on the surface of the semiconductor body 21 opposite to the semiconductor region 23 side and the surface of the semiconductor region 23 opposite to the semiconductor body 21 side. 24 and a pair of electrodes 25 and 26 facing each other with a region below the interface 24 of the semiconductor substrate 21 in between. In this case, the semiconductor body 21 may be made of easily available silicon, but at the interface 24 between the semiconductor body 21 and the semiconductor region 23, the minority carrier (in this case, the The material of the semiconductor region 23 can be selected in accordance with the material of the semiconductor substrate 21 so that interface states serving as recombination centers for holes (holes) are not formed unnecessarily. Furthermore, when the semiconductor substrate 21 is made of silicon,
The semiconductor region 23 may be made of amorphous silicon or polycrystalline silicon containing 2 to 50 atomic percent oxygen. Furthermore, the semiconductor region 23 may have a specific resistance lower than that of the semiconductor body 21, for example, 1× It is allowed to have an impurity concentration of 10 ¹⁹ cm ^-3 or more. The above is the first part of the main part of the semiconductor device according to the present invention.
This is the basic configuration of the embodiment. According to the semiconductor device according to the present invention having such a configuration, if a power source with the electrode 26 side being negative is connected between the electrodes 25 and 26, minority carriers (this An electric field (this is called an electric field for accumulating minority carriers) is obtained that directs the electron holes (in the case of the electron beam) toward the interface 24 side. Therefore, if minority carriers are generated or have been generated in a region below or near the interface 24 of the semiconductor substrate 21, the minority carriers move toward the interface 24 side. However, the minority carrier is
It does not go beyond the 3rd semiconductor region 23,
Therefore, the minority carriers are accumulated in the region 27 of the semiconductor body 21 on the interface 24 side. The reason is that the semiconductor region 23 is
The semiconductor substrate 21 has a larger forbidden band width (this is referred to as E _g3 ) than the forbidden band width (this is referred to as E _g1 ) and has the same conductivity type as the semiconductor substrate 21 . When the electric field for accumulating minority carriers described above is obtained within the semiconductor substrate 21, an energy level gradient is generated in the semiconductor substrate 21. Look, as shown in Figure 3,
This is because a discontinuity occurs in the valence band between the semiconductor substrate 21 and the semiconductor region 23, and this serves as a potential barrier for minority carriers moving from the semiconductor substrate 21 side to the semiconductor region 23 side. . In addition, in FIG. 3, 4E _c is the difference in affinity between the semiconductor substrate 21 and the semiconductor region 23, 4E _v is the energy discontinuity value appearing in the valence band, and 4E _v
= E _g3 − (E _g1 +4E _c ). Therefore, according to the basic structure of the first embodiment of the main part of the semiconductor device according to the present invention shown in FIG. If the light 28 is made to enter the semiconductor substrate 21 to generate minority carriers (holes in this case) 29, the minority carriers 29 can be caused to pass under the semiconductor region 23 into the semiconductor region 21. Assuming that an electric field directed toward the side opposite to the side where minority carriers 29 are generated as seen from 23 (this is referred to as an electric field for transporting minority carriers) is obtained in advance, the above-mentioned carrier accumulation within the semiconductor substrate 21 If the above-mentioned minority carriers 29 are generated in the semiconductor substrate 21 while the electric field is being obtained, the minority carriers 29 will be generated in the region 2 of the semiconductor substrate 21 on the interface 24 side.
7, it is caused to be transported along its area 27, as shown by arrow 30. Further, in this case, if the semiconductor substrate 21 is made of silicon and the semiconductor region 23 is made of amorphous silicon or polycrystalline silicon containing 2 to 50 atomic percent of oxygen, the semiconductor substrate 21 and the semiconductor region 23 are At the interface 24, there is no needless formation of interface states that serve as recombination centers for the minority carriers 29.
Therefore, part of the minority carriers 29 is not unnecessarily lost during the transfer, and therefore the above-mentioned minority carriers can be efficiently transferred. From the above, in the semiconductor device according to the present invention,
The above-mentioned principle structure shown in FIG. ) and an electrode 25
and 26, the above-mentioned power supply (power supply means) for applying a voltage that directs and accumulates the minority carriers in the semiconductor body 21 toward the interface formed by the semiconductor body 21 and the semiconductor region 23, and the semiconductor body 21
The semiconductor device according to the present invention has the great feature of efficiently and rapidly exhibiting the functions intended for it, provided that the semiconductor device is provided with the above-mentioned means for generating an electric field for transporting minority carriers. Embodiment 2 Next, a second embodiment of the essential parts of the semiconductor device according to the present invention will be described in principle with reference to FIG. In FIG. 4, parts corresponding to those in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted. The main part of the semiconductor device according to the present invention shown in FIG. 4 has the configuration described above in FIG. The structure is the same as that shown in FIG. 2, except that a semiconductor region 41 having a conductivity type, that is, P type, is formed and an electrode 42 is attached to the semiconductor region 41. The above is the second main part of the semiconductor device according to the present invention.
This is the basic configuration of the embodiment. The semiconductor device according to the present invention having such a configuration has the same configuration as the case shown in FIG. , electrodes 25 and 26
If a power source with the electrode 26 side being negative is connected between them, an electric field for accumulating minority carriers is obtained in the semiconductor substrate 21 that directs the minority carriers (holes in this case) in the semiconductor substrate 21 toward the interface 24 side. Therefore, if minority carriers are generated or have been generated in the region below or near the interface 24 of the semiconductor substrate 21, the minority carriers are accumulated in the region 27 of the semiconductor substrate 21 on the interface 24 side. On the other hand, if a voltage is applied between the electrodes 25 and 42 with the electrode 42 side being positive, minority carriers 43 are generated in the semiconductor substrate 21 from the semiconductor region 41 side. Therefore, according to the principle configuration of the second example of the main part of the semiconductor device according to the present invention shown in FIG. Assuming that an electric field for transporting minority carriers that passes through the semiconductor substrate 21 and directs them to the side opposite to the semiconductor region 41 as seen from the semiconductor region 23 is obtained in advance, the electric field for accumulating minority carriers described above can be obtained in the semiconductor substrate 21. in a state where
When the minority carriers 43 mentioned above are generated in the semiconductor substrate 21, the minority carriers 43 become
As in the case of FIG. 2, the interface 2 of the semiconductor body 21
It is caused to be transferred along the area 27 on the fourth side as shown by the arrow 44. Further, in this case, the semiconductor substrate 21 is silicon, and the semiconductor region 23 is
If it is made of amorphous silicon or polycrystalline silicon containing oxygen, the transport of the minority carriers 29 in this case is carried out efficiently in the same manner as described above with reference to FIG. Therefore, the semiconductor device according to the present invention is provided with the principle structure shown in FIG. The above-mentioned power source (first power source means)
and the above-mentioned power supply (second power supply means) for applying a voltage between the electrodes 25 and 26 to direct and accumulate minority carriers in the semiconductor body 21 toward the interface formed by the semiconductor body 21 and the semiconductor region 23.
If the semiconductor substrate 21 is provided with the above-mentioned means for obtaining the electric field for transporting minority carriers, the semiconductor device according to the present invention has the great feature that it can efficiently and quickly perform the functions intended for the semiconductor device. Embodiment 3 Next, a third embodiment of the main part of the semiconductor device according to the present invention will be described in principle with reference to FIG. In FIG. 5, parts corresponding to those in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted. The main part of the semiconductor device according to the present invention shown in FIG. 5 has the structure described above in FIG.
5 and 26 are omitted, however, the semiconductor substrate 21 has an interface 2 formed between it and the semiconductor region 23.
It has the same structure as the case in FIG. 2, except that it has an impurity concentration gradient that becomes smaller toward the 4th side. The above is the third main part of the semiconductor device according to the present invention.
This is the basic configuration of the embodiment. The semiconductor device according to the present invention having such a configuration has the same configuration as the case of FIG.
However, since it has an impurity concentration gradient that becomes smaller as it reaches the interface 24 formed between it and the semiconductor region 23, the semiconductor substrate 21 is exposed to an external source using an electrode, as in the case of FIG. Semiconductor substrate 21
Even if the electric field for accumulating minority carriers is not obtained within the second
As in the case shown in the figure, the same energy level gradient as when an electric field for accumulating minority carriers is obtained within the semiconductor substrate 21 occurs, so in terms of energy level,
A discontinuity occurs in the valence band between the semiconductor body 21 and the semiconductor region 23, similar to that described above with reference to FIG. Therefore, according to the principle structure of the third embodiment of the main part of the semiconductor device according to the present invention shown in FIG. 5, the semiconductor substrate 21 is similar to that described above in FIG. If the light 28 is made to enter the semiconductor substrate 21 and the minority carriers 29 are generated, and if an electric field for transporting the minority carriers similar to that described above in FIG. 2 is obtained in the semiconductor substrate 21 in advance. , by generating the above-mentioned minority carriers 29 in the semiconductor substrate 21,
The minority carrier 29 is placed in the region 27 of the semiconductor substrate 21 on the interface 24 side, as in the case of FIG.
It is caused to be transported along the region 27 as shown by arrow 30. Further, in this case, the semiconductor substrate 21
When the semiconductor region 23 is made of silicon and the semiconductor region 23 is made of amorphous silicon or polycrystalline silicon containing oxygen, the minority carriers 29 are efficiently transported in the same manner as described above with reference to FIG. Therefore, the semiconductor device according to the present invention is provided with the principle configuration described above in FIG. The semiconductor device according to the present invention has the great feature of efficiently and rapidly exhibiting the intended functions if the semiconductor device is provided with the above-mentioned means for obtaining the electric field for transporting minority carriers. Embodiment 4 Next, a fourth embodiment of the main part of the semiconductor device according to the present invention will be described in principle with reference to FIG. In FIG. 6, parts corresponding to those in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted. The main part of the semiconductor device according to the present invention shown in FIG. 6 is the electrode 2 in the configuration described above in FIG.
5 and 26 are omitted as in the case of FIG. 5. However, as in the case of FIG. The structure is similar to that of the case shown in FIG. 4, except that the impurity concentration gradient is as follows. The above is the fourth main part of the semiconductor device according to the present invention.
This is the basic configuration of the embodiment. The semiconductor device according to the present invention having such a configuration has the same configuration as that in FIG. 4 except for the above-mentioned matters, and the semiconductor substrate 21
As in the case of FIG. 5, there is an impurity concentration gradient that becomes smaller as it reaches the interface 24 between the semiconductor substrate 21 and the semiconductor region 23, so a detailed explanation will be omitted, but in the case of FIG. Similarly, in terms of energy level, a discontinuity occurs in the valence band between the semiconductor substrate 21 and the semiconductor region 23 in the same way as described above in FIG. If a voltage with positive voltage applied to the 42 side is applied, a semiconductor region 4 is formed in the semiconductor body 21 in the same manner as described above with reference to FIG.
A minority carrier 43 is generated from the 1 side. Therefore, according to the principle structure of the fourth embodiment of the main part of the semiconductor device according to the present invention shown in FIG.
Minority carriers 4 generated from the semiconductor region 41 side
Assuming that the electric field for transporting minority carriers for 3 is obtained in advance, when the minority carriers 43 described above are generated in the semiconductor substrate 21, the minority carriers 43 will be transferred to the semiconductor substrate as in the case of FIG. 21 on the interface 24 side, as shown by an arrow 44, along the region 27.
Further, in this case, if the semiconductor substrate 21 is made of silicon and the semiconductor region 23 is made of amorphous silicon or polycrystalline silicon containing oxygen, the minority carriers 43 in this case are efficiently transferred. Therefore, the semiconductor device according to the present invention is provided with the principle structure shown in FIG. 6 as a main part, and minority carriers are generated in the semiconductor substrate 21 from the semiconductor region 41 side between the semiconductor substrate 21 and the electrode 42. If the semiconductor device according to the present invention is equipped with the above-mentioned power source (power supply means) for applying a voltage and the above-mentioned means for obtaining the electric field for transporting minority carriers in the semiconductor substrate 21, the semiconductor device according to the present invention can efficiently perform the functions scheduled therein. It has the great feature of being able to operate at high speed. Example 5 Next, a specific example of the semiconductor device according to the present invention will be described with reference to FIG. The semiconductor device according to the present invention shown in FIG. 7 has the following configuration. That is, for example, an N-type semiconductor substrate 71, semiconductor regions 73 and 74 formed in the semiconductor substrate 71 from the main surface 72 side and having a conductivity type opposite to that of the semiconductor substrate 71, that is, a P-type, and the semiconductor substrate 71. 7
It is formed in a region 75 between the semiconductor regions 73 and 74 of 1 in contact with this on the main surface 72 side, has a larger forbidden band width than the semiconductor substrate 71, and has the same conductivity type as the semiconductor substrate 71, that is, N type. and electrodes 77 formed on the surfaces of the semiconductor regions 73 and 74 on the main surface 72 side, respectively.
and 78 , an electrode 79 formed on the surface of the semiconductor region 76 opposite to the semiconductor substrate 71 side, and an N ⁺ type semiconductor layer 80 formed on the surface of the semiconductor substrate 71 opposite to the semiconductor region 76 side. The electrode 81 is formed through the electrode 81. The above is the configuration of a specific example of the semiconductor device according to the present invention. According to the semiconductor device according to the present invention having such a configuration, the semiconductor substrate 71 corresponds to the semiconductor substrate 1 of the semiconductor device constituting the lateral bipolar transistor Q described above in FIG. 74 and 75 correspond to semiconductor regions 3, 4 and 7 of the semiconductor device in FIG. 1, respectively;
Furthermore, electrodes 77 and 78 correspond to electrodes 5 and 6, respectively, of the semiconductor device of FIG. 1, and semiconductor region 76 has the same conductivity type as semiconductor substrate 71. Therefore, the electrode 79 on the semiconductor region 76 is
It is clear that this corresponds to the electrode 8 of the semiconductor device shown in the figure. Therefore, the semiconductor regions 73 and 74 are respectively used as an emitter region and a collector region, the region 75 of the semiconductor substrate 71 is used as a base region, and the electrodes 77, 78 and 79
It is clear that a lateral bipolar transistor Q is constituted by using these as an emitter electrode, a collector electrode, and a base electrode, respectively. Therefore, in the case of the exemplary configuration of the semiconductor device according to the present invention shown in FIG. 7, the power supply is not connected between the electrodes 79 and 81, and the electrodes 77 and 78 are connected in accordance with the case of the semiconductor device described above in FIG. With a power source with the electrode 78 side negative connected in between, the electrode 7
If a control voltage that makes the electrode 79 side negative is applied between 7 and 79, minority carriers (holes in this case) are applied to the region 75 of the semiconductor substrate 71 from the semiconductor region 73 side, in accordance with the semiconductor device described above in FIG. 82 is generated in an amount corresponding to the value of the control voltage, and the minority carriers 82 are transferred to the semiconductor region 74, and function as the transistor Q, as in the case of the semiconductor device described above in FIG. exhibits. In this case, as in the case of the semiconductor device described above in FIG.
2 is transferred to the semiconductor region 74, bypassing the region 85 on the surface side of the region 75, as shown by an arrow 84. However, in the case of the structure of the specific example of the semiconductor device according to the present invention shown in FIG. and an electrode 81 on the surface of the semiconductor substrate 71 opposite to the semiconductor region 76 side.
and 81; and semiconductor substrate 71, respectively.
Semiconductor region 2 in the principle configuration of the first embodiment of the main part of the semiconductor device according to the present invention described above in the drawings
3, electrodes 26 and 25; , semiconductor substrate 7
A bias voltage (with the electrode 81 side being positive) that directs and accumulates minority carriers in the semiconductor substrate 71 and the semiconductor region 76 toward the interface side is applied, and the above-mentioned power source is applied between the electrodes 77 and 78. If the above-mentioned control voltage is applied between the electrodes 77 and 79, most of the above-mentioned minority carriers 82 generated from the semiconductor region 73 side in the region 75 of the semiconductor substrate 71 are removed as shown by the arrow 84. Therefore, most of the minority carriers 82 generated from the semiconductor region 73 side in the region 75 of the semiconductor substrate 71 are not transferred to the semiconductor region 74 by bypassing the region 85 on the surface side of the region 75.
As shown, the semiconductor region 74 is transferred along the region 85. Therefore, the semiconductor device according to the present invention shown in FIG. 7 has the great feature of efficiently performing the function of the transistor Q at high speed. Note that in the semiconductor device of the present invention shown in FIG. 7, the semiconductor substrate 71;
As in the case of the semiconductor body 21 and the semiconductor region 23 described above in FIG. If it has a low specific resistance like the semiconductor region 23 described above, the above-mentioned characteristics will be further exhibited. Embodiment 6 Next, another specific example of the semiconductor device according to the present invention will be described with reference to FIG. The semiconductor device according to the present invention shown in FIG. 8 has the configuration described below. That is, for example, a P-type semiconductor substrate 81 and a plurality of semiconductor substrates having a larger forbidden band width than the semiconductor substrate 81 formed on the main surface 82 and having the same conductivity type as the semiconductor substrate 81, that is, the P-type. Semiconductor region 82
a, 82b and 82c and their semiconductor regions 82
Electrodes 83a, 83a, 82c formed on the surfaces opposite to the semiconductor substrate 81 side of a, 82b, and 82c, respectively.
3b and 83c, and on the surface of the semiconductor substrate 81 opposite to the semiconductor regions 82a, 82b, and 82c.
A common electrode 85 is provided for the plurality of electrodes 83a, 83b, and 83c formed through a P ⁺ type semiconductor layer 84, and the electrodes 83a, 83b are provided with a common electrode 85.
and 83c and the electrode 85.
Three-phase clock voltages φ _a , φ _b and φ _c with the 5 side negative
is given, and light 86 is made to enter the semiconductor substrate 81 at one end side of the arrangement region of the semiconductor regions 82a, 82b, and 82c.Based on this, minority carriers (electrons in this case)
87 is generated. The above is the configuration of another specific example of the semiconductor device according to the present invention. According to the semiconductor device according to the present invention having such a configuration, the semiconductor substrate 81; and the semiconductor region 8
It is clear that 2a, 82b and 82c respectively correspond to the semiconductor body ₂₁ and the semiconductor region ₂₃ described above in _FIG . Minority carriers 87 generated in semiconductor substrate 81 at a period 1/3 times the clock period sequentially form contact with semiconductor regions 82a, 82b, and 82c of semiconductor substrate 81, as shown by arrows 90a, 90b, and 90c. Regions 89a, 89 on the interfaces 88a, 88b and 88c side
b and 89c accumulate at their interfaces 88a, 8
8b and 88c. Therefore, the semiconductor device according to the present invention shown in FIG. 8 constitutes a carrier transfer device exhibiting a carrier transfer function, and in this case, although detailed explanation is omitted, a plurality of electrodes 83a, 83b, and 83c are used.
and the common electrode 85 by connecting minority carriers to the interface 88.
A, 88b and 88c sides are applied with voltages to be directed and accumulated respectively, and the minority carriers are applied to the plurality of semiconductor regions 82a, 82b and 88c.
2c, the minority carriers are transported along the regions 89a, 89b, and 89c on the interfaces 88a, 88b, and 88c side of the semiconductor substrate 81, as described above. Therefore, it has the great feature of providing the above-mentioned carrier transfer function efficiently and at high speed. Note that in the semiconductor device of the present invention shown in FIG. 8, the semiconductor substrate 81;
Similarly to the semiconductor substrate 21 and the semiconductor region 23 described above in FIG. If 82c and 82c have a low resistivity like the semiconductor region 23 described above in FIG. 2, the above-mentioned characteristics will be further exhibited.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view showing a conventional semiconductor device. FIG. 2 is a schematic cross-sectional view showing the basic structure of a first example of a main part of a semiconductor device according to the present invention. FIG. 3 is an energy level diagram for explaining this. FIG. 4, FIG. 5, and FIG. 6 are schematic cross-sectional views showing the basic configurations of second, third, and fourth embodiments of the main parts of the semiconductor device according to the present invention, respectively. FIGS. 7 and 8 are schematic cross-sectional views showing specific examples of semiconductor devices according to the present invention, respectively. 21... Semiconductor substrate, 23, 82a to 82c...
...Semiconductor region, 24,88a-88c...Interface,
25, 26, 42, 77, 79, 81, 83a~
83c, 85...electrode, 27, 85, 89a-8
9c...Region, 71, 81...Semiconductor substrate.

Claims (1)

[Scope of Claims] 1. A semiconductor substrate having a predetermined conductivity type, and a semiconductor region that is in contact with the semiconductor substrate, has a larger forbidden band width than the semiconductor substrate, and has the same conductivity type as the semiconductor substrate. , a pair of electrodes facing each other across an interface between the semiconductor substrate and the semiconductor region and a region under the interface of the semiconductor substrate; and a minority carrier in a region other than under the semiconductor region within the semiconductor base. power supply means for applying a voltage between the pair of electrodes that directs and accumulates minority carriers in the semiconductor substrate toward the interface between the semiconductor substrate and the semiconductor region; Directing the minority carriers into the body from the side of the region where the minority carriers are generated, passing under the semiconductor region, and toward the region opposite to the region where the minority carriers are generated as viewed from the semiconductor region. A semiconductor device comprising means for generating an electric field so that minority carriers generated within the semiconductor substrate are transported along a region of the semiconductor substrate on the interface side. 2. The semiconductor device according to claim 1, wherein the semiconductor substrate is made of silicon, and the semiconductor region is made of amorphous silicon or polycrystalline silicon containing oxygen. 3. a semiconductor substrate having a predetermined conductivity type; a first semiconductor region that is in contact with the semiconductor substrate, has a larger forbidden band width than the semiconductor substrate, and has the same conductivity type as the semiconductor substrate; A first electrode attached to the semiconductor substrate and a second electrode attached to the semiconductor region, which face each other across an interface between the substrate and the semiconductor region and a region below the interface of the semiconductor substrate. , a second semiconductor region formed within the semiconductor substrate in a region other than under the semiconductor region and having a conductivity type opposite to that of the semiconductor substrate, and to which a third electrode is attached; a first power supply means for applying a voltage that generates minority carriers within the semiconductor substrate from the second semiconductor region side between the electrodes of the third electrode; a second power supply means for directing and accumulating the minority carriers toward the interface between the semiconductor substrate and the first semiconductor region; means for generating an electric field that passes from the semiconductor region side of the semiconductor region and passes under the first semiconductor region toward a region opposite to the second semiconductor region side when viewed from the first semiconductor region. . A semiconductor device, wherein minority carriers generated within the semiconductor substrate are transported along a region of the semiconductor substrate on the interface side. 4. The semiconductor device according to claim 3, wherein the semiconductor substrate is made of silicon, and the first semiconductor region is made of amorphous silicon or polycrystalline silicon containing oxygen. 5 a semiconductor substrate having a predetermined conductivity type; a semiconductor region in contact with the semiconductor substrate and having a larger forbidden band width than the semiconductor substrate and having the same conductivity type as the semiconductor substrate; , means for generating minority carriers in a region other than under the semiconductor region; means for generating an electric field directed toward a region opposite to the region where the minority carriers are generated, as viewed from above, the semiconductor substrate becomes smaller as it approaches the interface between the semiconductor substrate and the semiconductor region. A semiconductor device having an impurity concentration gradient such that minority carriers generated within the semiconductor substrate are transported along the impurity concentration gradient to a region on the interface side of the semiconductor substrate. 6. The semiconductor device according to claim 5, wherein the semiconductor substrate is made of silicon, and the semiconductor region is made of amorphous silicon or polycrystalline silicon containing oxygen. 7 a semiconductor substrate having a predetermined conductivity type; a first semiconductor region that is in contact with the semiconductor substrate, has a larger forbidden band width than the semiconductor substrate, and has the same conductivity type as the semiconductor substrate; a second semiconductor region formed within the base and having a conductivity type opposite to that of the semiconductor base and to which an electrode is attached; and between the semiconductor base and the electrode, the semiconductor from the second semiconductor region side. power supply means for applying a voltage that generates minority carriers within the substrate; means for generating an electric field directed toward a region opposite to the second semiconductor region when viewed from the semiconductor region, the semiconductor substrate reaching the interface between the semiconductor substrate and the first semiconductor region; A semiconductor having an impurity concentration gradient that becomes smaller as the semiconductor substrate increases, and minority carriers generated within the semiconductor substrate are transported along the impurity concentration gradient to a region on the interface side of the semiconductor substrate. Device. 8. The semiconductor device according to claim 7, wherein the semiconductor substrate is made of silicon, and the first semiconductor region is made of amorphous silicon or polycrystalline silicon containing oxygen. 9 a semiconductor substrate having a predetermined conductivity type; and a second electrode formed in the semiconductor substrate from the main surface side thereof and having a conductivity type opposite to that of the semiconductor substrate and provided with first and second electrodes, respectively. the first and second semiconductor regions, which are formed on and in contact with a region between the first and second semiconductor regions of the semiconductor substrate, and have a larger forbidden band width than the semiconductor substrate; a third semiconductor region having the same conductivity type as the semiconductor substrate; a third electrode formed on a surface of the third semiconductor region opposite to the semiconductor substrate; and a third electrode of the semiconductor substrate; A voltage for generating minority carriers from the first semiconductor region into the semiconductor substrate is applied between the fourth electrode formed on the surface opposite to the semiconductor region side and the first and third electrodes. a first power supply means to be applied, and a voltage applied between the third and fourth electrodes to direct and accumulate minority carriers in the semiconductor substrate toward the interface between the semiconductor substrate and the third semiconductor region; a second power supply means for applying a voltage between the first and second electrodes; a third power supply means for applying a voltage that generates an electric field directed toward the second semiconductor region side, and constitutes a transistor. 10. The semiconductor device according to claim 9, wherein the semiconductor substrate is made of silicon, and the third semiconductor region is made of amorphous silicon or polycrystalline silicon containing oxygen. 11 A semiconductor substrate having a predetermined conductivity type; and a plurality of semiconductor regions formed on a main surface of the semiconductor substrate and having a larger forbidden band width than the semiconductor substrate and having the same conductivity type as the semiconductor substrate. , a plurality of first electrodes each formed on a surface of the plurality of semiconductor regions opposite to the semiconductor substrate side; and a plurality of first electrodes formed on the surface of the semiconductor substrate opposite to the plurality of semiconductor regions side. a second electrode common to the plurality of electrodes formed in the semiconductor substrate; means for generating minority carriers in a region other than under the region where the plurality of semiconductor regions are formed in the semiconductor substrate; Directing and accumulating minority carriers in the semiconductor substrate toward the interface between the semiconductor substrate and each of the plurality of semiconductor regions between the first electrode and the common second electrode. power supply means for applying a voltage; and passing the minority carriers into the semiconductor substrate from the region where the minority carriers are generated under the region where the plurality of semiconductor regions are formed;
means for generating an electric field directed toward a region opposite to the region where the minority carriers are generated when viewed from the region where the plurality of semiconductor regions are formed, forming a carrier transfer device. A semiconductor device characterized by: 12. The semiconductor device according to claim 11, wherein the semiconductor substrate is made of silicon, and the plurality of semiconductor regions are made of amorphous silicon or polycrystalline silicon containing oxygen.