JPS6348249U - - Google Patents

Info

Publication number
JPS6348249U
JPS6348249U JP13875886U JP13875886U JPS6348249U JP S6348249 U JPS6348249 U JP S6348249U JP 13875886 U JP13875886 U JP 13875886U JP 13875886 U JP13875886 U JP 13875886U JP S6348249 U JPS6348249 U JP S6348249U
Authority
JP
Japan
Prior art keywords
signal indicating
input terminal
access request
access
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13875886U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13875886U priority Critical patent/JPS6348249U/ja
Publication of JPS6348249U publication Critical patent/JPS6348249U/ja
Pending legal-status Critical Current

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  • Hardware Redundancy (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案システムの構成概念図、第2図
は第1図システムにおいて、OTHER REQ
信号をつくる回路の一例を示す構成ブロツク図で
ある。 μP……プロセツサ、ME……メモリ、CM…
…通信手段、BS……バス、IC,IC……
エクスクルーシブオア回路。
Figure 1 is a conceptual diagram of the configuration of the system of the present invention, and Figure 2 shows the system shown in Figure 1.
FIG. 2 is a configuration block diagram showing an example of a circuit that generates a signal. μP...Processor, ME...Memory, CM...
...Communication means, BS...Bus, IC1 , IC2 ...
Exclusive OR circuit.

Claims (1)

【実用新案登録請求の範囲】 プロセツサ、メモリ、通信手段を含むシステム
が同一バス上に接続され冗長化構成となつており
、一方のシステムが制御状態にある時他方のシス
テムはその機能を代行して遂行すべき待機状態に
あるような冗長化システムにおいて、 各システム内に、一方の入力端に相手側システ
ムからのアクセス要求を示す信号が印加され他方
の入力端に当該システムが制御側にあるのか待機
側にあるのかを示す信号が印加され出力端がアク
セス要求線を介して相手方システムに接続される
第1のエクスクルーシブオア回路と、一方の入力
端に当該システムが制御側にあるのか待機側にあ
るのかを示す信号が印加され他方の入力端が前記
アクセス要求線を介して相手方システムに接続さ
れ出力端から自分へのアクセス受付けを示す信号
を得る第2のエクスクルーシブオア回路とを設け
たことを特徴とする冗長化システム。
[Claims for Utility Model Registration] A system including a processor, memory, and communication means is connected to the same bus in a redundant configuration, and when one system is in a controlled state, the other system takes over the function. In a redundant system in which the system is in a standby state, one input terminal of each system is applied with a signal indicating an access request from the other system, and the other input terminal is applied with a signal indicating an access request from the other system. A first exclusive OR circuit to which a signal indicating whether the system is on the control side or on the standby side is applied and whose output terminal is connected to the other party system via an access request line, and one input terminal which indicates whether the system is on the control side or on the standby side. a second exclusive OR circuit to which a signal indicating whether access is being received is applied, the other input terminal is connected to the other party's system via the access request line, and the output terminal receives a signal indicating acceptance of access to the system. A redundant system featuring:
JP13875886U 1986-09-10 1986-09-10 Pending JPS6348249U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13875886U JPS6348249U (en) 1986-09-10 1986-09-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13875886U JPS6348249U (en) 1986-09-10 1986-09-10

Publications (1)

Publication Number Publication Date
JPS6348249U true JPS6348249U (en) 1988-04-01

Family

ID=31044029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13875886U Pending JPS6348249U (en) 1986-09-10 1986-09-10

Country Status (1)

Country Link
JP (1) JPS6348249U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0323847A (en) * 1989-06-21 1991-01-31 Toshiba Corp X-ray ct scanner apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53104138A (en) * 1977-02-23 1978-09-11 Toshiba Corp Minicomputer composite system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53104138A (en) * 1977-02-23 1978-09-11 Toshiba Corp Minicomputer composite system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0323847A (en) * 1989-06-21 1991-01-31 Toshiba Corp X-ray ct scanner apparatus

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