JPS634729B2 - - Google Patents
Info
- Publication number
- JPS634729B2 JPS634729B2 JP55171119A JP17111980A JPS634729B2 JP S634729 B2 JPS634729 B2 JP S634729B2 JP 55171119 A JP55171119 A JP 55171119A JP 17111980 A JP17111980 A JP 17111980A JP S634729 B2 JPS634729 B2 JP S634729B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- circuit
- scan
- latch
- determining means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 12
- 230000010355 oscillation Effects 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 230000003321 amplification Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000005236 sound signal Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
- H03J1/0041—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers
- H03J1/005—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers in a loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Description
【発明の詳細な説明】
本発明は、電子式オートチユーニング機構を有
するラジオ受信機のチユーナー部に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tuner section of a radio receiver having an electronic autotuning mechanism.
従来のオートチユーナは、自動又は手動にて、
スキヤンを開始し、局をさがし、局を検出すると
スキヤンを停止し、その局を受信する方式であつ
た。又、スキヤン開始後、局が見つからない場合
は、受信周波数域の上限又は下限に達し、あるも
のは上限又は下限のチヤンネルに同調したままス
キヤンを停止する、あるものは上限から下限,又
は下限から上限へジヤンプし、局が見つかるまで
永遠にスキヤンをくり返すもの等があつた。前者
の場合は、再度チユーニング操作を必要とする欠
点があつた。後者は、いつまでもチユーニング動
作をくり返す為、LED周波数表示型ポケツトラ
ジオでは、一定時間表示後に表示を消去する節電
機能が働かず、電池の劣化を早めてしまう欠点が
あつた。 Conventional autotuners automatically or manually
The system was to start scanning, search for a station, and when a station was detected, stop scanning and receive that station. Also, if a station is not found after scanning starts, the upper or lower limit of the receiving frequency range is reached, and some will stop scanning while remaining tuned to the channel at the upper or lower limit, while others will tune from the upper to the lower limit or from the lower limit. There were cases where the player would jump to the upper limit and repeat scanning forever until a station was found. In the former case, there was a drawback that the tuning operation was required again. The latter repeats the tuning operation indefinitely, so LED frequency display type pocket radios have the disadvantage that the power saving function of erasing the display after a certain period of time does not work, accelerating battery deterioration.
本発明は、上記欠点を取除き、操作性を向上し
た受信機を実現する事を目的とする。 An object of the present invention is to eliminate the above-mentioned drawbacks and realize a receiver with improved operability.
以下、第1図の実施例に基づき詳細に説明す
る。 Hereinafter, a detailed explanation will be given based on the embodiment shown in FIG.
第1図は、本発明の実施例を示す図であり、特
定時間以上の間、電波が検出されなくなつた場合
や、マニユアルでオートチユーニング操作をした
場合に、スキヤンを開始し局をさがす。もし見つ
からない場合は、受信していたもとの局にもどる
という動作を行なう為のブロツク図である。 FIG. 1 is a diagram showing an embodiment of the present invention, in which scanning is started to search for a station when radio waves are not detected for a certain period of time or when an auto-tuning operation is performed manually. . This is a block diagram for performing the operation of returning to the original receiving station if the station is not found.
アンテナ1から入力した高周波は、混合変換回
路2で、局発回路5の発振周波数との差の周波数
つまり、中間周波に変換される。中間周波は、中
間周波増幅回路3で増幅され、検波回路4で検波
され音声信号4aを出力する。これがチユーナと
しての出力信号である。検波回路4からは信号強
度に応じて利得制御する為のAGC信号4bを出
力している。第1図ではリバースAGCを使つた
場合を想定した構成となつている。AGC信号4
bは、中間周波増幅回路3等の利得を制御するほ
か、シユミツトトリガ回路20に入力し、電波の
有無を知らせる局検出信号20aを発生させる。
局検出信号20aは、電波を検出すると「1」レ
ベルになる。 The high frequency input from the antenna 1 is converted by the mixing conversion circuit 2 into a frequency different from the oscillation frequency of the local oscillation circuit 5, that is, into an intermediate frequency. The intermediate frequency is amplified by an intermediate frequency amplification circuit 3, detected by a detection circuit 4, and outputted as an audio signal 4a. This is the output signal from the tuner. The detection circuit 4 outputs an AGC signal 4b for gain control according to the signal strength. Figure 1 shows a configuration assuming that reverse AGC is used. AGC signal 4
In addition to controlling the gain of the intermediate frequency amplification circuit 3 and the like, signal b is input to the Schmitt trigger circuit 20 and generates a station detection signal 20a that indicates the presence or absence of radio waves.
The station detection signal 20a becomes "1" level when a radio wave is detected.
一方、局発回路5の発振周波数は、プログラマ
ブル・デバイダ6の分周比Nと基準信号発生器1
0の周波数との積となる様に、位相比較器7とロ
ーパス・フイルタ8を介して制御される。9は基
準周波数用の水晶である。 On the other hand, the oscillation frequency of the local oscillator 5 is determined by the division ratio N of the programmable divider 6 and the reference signal generator 1.
It is controlled via a phase comparator 7 and a low-pass filter 8 so that it becomes the product of the frequency of 0. 9 is a crystal for reference frequency.
アツプダウンカウンタ13とラツチ15は受信
周波数決定手段である。 Up-down counter 13 and latch 15 are reception frequency determining means.
アツプダウン・カウンタ13は、操作部11等
からの入力によりオートチユーニング時のアツプ
スキヤン又はダウンスキヤンを開始し、制御部1
2の制御により、カウントアツプ又はカウントダ
ウンする。アツプダウン・カウンタ13の出力
は、ラツチ15を介して、プログラマブル・デバ
イダ6に入力し、受信周波数を決定する。チヤネ
ル・メモリ14とラツチ16は受信周波数決定手
段の分周比を記憶する記憶回路である。本実施例
ではオートチユーニング開始前の受信周波数の分
周比を記憶する手段としてラツチ16を設けてあ
り、該記憶回路はラツチ16とプリセツト局メモ
リであるチヤンネル・メモリ14とに分離した例
を示している。チヤンネル・メモリ14は、放送
局の存在する周波数の分周比を何局かメモリし、
操作部11からプリセツト・チヤンネルの呼出し
操作があつた場合に、指定チヤンネルの分周比を
ラツチ15に入力する事によりプリセツト・チユ
ーニングを可能にする。本発明の最も特徴あると
ころは、一致検出回路17とラツチ16とタイマ
ー19の働きである。受信状態では、ラツチ16
は、ラツチ15の内容を書き込み状態となつてい
る。オートサーチ時には、ラツチ16は読出し状
態となる。オートサーチが始まるとラツチ15の
出力は時々刻々と加算又は減算する。 The up-down counter 13 starts up-scanning or down-scanning during auto-tuning in response to input from the operating unit 11, etc.
2, the count up or count down is performed. The output of up-down counter 13 is input through latch 15 to programmable divider 6 to determine the receiving frequency. Channel memory 14 and latch 16 are storage circuits that store the frequency division ratio of the receiving frequency determining means. In this embodiment, a latch 16 is provided as means for storing the division ratio of the reception frequency before the start of auto-tuning, and an example in which the storage circuit is separated into the latch 16 and the channel memory 14, which is a preset station memory, is provided. It shows. The channel memory 14 stores the frequency division ratio of several broadcasting stations,
When a preset channel is called from the operating section 11, the frequency division ratio of the designated channel is input to the latch 15 to enable preset tuning. The most distinctive feature of the present invention is the function of the coincidence detection circuit 17, latch 16, and timer 19. In the receiving state, latch 16
is in a state where the contents of the latch 15 are written. During auto search, latch 16 is in the read state. When the auto search starts, the output of the latch 15 is added or subtracted from time to time.
一致検出回路17は、ラツチ15とラツチ16
の内容を比較しており、周波数スキヤンが一回り
してもとの周波数となると、17aに一致検出信
号を出力する。すると制御部12は、アツプダウ
ン・カウンタ13のクロツク信号を停止し、アツ
プダウン・カウンタ13の出力つまり、ラツチ1
5の出力をラツチ16の出力に一致させ、スキヤ
ン開始前と同じ周波数を受信させる。上記の動作
は、スキヤン開始後放送局が見つからない場合で
あり、スキヤン中に放送局が見つかつた場合は、
その周波数でスキヤンを停止する。タイマ回路1
9は、受信中の周波数で電波が特定時間以上検出
されない場合に、自動的にオートチユーニングを
開始させる。例えば、カーラジオ等で受信中に移
動して放送局から遠ざかつた為、受信できなくな
つた場合、自動的に別の局をさがす働きをする。
又、移動中にトンネルに入つた場合、どの周波数
の電波も検出されなくなる。すると、オートチユ
ーニングを開始するが、一回りスキヤンして電波
が検出されなければ、オートチユーニングを開始
する前の周波数にチユーニングした状態で、しば
らく待つている。この間にトンネルから脱出すれ
ば、もとの放送局を受信する。 The coincidence detection circuit 17 includes latch 15 and latch 16.
When the frequency scan returns to the original frequency once, a coincidence detection signal is output to 17a. Then, the control unit 12 stops the clock signal of the up-down counter 13, and the output of the up-down counter 13, that is, the latch 1
The output of latch 16 is made to match the output of latch 16, so that the same frequency as before the start of scanning is received. The above operation occurs when a broadcasting station is not found after scanning starts, and if a broadcasting station is found during scanning,
Stop scanning at that frequency. Timer circuit 1
9 automatically starts auto-tuning when radio waves are not detected at the frequency being received for a certain period of time or more. For example, if you move away from a broadcasting station while receiving signals on a car radio and are no longer able to receive it, the system will automatically search for another station.
Also, if you enter a tunnel while moving, radio waves of any frequency will not be detected. Then, auto-tuning starts, but if no radio waves are detected after one scan, the device waits for a while while tuning to the frequency before starting auto-tuning. If you escape from the tunnel during this time, you will receive the original broadcast station.
以上本発明によれば、必要最小限の操作で、チ
ユーニングできる効果を有する。又、LEDで一
定時間だけ周波数表示するポケツトラジオでは、
節電の効果を有する。 As described above, according to the present invention, it is possible to perform tuning with a minimum number of operations. In addition, pocket radios display the frequency for a certain period of time using LEDs.
It has the effect of saving electricity.
図面は本発明の実施例を示す図である。
1……アンテナ、2……混合変換回路、3……
中間周波増幅回路、4……検波回路、5……局発
回路、6……プログラマブル・デバイダ、7……
位相比較器、8……ローパス・フイルタ、9……
水晶、10……基準信号発生器、11……操作
部、12……制御部、13……アツプダウン・カ
ウンタ、14……チヤンネル・メモリ、15,1
6……ラツチ、17……一致検出回路、19……
タイマ回路、20……シユミツトトリガ回路、4
a……音声信号(チユーナ出力)、4b……AGC
信号、20a……局検出信号である。
The drawings are diagrams showing embodiments of the invention. 1...Antenna, 2...Mixing conversion circuit, 3...
Intermediate frequency amplification circuit, 4...Detection circuit, 5...Local oscillator circuit, 6...Programmable divider, 7...
Phase comparator, 8...Low pass filter, 9...
Crystal, 10... Reference signal generator, 11... Operation section, 12... Control section, 13... Up-down counter, 14... Channel memory, 15, 1
6... Latch, 17... Coincidence detection circuit, 19...
Timer circuit, 20... Schmitt trigger circuit, 4
a...Audio signal (tuner output), 4b...AGC
Signal 20a is a station detection signal.
Claims (1)
局部発振回路、任意の自然数の分周比を得られる
分周回路、該分周回路の分周比を設定するラツチ
回路又はカウンタ回路による受信周波数決定手段
を備える周波数シイセサイザチユーナにおいて、
自動選局スキヤン動作をしていない時の前記受信
周波数決定手段の分周比を記憶する記憶回路、該
記憶回路と受信周波数決定手段に記憶されている
分周比の大きさを比較する一致検出回路、自動選
局スキヤン動作時に前記ラツチ回路又はカウンタ
回路に入力しているクロツク信号を、前記一致検
出回路の出力に応じて発信又は停止する制御回路
とをそなえ、周波数スキヤン開始後に放送電波が
検出されない場合に、周波数スキヤンを開始する
前の受信周波数で周波数スキヤンを停止する事を
特徴とする自動選局チユーナ。1. Receiving frequency determining means using a frequency conversion circuit, a local oscillation circuit that can voltage-control the frequency, a frequency division circuit that can obtain a frequency division ratio of any natural number, and a latch circuit or counter circuit that sets the frequency division ratio of the frequency division circuit. In a frequency sizer tuner equipped with,
A memory circuit for storing the frequency division ratio of the receiving frequency determining means when the automatic channel selection scan operation is not performed, and a match detection for comparing the magnitude of the frequency dividing ratio stored in the memory circuit and the receiving frequency determining means. The circuit includes a control circuit that transmits or stops the clock signal input to the latch circuit or counter circuit during the automatic tuning scan operation according to the output of the coincidence detection circuit, and the broadcast radio wave is detected after the frequency scan starts. An automatic tuning tuner characterized in that, if the frequency scan is not received, the frequency scan is stopped at the received frequency before starting the frequency scan.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17111980A JPS5795718A (en) | 1980-12-04 | 1980-12-04 | Automatic channel selection tuner |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17111980A JPS5795718A (en) | 1980-12-04 | 1980-12-04 | Automatic channel selection tuner |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5795718A JPS5795718A (en) | 1982-06-14 |
JPS634729B2 true JPS634729B2 (en) | 1988-01-30 |
Family
ID=15917326
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17111980A Granted JPS5795718A (en) | 1980-12-04 | 1980-12-04 | Automatic channel selection tuner |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5795718A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58131813A (en) * | 1982-02-01 | 1983-08-05 | Fujitsu Ten Ltd | On-vehicle radio receiver |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55118218A (en) * | 1979-03-05 | 1980-09-11 | Sanyo Electric Co Ltd | Electronic tuner |
-
1980
- 1980-12-04 JP JP17111980A patent/JPS5795718A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55118218A (en) * | 1979-03-05 | 1980-09-11 | Sanyo Electric Co Ltd | Electronic tuner |
Also Published As
Publication number | Publication date |
---|---|
JPS5795718A (en) | 1982-06-14 |
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