JPS6346460B2 - - Google Patents
Info
- Publication number
- JPS6346460B2 JPS6346460B2 JP8764281A JP8764281A JPS6346460B2 JP S6346460 B2 JPS6346460 B2 JP S6346460B2 JP 8764281 A JP8764281 A JP 8764281A JP 8764281 A JP8764281 A JP 8764281A JP S6346460 B2 JPS6346460 B2 JP S6346460B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- memory
- cpu
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015654 memory Effects 0.000 claims description 41
- 238000013481 data capture Methods 0.000 claims 1
- 238000010926 purge Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 238000012544 monitoring process Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000009432 framing Methods 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/22—Means for limiting or controlling the pin/gate ratio
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Microcomputers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8764281A JPS57203162A (en) | 1981-06-08 | 1981-06-08 | One-chip microcomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8764281A JPS57203162A (en) | 1981-06-08 | 1981-06-08 | One-chip microcomputer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57203162A JPS57203162A (en) | 1982-12-13 |
| JPS6346460B2 true JPS6346460B2 (ko) | 1988-09-14 |
Family
ID=13920632
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8764281A Granted JPS57203162A (en) | 1981-06-08 | 1981-06-08 | One-chip microcomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57203162A (ko) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61269705A (ja) * | 1985-05-24 | 1986-11-29 | Omron Tateisi Electronics Co | プログラマブル・コントロ−ラ |
| JPH02181237A (ja) * | 1989-01-06 | 1990-07-16 | Hitachi Ltd | マイクロプロセッサ |
| JPH10289126A (ja) * | 1997-04-15 | 1998-10-27 | Fujitsu Ltd | マイクロコントローラ及び中継器 |
-
1981
- 1981-06-08 JP JP8764281A patent/JPS57203162A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57203162A (en) | 1982-12-13 |
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