JPS6343996B2 - - Google Patents
Info
- Publication number
- JPS6343996B2 JPS6343996B2 JP55147607A JP14760780A JPS6343996B2 JP S6343996 B2 JPS6343996 B2 JP S6343996B2 JP 55147607 A JP55147607 A JP 55147607A JP 14760780 A JP14760780 A JP 14760780A JP S6343996 B2 JPS6343996 B2 JP S6343996B2
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- current
- thyristor
- accident
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 15
- 238000004804 winding Methods 0.000 claims description 7
- 238000009499 grossing Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000010304 firing Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/505—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
- H02M7/515—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Description
【発明の詳細な説明】
本発明はインバータの転流失敗や誤点弧等によ
る直流短絡事故時及びインバータの出力短絡事故
時に動作するインバータの保護回路に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inverter protection circuit that operates in the event of a DC short-circuit accident due to an inverter commutation failure or erroneous ignition, or an inverter output short-circuit accident.
第１図は従来の直流短絡事故時のインバータの
保護方式を示すブロツク図である。ここで１は整
流器、２は直流リアクトル、３は電解コンデン
サ、５はインバータである。第１図ａはヒユーズ
４を使用して直流短絡事故時の過電流によるヒユ
ーズの溶断で保護するものであり、第１図ｂは事
故発生とともにリアクトル６、サイリスタ７の短
絡器を動作させて電解コンデンサ３の充電電荷を
放電させインバータの構成素子の保護を行なうも
のである。さらに、インバータ構成素子の全点弧
を行ない局所的に事故電流が集中するのを防止し
て一素子に通流する事故電流を軽減する方法も行
われる。第１図ｃは、事故発生とともにリアクト
ル６、サイリスタ７の短絡器を動作させヒユーズ
４の溶断を早めてインバータ素子の過電流保護を
行なう方式である。このような従来方式ではゲー
トターンオフサイリスタ（以下GTOと記す）を
使用するインバータの保護回路としては下記の点
か問題となる。 FIG. 1 is a block diagram showing a conventional inverter protection system in the event of a DC short circuit accident. Here, 1 is a rectifier, 2 is a DC reactor, 3 is an electrolytic capacitor, and 5 is an inverter. Figure 1a shows the use of fuse 4 to protect the fuse from blowing due to overcurrent in the event of a DC short-circuit accident, and Figure 1b shows the protection by activating the short circuit of reactor 6 and thyristor 7 when an accident occurs to prevent electrolysis. The charge in the capacitor 3 is discharged to protect the components of the inverter. Furthermore, a method is also used in which all of the inverter components are ignited to prevent the fault current from locally concentrating, thereby reducing the fault current flowing through one element. FIG. 1c shows a system in which when an accident occurs, the reactor 6 and the thyristor 7 short-circuit are activated to hasten the fuse 4 blowout to protect the inverter elements from overcurrent. In such a conventional system, the following problems arise as a protection circuit for an inverter that uses a gate turn-off thyristor (hereinafter referred to as GTO).
(1) ヒユーズ溶断前に事故発生時の過電流により
ターンオフ失敗してGTO素子が破損する可能
性がある。(1) Turn-off may fail due to overcurrent in the event of an accident before the fuse blows, and the GTO element may be damaged.
(2) ヒユーズ保護方式ては事故復帰に時間がかか
り平均修復時間が大となる。(2) With the fuse protection method, it takes time to recover from an accident, and the average recovery time becomes long.
(3) 又、同様に保護協調がとれず素子がターンオ
フ失敗により破損した場合一段と発生復帰に手
間どることになる。(3) Similarly, if protection coordination is not achieved and the element is damaged due to turn-off failure, it will take even more time to recover from the occurrence.
本発明は上記欠点を除去しインバータの直流短
絡事故や出力短絡事故時に動作するインバータの
保護回路を提供することを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide an inverter protection circuit that operates in the event of an inverter DC short-circuit accident or an output short-circuit accident.
本発明の一実施例を第２図を参照して説明す
る。 An embodiment of the present invention will be described with reference to FIG.
第１図と同一部には同一符号を付してその説明
は省略する。但し、順変換器を構成するサイリス
タを１１〜１６、インバータを構成するGTOを
５１〜５６、ダイオードを５７〜６２、とする。
サイリスタ７は事故発生時に点弧され電解コンデ
ンサ３の充電電荷を放電させ、リアクトル６ａ，
６ｂはこの放電電流波高値を制限する。但し、６
ｂは配線のインダクタンスでもよい。変流器８は
事故時にサイリスタ７の点弧により電解コンデン
サ３の放電電流をその二次巻線側にも放電させる
ことによつて、一次電流を減少させる。 Components that are the same as those in FIG. 1 are given the same reference numerals, and their explanations will be omitted. However, the thyristors configuring the forward converter are 11 to 16, the GTOs configuring the inverter are 51 to 56, and the diodes are 57 to 62.
The thyristor 7 is ignited when an accident occurs to discharge the charge in the electrolytic capacitor 3, and the reactor 6a,
6b limits this discharge current peak value. However, 6
b may be the inductance of the wiring. The current transformer 8 reduces the primary current by causing the discharge current of the electrolytic capacitor 3 to also discharge to its secondary winding side by firing the thyristor 7 in the event of an accident.
次に上記のように構成した保護回路の動作を第
３図Ａ〜第３図Ｄ及び第４図を参照して説明す
る。 Next, the operation of the protection circuit configured as described above will be explained with reference to FIGS. 3A to 3D and FIG. 4.
第４図の期間Ｔ０はインバータに事故が発生し
ていない期間を示す。 A period T0 in FIG. 4 indicates a period in which no accident occurs in the inverter.
時刻ｔ０にて例えば第３図のサイリスタ５１と
５４の同時点弧による直流短絡事故が発生すれば
電解コンデンサ３の電荷は第３図Ａのの経路で
示すように流れる。電流ipは直流電流idと電解コ
ンデンサ３の放電電流の和となるが、直流電流id
は直流リアクトル２の値が大きいため変化しない
が、電解コンデンサ３の放電電流は急激に増大す
る。この期間が第４図のＴ１の期間である。電流
ipの増大を図示しない過電流検出器或いは転流失
敗検出器等で検出し、サイリスタ７を点弧させ、
これと同時に順変換器１の直流電圧を急速に減少
させ直流電流idを遮断する。 If, for example, a DC short-circuit accident occurs at time t0 due to simultaneous firing of thyristors 51 and 54 in FIG. 3, the charge in electrolytic capacitor 3 flows as shown in the path shown in FIG. 3A. The current ip is the sum of the DC current id and the discharge current of the electrolytic capacitor 3, but the DC current id
does not change because the value of the DC reactor 2 is large, but the discharge current of the electrolytic capacitor 3 increases rapidly. This period is the period T1 in FIG. current
The increase in ip is detected by an overcurrent detector or a commutation failure detector (not shown), and the thyristor 7 is fired.
At the same time, the DC voltage of the forward converter 1 is rapidly reduced to cut off the DC current id.
時刻ｔ１にてサイリスタ７が点弧すれば、第３
図Ｂに示すようにの経路で電解コンデンサ３の
放電電流が流れる。の経路で放電電流が流れる
ことにより変流器８の一次側にはの経路で電流
が流れ、時刻ｔ２で電流ipが零になる。この期間
がＴ２期間である。 If the thyristor 7 fires at time t1, the third
The discharge current of the electrolytic capacitor 3 flows along a path as shown in FIG. B. As the discharge current flows through the path, a current flows through the primary side of the current transformer 8 through the path, and the current ip becomes zero at time t2. This period is the T2 period.
時刻ｔ２の直後にサイリスタ５１，５４がオフ
するとの経路の電流はダイオード５７〜６２を
介して流れる。経路の電流により電解コンデン
サ３の電圧Vcの極性は時刻ｔ３で零となりその
後極性が反転し、時刻ｔ４で逆極性の最大値に反
転し、経路の電流は零になり、これによつて経
路の電流も零になり、サイリスタ７はオフす
る。時刻ｔ２から時刻ｔ３までの期間がＴ３の期
間である。 The current in the path where the thyristors 51 and 54 are turned off immediately after time t2 flows through the diodes 57 to 62. Due to the current in the path, the polarity of the voltage Vc of the electrolytic capacitor 3 becomes zero at time t3, then the polarity is reversed, and at time t4, the polarity is reversed to the maximum value of the opposite polarity, and the current in the path becomes zero. The current also becomes zero and the thyristor 7 is turned off. The period from time t2 to time t3 is period T3.
時刻ｔ４で電解コンデンサ３の極性が反転した
後は第３図Ｄに示すようにの経路で電解コンデ
ンサ３の放電電流が流れ、時刻ｔ５にて電解コン
デンサ３の電圧極性は元に戻り、電流ipも零にな
る。 After the polarity of the electrolytic capacitor 3 is reversed at time t4, the discharge current of the electrolytic capacitor 3 flows through the path shown in FIG. also becomes zero.
以上で本発明による保護回路の動作は完了とな
る。 This completes the operation of the protection circuit according to the present invention.
以上、説明したように本発明によれば事故発生
時の過電流が原理的にインバータ構成素子側に分
流することをさまたげる効果が多大なので、ター
ンオフ失敗による破損を防止できかつ事故復帰が
容易で平均修復時間が小さいインバータの直流短
絡事故や出力短絡時に動作するインバータの保護
回路を提供できる。 As explained above, according to the present invention, the overcurrent in the event of an accident is theoretically prevented from being shunted to the inverter component side, so damage due to turn-off failure can be prevented, and recovery from the accident is easy and average. It is possible to provide an inverter protection circuit that operates in the event of an inverter DC short circuit accident or output short circuit that requires a short repair time.
第１図は従来の直流短絡事故時のインバータの
保護方式を示すブロツク図、第２図は本発明の一
実施例を示す構成図、第３図は本発明の保護回路
が動作した時に流れる電流経路を示した図、第４
図は本発明の保護回路が動作した時のインバータ
入力電流と電解コンデンサの電圧の変化を示した
図である。
１…整流器、２…直流リアクトル、３…電解コ
ンデンサ、５…インバータ、６ａ，６ｂ…リアク
トル、７…サイリスタ、８…変流器、１１〜１６
…サイリスタ、５１〜５６…ゲートターンオフサ
イリスタ、５７〜６２…ダイオード。
Fig. 1 is a block diagram showing a conventional inverter protection method in the event of a DC short circuit accident, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 is a current flowing when the protection circuit of the present invention operates. Diagram showing the route, No. 4
The figure shows changes in the inverter input current and electrolytic capacitor voltage when the protection circuit of the present invention operates. 1... Rectifier, 2... DC reactor, 3... Electrolytic capacitor, 5... Inverter, 6a, 6b... Reactor, 7... Thyristor, 8... Current transformer, 11 to 16
...Thyristor, 51-56...Gate turn-off thyristor, 57-62...Diode.
Claims (1)
滑回路を介して再び交流電力へ変換するインバー
タ装置において、一端が直流負母線に接続され他
端が前記平滑回路を構成するコンデンサを介して
直流正母線に接続される加極結線され且つ巻線比
ｎ（一次巻線と二次巻線との比）がｎ＜１なる変
成器の一次巻線と、アノード側か前記直流正母線
に接続されカソード側が前記変成器の二次巻線を
介して前記コンデンサと前記一次巻線との直列接
続点に接続されるサイリスタを具備し、前記サイ
リスタを前記インバータ装置の直流短絡事故時に
点弧するようにしたことを特徴とするインバータ
の保護回路。1. In an inverter device that rectifies AC input and converts the supplied DC power back into AC power via a smoothing circuit, one end is connected to a DC negative bus bar, and the other end converts DC power through a capacitor that constitutes the smoothing circuit. The primary winding of a transformer that is connected to the positive bus bar and has a winding ratio n (ratio of primary winding to secondary winding) of n<1, and the anode side is connected to the DC positive bus bar. and a thyristor whose cathode side is connected to a series connection point between the capacitor and the primary winding via the secondary winding of the transformer, and the thyristor is configured to ignite in the event of a DC short circuit accident of the inverter device. An inverter protection circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147607A JPS5775576A (en) | 1980-10-23 | 1980-10-23 | Protecting circuit for inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147607A JPS5775576A (en) | 1980-10-23 | 1980-10-23 | Protecting circuit for inverter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5775576A JPS5775576A (en) | 1982-05-12 |
| JPS6343996B2 true JPS6343996B2 (en) | 1988-09-02 |
Family
ID=15434147
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55147607A Granted JPS5775576A (en) | 1980-10-23 | 1980-10-23 | Protecting circuit for inverter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5775576A (en) |
-
1980
- 1980-10-23 JP JP55147607A patent/JPS5775576A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5775576A (en) | 1982-05-12 |
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