JPS6343317A - Selective metal deposition method - Google Patents

Selective metal deposition method

Info

Publication number
JPS6343317A
JPS6343317A JP18712186A JP18712186A JPS6343317A JP S6343317 A JPS6343317 A JP S6343317A JP 18712186 A JP18712186 A JP 18712186A JP 18712186 A JP18712186 A JP 18712186A JP S6343317 A JPS6343317 A JP S6343317A
Authority
JP
Japan
Prior art keywords
film
contact hole
metal
semiconductor
depositing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18712186A
Other languages
Japanese (ja)
Inventor
Takao Kakiuchi
垣内 孝夫
Tsutomu Fujita
勉 藤田
Hiroshi Yamamoto
浩 山本
Shoichi Tanimura
谷村 彰一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18712186A priority Critical patent/JPS6343317A/en
Publication of JPS6343317A publication Critical patent/JPS6343317A/en
Priority to US07/532,170 priority patent/US5084413A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To deposite a metal with a simple construction and good selectivity by depositing a metal after depositing a doped semiconductor or a metallic film in the connection hole of an insulating material of a semiconductor substrate. CONSTITUTION:An N<+> layer 3 is provided in a Si substrate 1, an SiO2 film 2 is provided with an opening 4, which is coated with a doped polysilicon 5 and further with a photoresist 6, which is etched with a O2 plasma, left in the hole 4, and depressed from the SiO2 surface. The polysilicon 5 is etched away, and a W-film 7 is deposited. Since the edge of the Si 5 was previously depressed from the SiO2 film 2, the W does not swell above the SiO2 film. Since the side and the bottom of the connection hole are coated with the polysilicon according to this construction, the W grows from both the side and the bottom, and filling is completed with a film thickness about half that for the growth only from the bottom. In addition, since the bottom is coated with the polysilicon, no connection leakage occurs due to the penetration of the W.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体基板上への金属の選択堆積法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for selectively depositing metals onto semiconductor substrates.

従来の技術 第3図に示すのは、従来の半導体基板上への金属の選択
堆積法の一実施例でちる。図中8はSi基板、9は厚さ
約1μmの熱酸化膜、10はn+拡散層、11はコンタ
クトホール、12は厚さ約500OAのW膜、13は熱
酸化膜9上に成長したWの核、14はSi  基板8と
熱酸化膜9の界面へのWのエンクローチメント、15は
拡散層10へのWの入り込みである。
BACKGROUND OF THE INVENTION FIG. 3 shows an example of a conventional method for selectively depositing metal on a semiconductor substrate. In the figure, 8 is a Si substrate, 9 is a thermal oxide film with a thickness of about 1 μm, 10 is an n+ diffusion layer, 11 is a contact hole, 12 is a W film with a thickness of about 500 OA, and 13 is W grown on the thermal oxide film 9. 14 is the encroachment of W on the interface between the Si substrate 8 and the thermal oxide film 9, and 15 is the intrusion of W into the diffusion layer 10.

Si 基板8上に形成した厚さ約1μmの熱酸化膜9に
直径約1μmのコンタクトホール11を開孔した第3図
aに示すような試料に、減圧CVD法によるWF6 ガ
スとH2ガスの反応を用いて、選択的にコンタクトホー
ル11内にW膜12を堆積することができる。〔例えば
、T、Morfya etal、アイイーイーイー、ア
イ・r−デーエム(IEEE、IEDM)83  P2
S5)発明が解決しようとする問題点 しかし、このような従来のWの選択堆積法では、堆積前
の基板の表面処理、堆積温度、ガス流量等の条件の違い
によって選択性が悪くなったり。
A reaction between WF6 gas and H2 gas was performed using a low pressure CVD method on a sample as shown in FIG. The W film 12 can be selectively deposited inside the contact hole 11 using the method. [For example, T, Morfya etal, IEE, IEDM (IEEE, IEDM) 83 P2
S5) Problems to be Solved by the Invention However, in such conventional W selective deposition methods, selectivity may deteriorate due to differences in conditions such as surface treatment of the substrate before deposition, deposition temperature, gas flow rate, etc.

Si基板8との界面の状態が悪くなったりすることがあ
り、第3図すに示すように、Wの核13が熱酸化膜9上
に形成された9、熱酸化膜9とSi基板8との界面にW
のエンクローチメント14が起こったり、Wの拡散層へ
の入り込み15が起こり、接合がショートするといった
様々な問題を起こす原因となっていた。
The state of the interface with the Si substrate 8 may deteriorate, and as shown in FIG. W on the interface with
Encroachment 14 of W occurs, W enters the diffusion layer 15, and this causes various problems such as short-circuiting of the junction.

本発明はかかる点に鑑みてなされたもので、簡易な構成
で選択性の良好な金属の選択堆積1去を提供することを
目的としている。
The present invention has been made in view of this point, and an object of the present invention is to provide a method for selectively depositing and removing metals with a simple structure and good selectivity.

問題点を解決するための手段 本発明は上記問題点を解決するため、半導体基板表面に
堆積した絶縁膜にコンタクトホールを形成し、前記コン
タクトホール内に不純物をドープした半導体又は金属膜
たとえばドープドpolysjを堆積した後に金属たと
えばWを選択堆積することによって、選択性が良好でか
つエンクローチメント拡散層への入り込みの無い良好な
金属の選択堆積法を提供するものである。
Means for Solving the Problems In order to solve the above problems, the present invention forms a contact hole in an insulating film deposited on the surface of a semiconductor substrate, and forms a semiconductor or metal film doped with impurities in the contact hole, such as a doped polysilicon film. By selectively depositing a metal, such as W, after depositing the metal, it is possible to provide a method for selectively depositing a metal, which has good selectivity and does not penetrate into the encroachment diffusion layer.

作   用 本発明は上記した構成により、コンタクトホール内部の
側面及び底面がドープドpolysiでおおわれている
ため、Wはコンタクトホール側面と底面の両方から成長
するので、底面のみから埋め込む場合の約半分の膜厚で
コンタクトホールを埋め込むことができ1選択性の面で
有利である上、コンタクトホール底面がドープドpol
ysiでおおわれているため、Wの入り込みによる接合
リークや、エンクローチメントの心配が無い。
Effects According to the present invention, with the above-described structure, the side surfaces and bottom surface of the inside of the contact hole are covered with doped polysilicon, so that W grows from both the side surface and the bottom surface of the contact hole, so that the amount of film is about half that of filling only from the bottom surface. The contact hole can be filled thickly, which is advantageous in terms of selectivity, and the bottom surface of the contact hole is doped with pol.
Since it is covered with ysi, there is no need to worry about junction leakage or encroachment due to the intrusion of W.

実施例 第1図は本発明の金属の選択堆積法の第一の実施例であ
る。
Embodiment FIG. 1 shows a first embodiment of the selective metal deposition method of the present invention.

図中1は半導体Si基板、2は厚さ約1μmの酸化膜、
3はn+拡散層、4はコンタクトホール、6は厚さ約1
0oO人のドープ)”polysi 、6はフォトレジ
スト、7はW膜である。
In the figure, 1 is a semiconductor Si substrate, 2 is an oxide film with a thickness of about 1 μm,
3 is an n+ diffusion layer, 4 is a contact hole, and 6 is a thickness of about 1
6 is a photoresist, and 7 is a W film.

第1図aのようにSt 基板1にn+拡散層3を形成し
、酸化膜2を堆積してコンタクトホール4を開孔した後
、第1図すのようにドープドpoLysi5を全面に堆
積する。このようにして作製した試料に通常のスルピン
コート法によシフオドレジストを塗布し、コンタクトホ
ール内にのみフォトレジストが残るように02プラズマ
を用いてエツチングしたものを第1図Cに示す。この時
フォトレジスト6は、酸化膜2の表面より堆積するW膜
の厚みだけ凹むようにする。このフォトレジスト6をマ
スクとしてドープドpo 1 yS i 5をエツチン
グしたものを、第1図dに示す。更にフォトレジスト6
をエツチングしたものを第1図eに示す。この第1図e
のようにして作成した試料に厚さ約600゜人のW膜を
堆積したものを第1図fに示す。あらかじめドープドp
olysi 6のエツジが酸化膜2よりも凹むように形
成されているため、W膜7が酸化膜2上に盛り上がるこ
とがない。
As shown in FIG. 1A, an n+ diffusion layer 3 is formed on a St 2 substrate 1, an oxide film 2 is deposited, and a contact hole 4 is opened, after which doped poLysi 5 is deposited over the entire surface as shown in FIG. A shift resist was applied to the sample prepared in this manner by the usual sulpine coating method, and the photoresist was etched using 02 plasma so that the photoresist remained only in the contact holes, as shown in FIG. 1C. At this time, the photoresist 6 is recessed from the surface of the oxide film 2 by the thickness of the W film to be deposited. The doped po 1 yS i 5 is etched using the photoresist 6 as a mask, as shown in FIG. 1d. Furthermore, photoresist 6
The etched version is shown in Figure 1e. This figure 1 e
Figure 1f shows a sample prepared in the manner described above with a W film of approximately 600° thick deposited thereon. pre-doped p
Since the edge of the olysi 6 is formed to be recessed than the oxide film 2, the W film 7 does not rise above the oxide film 2.

本発明の方法を用いれば、コンタクトホール側壁からW
膜を埋め込むことができるため、コンタクトホール底面
から埋め込む場合の約半分の膜厚でコンタクトホールを
埋め込むことができ、プロセス時間を短縮してニス−ル
ープツトを向上させることがでさる上に選択性の面でも
有利である。またコンタクト底面がドープドpolys
iでおおわれているため、エンクローチメントやn+拡
散層へのWのつきぬけによるショート等といった問題が
起こる心配がない。さらにドープドpo l yS i
を用いているため、コンタクト抵抗が劣化する心配が無
く・安定なコンタクト特性を得ることができる。
If the method of the present invention is used, W
Since the film can be buried, the contact hole can be filled with a film thickness that is approximately half that of filling from the bottom of the contact hole, which shortens process time and improves varnish loops, as well as improving selectivity. It is also advantageous in terms of Also, the bottom of the contact is doped poly
Since it is covered with i, there is no concern that problems such as encroachment or short circuits due to penetration of W into the n+ diffusion layer will occur. Furthermore, doped polyS i
Since the contact resistance is used, there is no concern that the contact resistance will deteriorate and stable contact characteristics can be obtained.

なお、本実施例においては基板としてSi基板を用い、
直接Si表面へのWの選択堆積を行ったが、Si 表面
以外の表面1例えばMやTi  又はW等の金属が露出
した表面であっても同様な効果が得られる。また絶縁膜
として酸化膜を用いたが。
Note that in this example, a Si substrate is used as the substrate,
Although W was selectively deposited directly onto the Si surface, similar effects can be obtained even on surfaces other than the Si surface, for example, surfaces where metals such as M, Ti, or W are exposed. Also, an oxide film was used as the insulating film.

313N4 膜等の酸化膜以外の絶縁膜であってもある
いはそれらの多層膜であってもかまわないことはもちろ
んである。また基板材料としてSi以外の材料例えばG
aAg等を用いても同様の効果が得られる。また拡散層
としてn+ 拡散N k 用nfcカ・p+拡散層を用
いてもよいことはもちろんである。
It goes without saying that an insulating film other than an oxide film such as a 313N4 film or a multilayer film thereof may be used. In addition, materials other than Si, such as G, can be used as the substrate material.
A similar effect can be obtained by using aAg or the like. It goes without saying that an nfc/p+ diffusion layer for n+ diffusion N k may be used as the diffusion layer.

第2図に示すのは本発明の金属の選択堆積法の第二の実
施例である。図中16は81基板、17は、厚さ約1 
μmの酸化膜、18はドープ)”polysi、19は
コンタクトホール、20はコンタクト拡散層、21はW
膜である。
FIG. 2 shows a second embodiment of the selective metal deposition method of the present invention. In the figure, 16 is an 81 board, 17 is a thickness of about 1
μm oxide film, 18 is doped polysi, 19 is a contact hole, 20 is a contact diffusion layer, 21 is W
It is a membrane.

第1の実施例の第1図におけると同、様の方法で第3図
aに示すようにコンタクトポール内にドープドpoly
si 18を形成した後、熱処理することによって第3
図すに示すようにコンタクト拡散層20を形成し、さら
に第3図Cに示すようにWの選択堆積を行う。この方法
を用いればWの堆積を行う前にコンタクト拡散を行わな
くて良いため。
In the same manner as in FIG. 1 of the first embodiment, doped poly is added into the contact pole as shown in FIG. 3a.
After forming si 18, the third
A contact diffusion layer 20 is formed as shown in the figure, and W is selectively deposited as shown in FIG. 3C. If this method is used, there is no need to perform contact diffusion before depositing W.

プロセスを大巾に簡略化することができる。The process can be greatly simplified.

発明の効果 以上述べてきたように本発明によれば、きわめて簡易な
構成で非常に良好な金属の選択堆積を行うことができ、
実用上きわめて有用である。
Effects of the Invention As described above, according to the present invention, very good selective deposition of metal can be performed with an extremely simple configuration.
It is extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は本発明の実施例におけるWの選択堆積
法を示す工程断面図、第3図は従来のWの選択堆積を示
す工程断面図である。 1・・・・・・St 基板、2・・・・・・酸化膜、3
・・・・・・n 拡散層、4・・・・・・コンタクトホ
ール、6・・・・・・ドープドpolysi 、 6・
・・・・・フォトレジスト、7・・・・・・W膜。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名クー
11r菰欽4 4        4−°−ゴ〉ククト示−λし第1図 、 6      °−“パ“″パ 第1図
1 and 2 are process cross-sectional views showing a selective deposition method of W in an embodiment of the present invention, and FIG. 3 is a process cross-sectional view showing a conventional selective deposition of W. 1...St substrate, 2... Oxide film, 3
......n diffusion layer, 4...contact hole, 6...doped polysi, 6.
...Photoresist, 7...W film. Name of agent: Patent attorney Toshio Nakao and one other person

Claims (5)

【特許請求の範囲】[Claims] (1)半導体基板表面への金属の選択堆積に際し、前記
半導体基板表面に絶縁膜を堆積し、コンタクトホールを
形成する工程と、前記コンタクトホールの側面及び底面
に不純物をドープした半導体又は金属膜を形成する工程
と、前記コンタクトホール内に前記金属を選択堆積する
工程とを有してなる金属の選択堆積法。
(1) When selectively depositing metal on the surface of a semiconductor substrate, a step of depositing an insulating film on the surface of the semiconductor substrate and forming a contact hole, and depositing a semiconductor or metal film doped with impurities on the side and bottom surfaces of the contact hole. A method for selectively depositing a metal, comprising the steps of: forming a contact hole; and selectively depositing the metal in the contact hole.
(2)コンタクトホール内の不純物をドープした半導体
又は金属膜より、前記コンタクトホール内の半導体基板
表面にコンタクト拡散を行う特許請求の範囲第1項記載
の金属の選択堆積法。
(2) The selective metal deposition method according to claim 1, wherein contact diffusion is performed on the surface of the semiconductor substrate within the contact hole from a semiconductor or metal film doped with impurities within the contact hole.
(3)半導体としてドープドポリシリコンを用いる特許
請求の範囲第1項記載の金属の選択堆積法。
(3) The selective metal deposition method according to claim 1, in which doped polysilicon is used as the semiconductor.
(4)コンタクトホールの側面及び底面に半導体又は金
属膜を形成する工程において、前記コンタクトホールを
形成した半導体基板表面全面に前記半導体又は金属膜を
堆積する工程と、前記半導体基板表面全面に前記半導体
又は金属膜及び前記絶縁膜とはエッチング特性の異なる
塗布膜を表面が平坦化されるように形成する工程と、前
記塗布膜をエッチングすることにより上記コンタクトホ
ール内にのみ前記塗布膜を残す工程と、前記途布膜をマ
スクとして前記半導体又は金属膜を除去し、前記コンタ
クトホールの側面及び底面にのみ前記半導体又は金属膜
を形成する工程と、前記塗布膜を除去する工程とを有す
る特許請求の範囲第1項記載の金属の選択堆積法。
(4) In the step of forming a semiconductor or metal film on the side and bottom surfaces of the contact hole, the step of depositing the semiconductor or metal film on the entire surface of the semiconductor substrate in which the contact hole is formed, and the step of depositing the semiconductor or metal film on the entire surface of the semiconductor substrate in which the contact hole is formed; or a step of forming a coating film having etching characteristics different from those of the metal film and the insulating film so that the surface thereof is flattened, and a step of etching the coating film to leave the coating film only in the contact hole. , a step of removing the semiconductor or metal film using the unused film as a mask, and forming the semiconductor or metal film only on the side and bottom surfaces of the contact hole; and a step of removing the coated film. A method for selectively depositing the metal according to scope 1.
(5)コンタクトホール内にのみ塗布膜を残す工程にお
いて、前記塗布膜の表面が絶縁膜の表面より凹んだ構造
になるように前記塗布膜を残すようにした特許請求の範
囲第4項記載の金属の選択堆積法。
(5) In the step of leaving the coating film only in the contact hole, the coating film is left in such a manner that the surface of the coating film is recessed from the surface of the insulating film. Selective deposition of metals.
JP18712186A 1986-04-15 1986-08-08 Selective metal deposition method Pending JPS6343317A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP18712186A JPS6343317A (en) 1986-08-08 1986-08-08 Selective metal deposition method
US07/532,170 US5084413A (en) 1986-04-15 1990-05-29 Method for filling contact hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18712186A JPS6343317A (en) 1986-08-08 1986-08-08 Selective metal deposition method

Publications (1)

Publication Number Publication Date
JPS6343317A true JPS6343317A (en) 1988-02-24

Family

ID=16200478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18712186A Pending JPS6343317A (en) 1986-04-15 1986-08-08 Selective metal deposition method

Country Status (1)

Country Link
JP (1) JPS6343317A (en)

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