JPS6342455B2 - - Google Patents

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Publication number
JPS6342455B2
JPS6342455B2 JP9992481A JP9992481A JPS6342455B2 JP S6342455 B2 JPS6342455 B2 JP S6342455B2 JP 9992481 A JP9992481 A JP 9992481A JP 9992481 A JP9992481 A JP 9992481A JP S6342455 B2 JPS6342455 B2 JP S6342455B2
Authority
JP
Japan
Prior art keywords
phase
signal
component
positive
pulse train
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9992481A
Other languages
Japanese (ja)
Other versions
JPS581353A (en
Inventor
Koji Ishida
Tadashi Noguchi
Tatsuo Numata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP9992481A priority Critical patent/JPS581353A/en
Priority to US06/392,129 priority patent/US4502148A/en
Publication of JPS581353A publication Critical patent/JPS581353A/en
Publication of JPS6342455B2 publication Critical patent/JPS6342455B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits
    • H03D1/2209Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits
    • H03D1/2209Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • H03D1/2236Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【発明の詳細な説明】 本発明はステレオ復調装置に関し、特にサブ信
号の復調の際にサブキヤリヤ信号とFMコンポジ
ツト信号との乗算をなすようにしたFMステレオ
復調装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stereo demodulation device, and more particularly to an FM stereo demodulation device that multiplies a subcarrier signal and an FM composite signal when demodulating a subsignal.

FMステレオ信号の復調に際して38KHzの矩形
波サブキヤリヤ信号によりコンポジツト信号をス
イツチングするスイツチング方式の復調装置があ
るが、スイツチングのための矩形波サブキヤリヤ
信号が38KHzの奇数次高調波成分を有している関
係上、この奇数次高調波(38×3=114KHz,38
×5=190KHz)が隣接局とビート妨害を生じて
好ましくない影響を与えている。これを防ぐには
FMステレオ復調段の入力にハイカツトフイルタ
であるいわゆるアンチバーデイフイルタを挿入す
る必要があるが、このフイルタのコンポジツト周
波数成分における周波数特性や遅延特性が平坦で
なくなり、ステレオ復調出力に歪やセパレーシヨ
ン悪化を生じている。またフイルタのコア材の歪
による音質の劣化を避けられない。
There is a switching type demodulator that switches a composite signal using a 38KHz square wave subcarrier signal when demodulating an FM stereo signal, but because the square wave subcarrier signal for switching has a 38KHz odd harmonic component. , this odd harmonic (38×3=114KHz, 38
×5=190KHz) causes beat interference with adjacent stations and has an undesirable effect. To prevent this
It is necessary to insert a so-called antibirdy filter, which is a high-cut filter, at the input of the FM stereo demodulation stage, but the frequency characteristics and delay characteristics of the composite frequency component of this filter are no longer flat, causing distortion and separation deterioration in the stereo demodulation output. is occurring. Furthermore, deterioration in sound quality due to distortion of the core material of the filter cannot be avoided.

そのために、正弦波サブキヤリヤ信号を用いて
アナログ的な乗算方式を採用すれば上記欠点は除
去されるが、S/Nや歪の点で優れたリニアな乗
算回路を構成することは極めて困難である。
For this purpose, the above drawbacks can be removed by adopting an analog multiplication method using a sine wave subcarrier signal, but it is extremely difficult to construct a linear multiplication circuit with excellent S/N and distortion. .

本発明の目的は上記の欠点を排除して特性の良
いFMステレオ信号を分離しうるFMステレオ復
調装置を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide an FM stereo demodulator capable of eliminating the above drawbacks and separating FM stereo signals with good characteristics.

本発明によるFMステレオ復調装置は、FM信
号のステレオコンポジツト信号周波数スペクトラ
ム成分を有するパルス列信号の正相及び逆相信号
を夫々所定直流成分を含んで発生する手段と、ス
テレオパイロツト信号に同期した正弦波状のサブ
キヤリヤ信号の正逆信号を発生する手段と、直流
成分を含んだ正相及び逆相のパルス列信号と逆相
及び正相のサブキヤリヤ信号とのそれぞれの乗算
出力を発生し、これら乗算出力と直流成分を含ん
だ正相パルス列信号とを混合する第1の混合手段
と、直流成分を含んだ正相及び逆相のパルス列信
号と正相及び逆相のサブキヤリヤ信号とのそれぞ
れの乗算出力を発生し、これら乗算出力と直流成
分を含んだ正相パルス列信号とを混合する第2の
混合手段とを有し、第1及び第2の混合手段の出
力からそれぞれステレオオーデイオ信号を得るよ
うにしたことを特徴とするものである。
The FM stereo demodulator according to the present invention includes means for generating positive-phase and negative-phase signals of a pulse train signal having a stereo composite signal frequency spectrum component of an FM signal, each including a predetermined DC component, and a sine demodulator synchronized with a stereo pilot signal. means for generating positive and negative signals of a wave-like subcarrier signal, generating respective product outputs of positive phase and negative phase pulse train signals containing DC components and negative phase and positive phase subcarrier signals; a first mixing means for mixing a positive-phase pulse train signal containing a DC component; and generating outputs of multiplication of the positive-phase and negative-phase pulse train signals containing a DC component and positive-phase and negative-phase subcarrier signals, respectively. and a second mixing means for mixing these multiplier outputs and a positive-phase pulse train signal containing a DC component, and stereo audio signals are obtained from the outputs of the first and second mixing means, respectively. It is characterized by:

以下に図面に基づいて本発明を説明する。 The present invention will be explained below based on the drawings.

第1図は本発明の実施例の回路ブロツク図であ
り、FM信号はパルス検波器1に印加される。こ
の検波器1としては、FMステレオ信号のコンポ
ジツト信号周波数スペクトラム成分を含有するパ
ルス列信号を出力する形式の検波器であれば良
く、例えば第2図に示す如きクワドラチヤ検波回
路と等価な構成とされる。これは周知の構成であ
つて、リミツタ11と、このリミツタ出力を1入
力とする位相比較器12と、リミツタ出力を周波
数に応じて移相する移相器13とを有し、この移
相器13の出力が比較器12の他入力となつてお
り、この比較出力が所定直流分を含んだパルス列
信号となる。この検波器1の特性及び動作につい
ては後述する。
FIG. 1 is a circuit block diagram of an embodiment of the present invention, in which an FM signal is applied to a pulse detector 1. In FIG. The detector 1 may be any type of detector that outputs a pulse train signal containing a composite signal frequency spectrum component of an FM stereo signal, and may have a configuration equivalent to a quadrature detector circuit as shown in FIG. 2, for example. . This is a well-known configuration, and includes a limiter 11, a phase comparator 12 which takes the limiter output as one input, and a phase shifter 13 which shifts the phase of the limiter output according to the frequency. The output of the comparator 13 is the other input of the comparator 12, and the comparison output becomes a pulse train signal containing a predetermined DC component. The characteristics and operation of this detector 1 will be described later.

この直流分を含んだパルス列信号はそのまゝ
(正相)乗算器2及び3の1入力となり、またイ
ンバータ4を介して逆相となつて乗算器5及び6
の1入力となり、スイツチングのための信号とし
て用いられている。
This pulse train signal including the DC component becomes one input of the multipliers 2 and 3 as it is (positive phase), and also becomes the opposite phase via the inverter 4 to the multipliers 5 and 6.
It is used as a signal for switching.

一方、このパルス列信号はFMステレオ信号の
ステレオコンポジツト信号成分を含有しており、
その中のステレオパイロツト信号を抽出して正弦
波状の38KHzサブキヤリヤ信号を発生する信号発
生器7が設けられている。この正弦波サブキヤリ
ヤ信号はそのまゝ(正相)乗算器3及び5の他入
力となつており、またインバータ8により逆相と
なつて乗算器2及び6の他入力となつている。乗
算器2及び5の各乗算出力と直流分を含んだ正相
パルス列信号との加算をなすべく加算器9が設け
られており、また乗算器3及び6の各乗算出力と
直流分を含んだ正相パルス列信号との加算をなす
べく加算器10が設けられている。これら各加算
器9,10の出力のオーデイオ成分のみを抽出す
るLPF14,15が設けられて両出力からそれ
ぞれ右及び左チヤンネル信号が復調されるもので
ある。
On the other hand, this pulse train signal contains a stereo composite signal component of the FM stereo signal,
A signal generator 7 is provided which extracts the stereo pilot signal therein and generates a sinusoidal 38KHz subcarrier signal. This sine wave subcarrier signal is directly (in positive phase) used as the other input to the multipliers 3 and 5, and is reversed in phase by the inverter 8 and becomes the other input to the multipliers 2 and 6. An adder 9 is provided to add the multiplication outputs of the multipliers 2 and 5 and the positive-phase pulse train signal containing the DC component, and also adds the multiplication outputs of the multipliers 3 and 6 and the positive phase pulse train signal containing the DC component. An adder 10 is provided to perform addition with the positive phase pulse train signal. LPFs 14 and 15 are provided to extract only the audio components of the outputs of these adders 9 and 10, and right and left channel signals are demodulated from both outputs, respectively.

第2図に示したパルス検波器1について説明す
るに、移相器13は第3図に示す如き周波数対位
相及び遅延特性を有しているものとする。すなわ
ち、周波数に比例して位相が変化し、かつその周
波数域においては一定の遅延時間τ0を有している
ものとする。かゝる移相器13は例えば第4図の
如き構成とし得るもので、一種の遅延回路と同等
なものである。いま、移相器13の位相特性が
FM―IFキヤリヤの中心周波数に対して90゜位相
となるようにされていれば、第5図A〜Cに示す
如き動作波形を呈する。図A〜Cにおいて共にa
はリミツタ11を経たFM―IF信号、bは移相器
13による遅延出力、cは位相比較出力であり、
図Aは中心周波数に等しいときの各部波形を示し
比較出力はデユーテイが1/2のパルス列信号とな
り、よつてその直流成分は1/2となる。図Bは中
心周波数よりも高い周波数の場合であり、よつて
その直流成分は例えば2/3となり、中心周波数に
対し1/6だけ直流分が増大することになる。図C
は中心周波数よりも低い周波数の場合であり、よ
つてその直流成分は例えば1/3となり、中心周波
数に対し1/6だけ直流分が低下する。
To explain the pulse detector 1 shown in FIG. 2, it is assumed that the phase shifter 13 has frequency versus phase and delay characteristics as shown in FIG. That is, it is assumed that the phase changes in proportion to the frequency and has a constant delay time τ 0 in that frequency range. Such a phase shifter 13 can have a configuration as shown in FIG. 4, for example, and is equivalent to a type of delay circuit. Now, the phase characteristics of the phase shifter 13 are
If the phase is set at 90° with respect to the center frequency of the FM-IF carrier, the operating waveforms shown in FIGS. 5A to 5C will be exhibited. In figures A to C, both a
is the FM-IF signal passed through the limiter 11, b is the delayed output from the phase shifter 13, c is the phase comparison output,
Figure A shows the waveforms of various parts when the center frequency is equal to the center frequency, and the comparison output is a pulse train signal with a duty of 1/2, and thus its DC component is 1/2. FIG. B shows a case where the frequency is higher than the center frequency, so the DC component is, for example, 2/3, which means that the DC component increases by 1/6 with respect to the center frequency. Diagram C
is a case where the frequency is lower than the center frequency, so the DC component is, for example, 1/3, and the DC component is reduced by 1/6 with respect to the center frequency.

従つて、この比較器12の出力はFM信号周波
に応じたPPM(パルス位置変調)信号であり、こ
のパルスを積分すればFM検波出力が得られる
が、本例ではこのパルス列信号がステレオコンポ
ジツト信号成分を含有していることに鑑み、積分
することなくそのまゝ乗算器2,3,5及び6の
スイツチング信号として用いている。このよう
に、ステレオコンポジツト信号の周波数スペクト
ラム成分を直流分を含んで有しているパルス列信
号であれば、他の検波方式である例えばクワドラ
チヤ検波やパルスカウント検波等によるPPM信
号出力を用いることができる。
Therefore, the output of this comparator 12 is a PPM (pulse position modulation) signal corresponding to the FM signal frequency, and if this pulse is integrated, an FM detection output can be obtained, but in this example, this pulse train signal is a stereo composite signal. In view of the fact that it contains signal components, it is used as a switching signal for multipliers 2, 3, 5 and 6 without being integrated. In this way, if the pulse train signal has the frequency spectrum components of the stereo composite signal including the DC component, it is possible to use PPM signal output using other detection methods such as quadrature detection or pulse count detection. can.

従つて、このPPM信号の低域成分すなわちコ
ンポジツト信号成分をe(t)とすれば、 e(t)=Vp+α{M(t) +S(t)sinωSt+PsinωS/2t}…(1) となる。こゝに、Vpは直流成分であり、同調に
より変化するものであり、FM―IF信号の中心周
波数すなわち同調点において位相差が90゜になる
様に遅延時間が設定されていれば、第5図の波形
を用いて説明したように、Vpは1/2となる。また
αは遅延時間に比例し(位相の傾きに比例し)、
検波効率に相当する。ωSはサブキヤリヤ信号の
角周波数であり、M(t)はメイン信号でL(t)
+R(t)を示し、S(t)はサブ信号でL(t)−
R(t)を示す。Pは定数である。
Therefore, if the low-frequency component of this PPM signal, that is, the composite signal component, is e(t), then e(t) = V p + α {M(t) + S(t) sinω S t + Psinω S /2t}...(1 ) becomes. Here, V p is a DC component that changes with tuning, and if the delay time is set so that the phase difference is 90° at the center frequency of the FM-IF signal, that is, the tuning point, then the As explained using the waveform in FIG. 5, V p becomes 1/2. Also, α is proportional to the delay time (proportional to the phase slope),
Corresponds to detection efficiency. ω S is the angular frequency of the subcarrier signal, M(t) is the main signal and L(t)
+R(t) and S(t) is the sub signal L(t)−
Indicate R(t). P is a constant.

インバータ4による逆相信号()は、 ()=(1−Vp)−α{M(t) +S(t)sinωSt+PsinωS/2t}…(2) と表わされる。従つて乗算器2の乗算出力a(t)
は、 a(t)=−sinωSt・〔Vp +α{M(t)+S(t)sinωSt +PsinωS/2t}〕 …(3) となり、また乗算器5の出力b(t)は、 b(t)=sinωSt・〔(1−Vp) −α{M(t)+S(t)sinωSt +PsinωS/2t}〕 …(4) となる。よつて、加算器9の出力は、(1),(3)及び
(4)式を用いて整理すると、 a(t)+b(t)+e(t)=VpαM(t)+(1
−2Vp)sinωSt +αS(t)sinωSt−2αM(t)sinωSt−2αS
(t)sin2ωSt+αPsinωSt/2 −2αPsinωSt・sinωS/2t …(5) と表わされる。こゝで、 −2αS(t)sin2ωSt =−2αS(t)・1−cos2ωSt/2 =−αS(t)+αS(t)cos2ωSt …(6) であり、かつ同調点が中心周波数にあるものとす
ればVp=1/2であるから、(1−2Vp)sinωSt=
0となる。すなわち、定常的な38KHzのサブキヤ
リヤ成分は打消されることになつて、不要な周波
数成分の1つが上記操作によりキヤンセルされて
都合が良くなると共に、オーデイオ成分のみを通
過しめるLPF14の出には R′(t)=Vp+αM(t)−αS(t) =Vp+2αR(t) …(7) なる右チヤンネル信号のみが導出される。同様に
してLPF15の出力にも左チヤンネル信号のみ
が導出されてステレオ復調が可能となることが判
る。
The negative phase signal () from the inverter 4 is expressed as ()=(1- Vp )-α{M(t)+S(t) sinωSt + PsinωS /2t}...(2). Therefore, the multiplication output a(t) of multiplier 2
is a(t)=−sinω S t・[V p +α{M(t)+S(t) sinω S t +Psinω S /2t}]...(3), and the output b(t) of the multiplier 5 is b(t)=sinω S t [(1−V p ) −α{M(t)+S(t) sinω S t +P sinω S /2t}] (4). Therefore, the output of adder 9 is (1), (3) and
Rearranging using equation (4), a(t)+b(t)+e(t)=V p αM(t)+(1
−2V p ) sinω S t +αS (t) sinω S t−2αM (t) sinω S t−2αS
(t) sin 2 ω S t+αP sin ω S t/2 −2αP sin ω S t·sin ω S /2t (5). Here, −2αS(t) sin 2 ω S t = −2αS(t)・1−cos2ω S t/2 = −αS(t) + αS(t) cos2ω S t …(6) and tuning Assuming that the point is at the center frequency, V p = 1/2, so (1-2V p ) sinω S t =
It becomes 0. In other words, the steady 38KHz subcarrier component is canceled, one of the unnecessary frequency components is canceled by the above operation, and it is convenient, and the output of the LPF 14, which passes only the audio component, is R' (t)=V p +αM(t)−αS(t)=V p +2αR(t) (7) Only the right channel signal is derived. Similarly, it can be seen that only the left channel signal is derived from the output of the LPF 15, making stereo demodulation possible.

第6図は乗算器2,3,5及び6の具体例であ
り、トランジスタQ1と抵抗R1,R2とにより簡単
に構成して、トランジスタQ1を検波出力である
パルス列信号e(t),(t)によりスイツチン
グ動作せしめることにより乗算が可能である。
FIG. 6 shows a specific example of the multipliers 2, 3, 5, and 6, which are simply configured with a transistor Q 1 and resistors R 1 and R 2 , and the transistor Q 1 is connected to the pulse train signal e(t) which is the detected output. ), (t) allows multiplication by performing a switching operation.

第7図は38KHzの正弦波サブキヤリヤ信号発生
器7の具体例であり、PLL(フエイズロツクドル
ープ)構成となつている。19KHzのステレオパイ
ロツト信号は位相比較器16において1/2分周器
17の出力と位相比較され、その比較出力は
LPF18及びDCアンプ19を介してVCO(電圧
制御型発振器)20の制御入力となる。VCO2
0は76KHzのデユーテイ50%のパルス列信号を発
生するもので、この出力の1/2分周器21の出力
である38KHz信号をLPF22により正弦波に変換
してサブキヤリヤ信号として用いている。この
LPF出力を再びリミツタ23によりパルス化し、
このパルス列信号を更に1/2分周器17により
19KHzとして比較器16の1入力としている。こ
うすることにより、パイロツト信号に同期した
38KHzの正弦波信号が正確に得られる。
FIG. 7 shows a specific example of a 38 KHz sine wave subcarrier signal generator 7, which has a PLL (phase locked loop) configuration. The phase of the 19KHz stereo pilot signal is compared with the output of the 1/2 frequency divider 17 in the phase comparator 16, and the comparison output is
It becomes a control input for a VCO (voltage controlled oscillator) 20 via an LPF 18 and a DC amplifier 19. VCO2
0 generates a 76 KHz pulse train signal with a duty of 50%, and the 38 KHz signal that is the output of the 1/2 frequency divider 21 is converted into a sine wave by the LPF 22 and used as a subcarrier signal. this
The LPF output is again made into a pulse by the limiter 23,
This pulse train signal is further divided by 1/2 frequency divider 17.
19KHz is used as one input of the comparator 16. By doing this, you can synchronize with the pilot signal.
A 38KHz sine wave signal can be obtained accurately.

叙上の如く、本発明によれば隣接局のビート妨
害波を取り除くためのいわゆるアンチバーデイフ
イルタが不要となるから、信号劣化がない。また
スイツチングによるステレオ復調動作であるから
アナログ乗算器が不要であり、簡単な回路でS/
Nや歪に優れた復調が可能となる。更には復調の
ための加算(混合)段において不要なサブキヤリ
ヤ成分が完全に打消されるので出力段のLPFの
設計が楽となる。
As described above, according to the present invention, there is no need for a so-called anti-birdie filter for removing beat interference waves from adjacent stations, so there is no signal deterioration. In addition, since the stereo demodulation operation is based on switching, an analog multiplier is not required, and S/
Demodulation with excellent N and distortion becomes possible. Furthermore, unnecessary subcarrier components are completely canceled in the addition (mixing) stage for demodulation, making it easier to design the LPF in the output stage.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例のブロツク図、第2図
はPPM信号を発生する検波器の1例のブロツク
図、第3図は第2図の回路の特性図、第4図は第
2図の回路の移相器の具体例を示す図、第5図は
第2図の回路動作を説明する波形図、第6図は乗
算器の一具体例を示す図、第7図は38KHzサブキ
ヤリヤ信号発生器の具体例を示すブロツク図であ
る。 主要部分の符号の説明、1…パルス検波器、
2,3,5,6…乗算器、7…正弦波サブキヤリ
ヤ信号発生器、9,10…加算器。
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a block diagram of an example of a detector that generates a PPM signal, Fig. 3 is a characteristic diagram of the circuit shown in Fig. 2, and Fig. 4 is a block diagram of an example of a detector that generates a PPM signal. Figure 5 is a waveform diagram explaining the circuit operation of Figure 2, Figure 6 is a diagram showing a concrete example of a multiplier, Figure 7 is a 38KHz subcarrier. FIG. 2 is a block diagram showing a specific example of a signal generator. Explanation of symbols of main parts, 1...Pulse detector,
2, 3, 5, 6... Multiplier, 7... Sine wave subcarrier signal generator, 9, 10... Adder.

Claims (1)

【特許請求の範囲】[Claims] 1 FM信号のコンポジツト信号周波数スペクト
ラム成分を有するパルス列信号の正相及び逆相信
号を夫々所定直流分を含んで発生する手段と、ス
テレオパイロツト信号に同期した正弦波状のサブ
キヤリヤ信号の正相及び逆相信号を発生する手段
と、前記直流分を含んだ正相及び逆相のパルス列
信号と前記逆相及び正相のサブキヤリヤ信号との
それぞれの乗算出力を発生しこれら乗算出力と前
記直流分を含んだ正相のパルス列信号とを混合す
る第1の混合手段と、前記直流分を含んだ正相及
び逆相のパルス列信号と前記正相及び逆相のサブ
キヤリヤ信号とのそれぞれの乗算出力を発生しこ
れら乗算出力と前記直流分を含んだ正相のパルス
列信号とを混合する第2の混合手段とを含み、前
記第1及び第2の混合手段の出力からそれぞれス
テレオオーデイオ信号を得るようにしたことを特
徴とするFMステレオ復調装置。
1 Means for generating positive-phase and negative-phase signals of a pulse train signal having a composite signal frequency spectrum component of an FM signal, each including a predetermined DC component, and positive-phase and negative-phase signals of a sinusoidal subcarrier signal synchronized with a stereo pilot signal. means for generating a signal, generating respective multiplication outputs of the positive-phase and negative-phase pulse train signals containing the DC component and the negative-phase and positive-phase subcarrier signals, and generating the multiplication outputs of the positive-phase and negative-phase pulse train signals containing the DC component, respectively, and including the multiplication outputs and the DC component; a first mixing means for mixing a positive-phase pulse train signal; and a first mixing means for generating a product output of each of the positive-phase and negative-phase pulse train signals including the DC component and the positive-phase and negative-phase subcarrier signals; a second mixing means for mixing the multiplication output and the positive-phase pulse train signal containing the DC component, and stereo audio signals are obtained from the outputs of the first and second mixing means, respectively. Features of FM stereo demodulator.
JP9992481A 1981-06-26 1981-06-26 Fm stereophonic demodulator Granted JPS581353A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9992481A JPS581353A (en) 1981-06-26 1981-06-26 Fm stereophonic demodulator
US06/392,129 US4502148A (en) 1981-06-26 1982-06-25 FM Stereo demodulator for demodulating stereo signals directly from an FM intermediate frequency signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9992481A JPS581353A (en) 1981-06-26 1981-06-26 Fm stereophonic demodulator

Publications (2)

Publication Number Publication Date
JPS581353A JPS581353A (en) 1983-01-06
JPS6342455B2 true JPS6342455B2 (en) 1988-08-23

Family

ID=14260308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9992481A Granted JPS581353A (en) 1981-06-26 1981-06-26 Fm stereophonic demodulator

Country Status (1)

Country Link
JP (1) JPS581353A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0469256U (en) * 1990-10-22 1992-06-18

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0469256U (en) * 1990-10-22 1992-06-18

Also Published As

Publication number Publication date
JPS581353A (en) 1983-01-06

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