JPS6342453B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM stereo demodulator, and more particularly to an FM stereo demodulator that multiplies a subcarrier signal and a composite signal when demodulating a subsignal.

There is a circuit system that separates left and right channel signals by switching a composite signal using a 38KHz rectangular subcarrier signal when demodulating an FM stereo signal. FIG. 1 is a block diagram of such a demodulation system. The FM-IF (intermediate frequency) signal is converted into a composite signal by an FM detector 1, and then sent to a switching circuit 3 via an LPF (low-pass filter) 2 that removes unnecessary components. is applied to The 19KHz pilot signal contained in the output of LPF2 is transferred to PLL (phase locked loop) circuit 4.
A 38 KHz rectangular wave subcarrier signal extracted in the pilot signal and phase-synchronized with this pilot signal is used as a switching signal in the switching circuit 3 described above. Left and right channel signals, which are audio components, are separated and derived from this switching output, and LPFs 5 and 6 are provided for this purpose.

Here, since the 38KHz subcarrier signal, which is the switching signal, is a rectangular wave as shown in Figure 2A, when it is expanded into a Fourier series, F(t)=4/πsinω _S t+4/3πsin3ω _S t +4/ It is expressed as 5πsin5ω _S t+ ...(1). Here, ω _S is the angular frequency of the subcarrier signal. In this way, the frequency spectrum of F(t) includes odd harmonics such as 114 KHz, 190 KHz, . . . in addition to the fundamental wave of 38 KHz, as shown in FIG. 2B.

If the FM detection output is switched using the switching signal F(t) having such a frequency spectrum, both signals will be multiplied, but the passband of LPF 5 and 6 in the output section will be changed from 0 to 15K.
Hz, the detector output appearing in the stereo output by this multiplication becomes as shown in FIG. 2C. In other words, the main signal (0~15KHz) and the sub signal (38±15KHz)
Hz), signals at 114±15KHz, 190±15KHz, etc. (noise, nearby interference waves, etc.) are also demodulated and output.

In order to prevent this drawback, the output of the FM detector 1 is set to 114KHz, 190KHz, . . . as shown in FIG. 2D.
It becomes necessary to add an LPF with large attenuation nearby. However, since 114KHz is close to the composite signal component, this LPF causes the delay characteristics of the composite signal to become uneven, as shown in Figure 2E, and the amplitude characteristics to become uneven, resulting in the stereo demodulated output This results in deterioration of distortion and separation characteristics.

An object of the present invention is to eliminate the above-mentioned drawbacks and provide a stereo demodulation device with good characteristics.

The FM stereo demodulator according to the present invention includes a means for generating a sinusoidal subcarrier signal synchronized with a stereo pilot signal included in an FM detection output, and a means for generating a pulse train signal in which a high frequency pulse signal is pulse width modulated by the sinusoidal subcarrier signal. The present invention is characterized in that it includes modulation means for multiplying this pulse train signal by an FM detection output, and left and right channel signals are separated and derived from the multiplication output.

The present invention will be explained below using the drawings.

FIG. 3 is a block diagram illustrating the principle of the present invention, in which the detected output from the FM detector 1 is input to the multiplier 3 via the LPF 2. Detection output is also 38K
The signal is input to a subcarrier signal generator 7 which generates a sine wave subcarrier of Hz, and a 38KHz sine wave signal synchronized with the pilot signal is generated. this
A PWM (pulse width modulation) circuit 8 that receives a 38KHz subcarrier signal as input is provided, and the approximately 500K
A high-frequency clock pulse signal of Hz or higher is pulse-modulated by the sine wave subcarrier signal.
It becomes a PWM signal. This PWM signal output becomes the other input to the multiplier 3, and is multiplied by the FM detection output.
The audio components of this multiplication output are derived by the LPFs 5 and 6, respectively, and are separated and demodulated into left and right channel signals.

Figures 4A to 4F are diagrams showing the operation and characteristics of the circuit in Figure 3. First, A is a 38KHz sine wave subcarrier signal waveform, and B is a PWM pulse train signal waveform pulse-modulated by this subcarrier signal. be. Considering the frequency spectrum of this PWM wave, it has a 38KHz component, which is the frequency of the subcarrier signal that is the modulated wave, and also has a distribution according to the modulation degree near the carrier frequency of the PWM wave and its odd harmonics. However, these
For frequency components other than the 38KHz component, if the carrier of the PWM wave is selected as a high frequency of approximately 500KHz or higher, Figure C
become that way.

Therefore, out of the FM detection output, what appears in the stereo demodulation output by multiplication is the main signal (0 to 15K).
Hz) and sub signal (23~53KHz) and even PWM
This is limited to interference waves and noise near the carrier frequency of the wave and odd multiples thereof, and therefore the frequency spectrum of the demodulated output becomes as shown in D. As a result, since the characteristics of LPF2 only need to be cut off from around the carrier frequency of the high-frequency PWM wave, it is possible to obtain a flat LPF characteristic up to the high frequency range as shown in E, and its delay characteristic is also as shown in F. It becomes possible to make it flat. Therefore, the FM detection output is demodulated with flat amplitude and delay, eliminating deterioration of distortion and separation. Furthermore, if the frequency characteristics of the output of the FM detector 1 do not extend to high frequencies, the LPF 2 can be omitted.

The demodulation principle in the circuit block of FIG. 3 will be briefly explained using mathematical expressions. Now, if the left and right channel signals are L(t) and R(t), the main and sub signals are M(t)=L(t)+R(t), S, respectively.
It is expressed as (t)=L(t)-R(t). Therefore,
When the subcarrier signal is sinω _S t , the composite signal C(t) which is the FM detection output is as follows: C(t)=M(t)+S(t) sinω _S t (2). Note that the pilot signal component is omitted for simplicity. And the main component of the PWM wave is sinω _S
t, so if the output of the PWM circuit 8 is 1/2±sinω _S t considering the DC component, then the pair of outputs of the multiplier 3 is υ _L (t) = (1/2 + sinω _S t )・C(t)……(3) υ _R (t)=(1/2−sinω _S t)・C(t)……(4) Therefore, by rearranging equations (2) and (3), υ _L (t)=1/2{M(t)+S(t)} +{1/2S(t)+M(t)}sinω _S t −1/2S(t)cos2ω _S t ……(5) υ _R (t)=1/2{M(t)−S(t)} +{1/2S(t)−M(t) }sinω _S t + 1/2S (t) cos2ω _S t ...(6). Since only the audio component is derived by passing these υ _L (t) and υ _R (t) through LPFs 5 and 6, the output of each LPF 5 and 6 is υ _L ′ (t),
υ _R ′(t) is υ _L ′(t)=1/2{M(t)+S(t)} =L(t) ……(7) υ _R ′(t)=1/2{M (t)-S(t)}=R(t) (8) The left and right channel signals are separated and demodulated.

FIG. 5 shows an embodiment of the multiplier 3 used in the present invention, which has a double-balanced differential circuit configuration, and has an FM detection output between the bases of a pair of differential transistors T _r1 and T _r2 . A certain composite signal is being applied. Resistors R ₆ and R ₇ are emitter resistors of both transistors, and resistor R ₅ is a common emitter resistor, forming a matrix circuit. Resistance R ₁ ,
A base bias V ₁ is applied to both transistors by R ₂ .

Differential transistors T _r3 and T _r4 are provided, which use the collector output of the transistor T _r1 as a current source.
Also provided are differential transistors T _r5 and T _r6 whose current sources are the collector output of the transistor T _r2 . A positive-phase PWM wave is applied to the bases of transistors T _r3 and T _r6 , and a reverse-phase PWM wave is applied to the bases of transistors T _r4 and T _r5 , respectively, and the base bias V ₂ of these transistors is applied to the resistor R _3. , R ₄ to each base.
_The collectors of transistors T _r3 and T _r5 are connected to a common collector resistor R ₈ from which the left channel signal is obtained, and the collectors of transistors T _r4 and T _r6 are connected to a common collector resistor R ₉ from which the left channel signal is obtained. Right channel signal is obtained from _R9 .

Now, if the emitter voltage of transistor T _r2 is V _E , then the emitter voltage of transistor T _r1 is V _E +
It becomes C(t). Therefore, both transistors T _r1 ,
The collector currents I _C1 (t) and I _C2 (t) of T _r2 are: I _C1 (t) = R ₀・V _E + (R ₀ + R ₅ )・C (t)/R ₀ ² +2R ₀・R ₅
……(9) I _C2 (t)=R ₀・V _E −R ₅・C(t)/R ₀ ² +2R ₀・R ₅ …
…(10) becomes. Note that R ₀ =R ₆ =R ₇ . and,
If the high frequency component is omitted, the PWM wave for switching is 1/2 ± Asinω _S t as described above (A≦1/2, a constant determined by the modulation degree of the PPM wave), so the resistance R ₈ The audio components I _L (t) and I _R (t) of the currents flowing through , R ₉ are I _L (t) = 1/R ₀ ² +2R ₀・R ₅ {R ₀・V _E +R ₀ /2・M(
t)+A/2(R ₀ +2R ₅ )・S(t)}……(11) I _R (t)=1/R ₀ ² +2R ₀・R ₅ {R ₀・V _E +R ₀ /2・M (
t)-A/2(R ₀ +2R ₅ )・S(t)}...(12). Here, if R ₀ =2A・R ₅ /(1-A), I _L (t) = 1-A/4R ₅ {2V _E +M(t)+S(t)} ...(13) I _R (t) = 1-A/4R ₅ {2V _E +M(t)-S(t)} (14) Thus, left and right channel outputs are obtained.

FIG. 6 is a circuit block diagram of a specific example of the 38 KHz subcarrier signal generator 7 in FIG. This comparison output is input to a VCO (voltage controlled oscillator) 14 via an LPF 12 and a DC amplifier 13.
VCO14 is oscillating at 76KHz, and frequency divider 15
This results in a square wave with a duty of 50% at 38KHz. In the conventional PLL circuit for stereo demodulation, the output of the frequency divider 15 was used as a switching signal, but in the present invention, this is converted to 38KHz by the LPF 16.
This sine wave signal is applied to the PWM circuit 8 for use, and is again converted into a 38KHz rectangular wave by the limiter 17 and input to the frequency divider 11. By doing this, a sine wave subcarrier signal synchronized with the 19KHz pilot signal is obtained.

FIG. 7 is a block diagram showing a specific example of the PWM circuit 8 in FIG.
The output of a sawtooth wave generator 19 is applied to an input other than the adder 18 which serves as an input. A sawtooth wave is obtained by a high frequency clock pulse of 500 KHz or more, and the output thereof is superimposed on the subcarrier in an adder 18 and applied to a comparator 20. For example, a zero level comparison is performed in this comparator 20 to obtain a PWM signal.

8A to 8E are operation waveform diagrams of the circuit shown in FIG. 7, where A is a subcarrier signal, B is a high-frequency clock pulse, C is a sawtooth wave, D is the output of the adder 18, and E is a PWM signal. ing. In addition to the configuration shown in FIG. 7, a PWM wave can also be obtained by directly comparing the levels of a sine wave subcarrier and a sawtooth wave.

As described above, according to the present invention, since stereo demodulation is performed by performing multiplication using a switching signal that does not have unnecessary frequency components close to the composite signal frequency range, it is not affected by noise or interference. Furthermore, since an LPF that adversely affects composite signal components is not used, high-quality stereo demodulation with good characteristics is possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional FM stereo demodulation device, FIG. 2 is a diagram explaining the operating characteristics of the device in FIG. 1, and FIG. 3 is a block diagram showing the principle of the present invention.
4 is a diagram explaining the operating characteristics of the circuit block in FIG. 3, FIG. 5 is a diagram showing an example of the circuit of the multiplier in FIG. 3, and FIG. 6 is a block diagram of the subcarrier signal generator in FIG. 3. , FIG. 7 is a block diagram of the PWM circuit of FIG. 3, and FIG. 8 is an operating waveform diagram of the circuit of FIG. 7. Explanation of symbols of main parts, 1...FM detector, 3...
Multiplier, 7...38KHz subcarrier generator, 8...
PWM circuit.

Claims (1)

[Claims] 1. means for generating a sinusoidal subcarrier signal synchronized with a stereo pilot signal; modulation means for generating a pulse train signal by pulse width modulating a high frequency pulse signal with the sinusoidal subcarrier signal; and the pulse train signal and the FM detection. What is claimed is: 1. An FM stereo demodulator comprising: multiplication means for performing multiplication with an output, and separating and deriving left and right channel signals from the multiplication output.