JPS6340397A - Glass ceramic multilayer circuit board - Google Patents
Glass ceramic multilayer circuit boardInfo
- Publication number
- JPS6340397A JPS6340397A JP18373386A JP18373386A JPS6340397A JP S6340397 A JPS6340397 A JP S6340397A JP 18373386 A JP18373386 A JP 18373386A JP 18373386 A JP18373386 A JP 18373386A JP S6340397 A JPS6340397 A JP S6340397A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- alumina
- dielectric constant
- glass
- multilayer circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002241 glass-ceramic Substances 0.000 title claims description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 21
- 239000005388 borosilicate glass Substances 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000843 powder Substances 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 2
- 238000010304 firing Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 8
- 230000007423 decrease Effects 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 239000010949 copper Substances 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 230000010365 information processing Effects 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- KKCBUQHMOMHUOY-UHFFFAOYSA-N Na2O Inorganic materials [O-2].[Na+].[Na+] KKCBUQHMOMHUOY-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 229910052810 boron oxide Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
シリコン半導体ＩＣと熱膨張係数が近似し、また誘電率
が少ない基板材料として、硼珪酸ガラスにアルミナ粉末
を５〜１０重世％の範囲に添加したものを原料とし、こ
れを使用してグリンシートを作ると共に積層し、加圧焼
成して得るガラスセラミック多層回路基板。[Detailed Description of the Invention] [Summary] As a substrate material that has a thermal expansion coefficient similar to that of a silicon semiconductor IC and has a low dielectric constant, borosilicate glass with alumina powder added in a range of 5 to 10 times % is used. A glass-ceramic multilayer circuit board obtained by making green sheets using the raw materials, laminating them, and firing them under pressure.
本発明はシリコンＩＣの搭載に適したガラスセラミック
基板の構成に関する。The present invention relates to the structure of a glass ceramic substrate suitable for mounting a silicon IC.
大量の情報を迅速に処理する情報処理技術の進歩は著し
い。Information processing technology that rapidly processes large amounts of information has made remarkable progress.
すなわち、情報処理装置の主要部を占める半導体装置は
単位素子の小形化による大容量化が進み、従来のＩＣや
ＬＳＩよりも一段と素子数の大きなＶＬＳ Ｉが実用化
されている。That is, the capacity of semiconductor devices, which form the main part of information processing devices, has been increasing due to the miniaturization of unit elements, and VLSIs, which have a much larger number of elements than conventional ICs and LSIs, have been put into practical use.
また、パッシベーション技術の進歩により、半導体チッ
プを配線基板に直接に装着することが可能になり、グイ
ボンディングやフリツブチップボンディングが行われて
いる。In addition, advances in passivation technology have made it possible to directly attach semiconductor chips to wiring boards, which has led to the use of wire bonding and flip chip bonding.
そして、多数のかかる半導体チップを配線基板上に密に
配置して装着しているが、個々の半導体チップに設けら
れている端子数が多いことから、これを搭載する配線基
板に形成される導体線路の数は膨大となり、必然的に多
層配線構造をとることになる。A large number of such semiconductor chips are densely arranged and mounted on a wiring board, and since the number of terminals provided on each semiconductor chip is large, the conductors formed on the wiring board on which it is mounted are The number of lines becomes enormous, and a multilayer wiring structure is inevitably required.
一方、動作時における半導体チップの電力消費量も数Ｗ
に及ぶことから多数の半導体チップを搭載した多層配線
基板の発熱量も膨大となり、そのためセラミックなどの
耐熱性絶縁材料が用いられている。On the other hand, the power consumption of a semiconductor chip during operation is several watts.
As a result, the amount of heat generated by a multilayer wiring board mounted with a large number of semiconductor chips becomes enormous, and therefore heat-resistant insulating materials such as ceramics are used.
本発明はかかる多層配線基板用材料の組成に関するもの
である。The present invention relates to the composition of such a material for multilayer wiring boards.
ＩＣ，ＬＳＩなどの半導体チップを搭載する多層配線基
板の構成材料としてはガラスセラミックスやアルミナ（
α−Ａ １ ｚｏｉ）などのセラミッスクが使用されて
いる。Glass ceramics and alumina (
Ceramic disks such as α-A 1 zoi) are used.
ここで、セラミックスが用いられる理由は耐熱性が優れ
、また熱膨張係数が殆どの半導体チップが形成されてい
るシリコン（Ｓｉ）に適合していることによる。The reason why ceramics are used here is that they have excellent heat resistance and have a coefficient of thermal expansion that is compatible with silicon (Si), which is used to form most semiconductor chips.
すなわち、ポリイミドやエポキシなど合成樹脂からなる
プリント配線基板の熱膨張係数が１０−’／℃台の値で
あり、一方Ｓｉの熱膨張係数が３．５ Ｘｌ０−６７℃
と太き（異なるのに対し、セラミックスは１０−６／
°ｃ台と近似しており、そのためにチップの直接搭載が
可能である。That is, the thermal expansion coefficient of a printed wiring board made of synthetic resin such as polyimide or epoxy is on the order of 10-'/°C, while the thermal expansion coefficient of Si is 3.5 Xl0-67°C.
and thick (in contrast, ceramics are 10-6/
The temperature is close to that of the °C range, which makes it possible to directly mount chips.
次に、多層配線基板としてアルミナよりもガラスセラミ
ックスが多く用いられているが、この理由はアルミナの
融点は２０１５°Ｃと高く、焼成温度として１８００℃
程度が必要であり、配線パターンを印刷したグリンシー
トを焼成する場合に、金（Ａｕ）や銅（Ｃｕ）など導電
率４の優れた材料の融点は焼成温度より低く、そのため
かかる金属材料を使用することができない。Next, glass ceramics are used more often than alumina for multilayer wiring boards, and the reason for this is that alumina has a high melting point of 2015°C, and the firing temperature is 1800°C.
When firing a green sheet printed with a wiring pattern, the melting point of materials with excellent conductivity of 4, such as gold (Au) and copper (Cu), is lower than the firing temperature, so such metal materials are used. Can not do it.
一方、ガラスセラミックスは焼成温度を１０００℃以下
にとることができ、従って上記の金属からなる導体パタ
ーンを形成することができる。On the other hand, glass ceramics can be fired at a temperature of 1000° C. or lower, and therefore conductor patterns made of the above-mentioned metals can be formed.
これらのことから、多数の半導体チップを装着して使用
する多層配線基板は、ガラスセラミックスを用いてなる
グリンシートにＡｕやＣｕペーストなどをスクリーン印
刷して配線パターンを形成し、これを積層して一体化し
た後、焼成しで作られている。For these reasons, multilayer wiring boards that are used with a large number of semiconductor chips installed are made by screen printing Au or Cu paste on green sheets made of glass ceramics to form wiring patterns, and then laminating these. After being integrated, it is fired.
ここで、代表的なガラスセラミックスは硼珪酸ガラスに
アルミナを添加したものから構成されており、微結晶の
集合体からなるために機械的強度は著しく改良されてい
るもの＼、誘電率が硼珪酸ガラスよりも増加していると
云う問題がある。Typical glass-ceramics are made of borosilicate glass with alumina added, and because they are composed of aggregates of microcrystals, their mechanical strength is significantly improved, and the dielectric constant is borosilicate. There is a problem that the amount of glass is increasing more than that of glass.
すなわち、情報処理の高速化により信号の周波数は光に
まで及んでいるが、このように高速な電気信号を処理す
る電子回路が形成されている多層基板は電気信号の遅延
時間τができるだけ少なく、電子回路の特性インピーダ
ンスが大きく、また多層配線間の漏話が少ないことが必
要であるが、そのためには次式から明らかなように使用
材料の誘電率εが少ないことが必要である。In other words, as the speed of information processing increases, the frequency of signals has reached the level of light, but the multilayer substrate on which electronic circuits that process high-speed electrical signals are formed has a delay time τ of electrical signals as small as possible. It is necessary for the characteristic impedance of an electronic circuit to be large and for crosstalk between multilayer wiring to be small. To achieve this, it is necessary that the dielectric constant ε of the material used be small, as is clear from the following equation.
τ＃３゜３３εｌ ／Ｚ （ｎ秒／ｍ）Ｚ、＝６０／
ε１″ ・βｆｉ５．９８ ｂ／ π（０，８匈＋ｔ
）但し、ｂは基板の厚さ
−は配線パターンの幅
ｔは配線パターンの厚さ
然し、従来のガラスセラミックスは硼珪酸ガラスに５０
重量％程度のアルミナを含有して構成されているので誘
電率が５．５〜６．５と大きく、この低減化が要望され
ていた。τ#3゜33εl /Z (n seconds/m)Z, = 60/
ε1″ ・βfi5.98 b/ π(0.8 匈+t
) However, b is the thickness of the substrate - is the width of the wiring pattern t is the thickness of the wiring pattern.
Since it contains about % by weight of alumina, it has a high dielectric constant of 5.5 to 6.5, and there has been a desire to reduce this.
以上記したように高速信号を処理する電子回路を形成す
るセラミック多層基板は低誘電率のガラスセラミックス
を用いて形成することが必要であるが、この場合にアル
ミナの構成比をどのように保って多層回路基板を形成す
るかが課題である。As mentioned above, ceramic multilayer substrates that form electronic circuits that process high-speed signals need to be formed using glass ceramics with a low dielectric constant, but in this case, how can the composition ratio of alumina be maintained? The challenge is how to form a multilayer circuit board.
上記の問題は硼珪酸ガラス粉末にアルミナ粉末を硼珪酸
ガラスの特性に応じて５〜１０重量％の範囲に添加して
グリンシートを作り、このグリンシートに導体パターン
を印刷したる後、位置合わせして積層し、加圧焼成して
得るガラスセラミック多層回路基板を用いることにより
解決することができる。The above problem can be solved by adding alumina powder to borosilicate glass powder in a range of 5 to 10% by weight depending on the characteristics of borosilicate glass to make a green sheet, and after printing a conductor pattern on this green sheet, alignment is performed. This problem can be solved by using a glass ceramic multilayer circuit board obtained by laminating the layers and firing them under pressure.
高速の電気信号を処理する電子回路が形成されている多
層回路基板の必要条件は、
■ 誘電率εの低い材料からなること、■ 熱膨張係数
がＳｉと適合していること、■ 機械的強度が優れてい
ること、
■ グリンシートの焼成温度が１０００℃以下で導体ペ
ーストの焼成条件と適合していること、などである。The requirements for a multilayer circuit board on which electronic circuits that process high-speed electrical signals are formed are: ■ It must be made of a material with a low dielectric constant ε, ■ It must have a thermal expansion coefficient compatible with that of Si, and ■ It must have mechanical strength. (1) The firing temperature of the green sheet is 1000°C or less, which is compatible with the firing conditions of the conductive paste.
ここで、先に記したように従来はアルミナ含有量が約５
０％であるために誘電率が５．５〜６．５と高いものが
使われている。Here, as mentioned earlier, conventionally the alumina content was about 5
0%, a material with a high dielectric constant of 5.5 to 6.5 is used.
そこで誘電率を下げるにはアルミナの含有量を上記の条
件を満たす範囲で減らしてゆけばよい。Therefore, in order to lower the dielectric constant, the alumina content should be reduced within a range that satisfies the above conditions.
すなわち、アルミナの誘電率εは１０であり、一方硼珪
酸ガラスの誘電率は構成材料の組成比により異なるもの
＼４．１〜４．８である。That is, the dielectric constant ε of alumina is 10, while the dielectric constant of borosilicate glass is \4.1 to 4.8 depending on the composition ratio of the constituent materials.
そこで、両者の量比により複合誘電率は決まり、アルミ
ナの添加量が少なくなるに従って誘電率は低下してゆき
、最終的には硼珪酸ガラスの誘電率となる。Therefore, the composite dielectric constant is determined by the quantitative ratio of the two, and as the amount of alumina added decreases, the dielectric constant decreases, and finally reaches the dielectric constant of borosilicate glass.
また、熱膨張係数も添加量が減るに従って直線的に変化
し硼珪酸ガラスの熱膨張係数に近づく筈である。Furthermore, the coefficient of thermal expansion should change linearly as the amount added decreases, approaching the coefficient of thermal expansion of borosilicate glass.
然し、アルミナを含む硼珪酸ガラスを約１０００℃で熱
処理するとアルミナの添加量が約５％以下になると異常
に増加することが判った。However, it has been found that when borosilicate glass containing alumina is heat treated at about 1000° C., the amount of alumina added increases abnormally when it becomes less than about 5%.
第１図および第２図は表に示す組成の原料からなる硼珪
酸ガラスにアルミナを添加したガラスセラミックスの熱
膨張係数と誘電率との関係を示すものである。FIGS. 1 and 2 show the relationship between the thermal expansion coefficient and dielectric constant of glass ceramics prepared by adding alumina to borosilicate glass made of raw materials having the composition shown in the table.
表 （重量％）
この理由は硼珪酸ガラスが約１０００℃の高温焼成処理
により二酸化珪素（ＳｉＯ□）が多数を占める領域と酸
化硼素（ＢｚＯｓ）が多数を占める領域とに分離し、前
者のＳｉＯ□が更にクリストバライト （Ｃｒ ｉｓ
ｔｏｂａ １１ｔｅ）に変化するからである。Table (% by weight) The reason for this is that borosilicate glass is separated into a region dominated by silicon dioxide (SiO□) and a region dominated by boron oxide (BzOs) due to high-temperature firing treatment at about 1000°C. □ is also cristobalite (Cr is
This is because it changes to (toba 11te).
すなわち、クリストバライトの熱膨張係数は室温〜約３
００℃の範囲において５０ＸｌＯ−６／ ℃と大きく、
アルミナの添加量が少くなってガラス状Ｌｉ（Ｖｉｔｒ
ｅｏｕｓ ５ｔａｔｅ ）の保持能力が減少するに従っ
てクリストバライトの析出量が増し、第１図に示すよう
に熱膨張係数が増加するのである。That is, the thermal expansion coefficient of cristobalite is from room temperature to about 3
As large as 50XlO-6/℃ in the range of 00℃,
The amount of alumina added is small and glassy Li (Vitr
As the holding capacity of the material (eous 5tate) decreases, the amount of cristobalite precipitated increases, and as shown in FIG. 1, the coefficient of thermal expansion increases.
ここで硼珪酸ガラスはＳｉＯ□、 Ｂ２Ｏ３、ＡＮｚ
（ｈを主構成分とし、Ｎａ２Ｏ、Ｎ２０ 、ＢａＯなど
を添加して形成したもので、熱膨張係数が少な（、化学
的耐久性に優れたガラスの総称であって、表のＮｏ。Here, borosilicate glass is SiO□, B2O3, ANz
(H is the main component, and is formed by adding Na2O, N20, BaO, etc., and has a low coefficient of thermal expansion.) It is a general term for glasses with excellent chemical durability, and is numbered in the table.
１〜３に示すように各種の成分比のガラスが実用化され
ているが、第１図に示すように熱膨張係数はアルミナの
添加量が減るに従って減少し、添加量が５〜１０の範囲
で最少となり、更に添加量が減少すると急激に増加する
。Glasses with various component ratios have been put into practical use as shown in Figures 1 to 3. However, as shown in Figure 1, the coefficient of thermal expansion decreases as the amount of alumina added decreases, and when the amount added is in the range of 5 to 10. It becomes the minimum at , and increases sharply as the amount added decreases further.
これらのことから、Ｓｉ半導体ＩＣを搭載する多層回路
基板の材料としては硼珪酸ガラスの特性を勘案してアル
ミナを５〜１０％の範囲に添加して使用すればよい。For these reasons, as a material for a multilayer circuit board on which a Si semiconductor IC is mounted, alumina may be added in a range of 5 to 10% in consideration of the characteristics of borosilicate glass.
組成が重量比でＳｉｎｇが７０％、ＢｚＯｉが２６％、
Ａｆ２０３が１％、 Ｎａ２Ｏが１．５％、に２０
が１．５％ からなる硼珪酸ガラス粉末９５重量部に、
粒径が３μｍのＡ Ａ ｇｏｓ粉末を５重量部を加え、
これにバインダとしてポリビニルブチラール（略称ＰＶ
Ｂ）を１０重量部と溶剤としてアセトンを１１０重量部
を加えてボールミルを用いて良く混合した後、ドクタブ
レード法により厚さが３００ μｍのグリンシートを形
成した。The composition is 70% Sing, 26% BzOi by weight,
Af203 is 1%, Na2O is 1.5%, and 20
To 95 parts by weight of borosilicate glass powder consisting of 1.5%,
Add 5 parts by weight of A A gos powder with a particle size of 3 μm,
Polyvinyl butyral (abbreviated as PV) is added to this as a binder.
After adding 10 parts by weight of B) and 110 parts by weight of acetone as a solvent and thoroughly mixing them using a ball mill, a green sheet having a thickness of 300 μm was formed using a doctor blade method.
このグリンシーＩ・を１００ｕ角に打ち抜くと共にスル
ーホールを孔開けした後、Ｃｕからなる導体ペーストを
スクリーン印刷して配線パターンを形成し、これを位置
合わセを行って１０層積層し、１３０°Ｃの温度でプレ
スして一体化してから窒素（Ｎ２）気流中で１０００”
Ｃの温度で４時間に互って焼成し多層セラミック回路基
板を形成した。After punching out this Green Sea I into a 100μ square and drilling through holes, a conductive paste made of Cu was screen printed to form a wiring pattern, which was aligned and laminated in 10 layers. After pressing at a temperature of 1,000” in a nitrogen (N2) stream,
A multilayer ceramic circuit board was formed by firing at a temperature of C for 4 hours.
測定の結果、かかる基板の誘電率は４．２と小さく、ま
た熱膨張係数は３ ｘｌＯ−６／ °ｃとＳｉ基板に近
い値を得ることができた。As a result of measurement, the dielectric constant of this substrate was as small as 4.2, and the thermal expansion coefficient was 3 x lO-6/°C, which was close to that of the Si substrate.
以上記したように本発明の実施により熱膨張係数がＳｉ
基板に近く、また誘電率の少ない高速信号処理に適した
多層回路基板の形成が可能となる。As described above, by implementing the present invention, the coefficient of thermal expansion of Si
It is possible to form a multilayer circuit board that is close to the substrate and has a low dielectric constant and is suitable for high-speed signal processing.
第１図は熱膨張係数とアルミナ添加量との関係図、 第２図は誘電率とアルミナ添加量との関係図、である。 Figure 1 is a diagram of the relationship between the coefficient of thermal expansion and the amount of alumina added. FIG. 2 is a diagram showing the relationship between the dielectric constant and the amount of alumina added.
Claims (1)
特性に応じて、５〜１０重量％の範囲に添加してグリン
シートを作り、該グリンシートに導体パターンを印刷し
たる後、位置合わせして積層し、加圧焼成してなり、半
導体ＩＣを搭載して使用することを特徴とするガラスセ
ラミック多層回路基板。A green sheet is made by adding alumina powder to borosilicate glass powder in a range of 5 to 10% by weight depending on the characteristics of the borosilicate glass, and after printing a conductor pattern on the green sheet, it is aligned. A glass-ceramic multilayer circuit board characterized by being laminated, pressure-fired, and used with a semiconductor IC mounted thereon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18373386A JPS6340397A (en) | 1986-08-05 | 1986-08-05 | Glass ceramic multilayer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18373386A JPS6340397A (en) | 1986-08-05 | 1986-08-05 | Glass ceramic multilayer circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6340397A true JPS6340397A (en) | 1988-02-20 |
| JPH0426798B2 JPH0426798B2 (en) | 1992-05-08 |
Family
ID=16141019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18373386A Granted JPS6340397A (en) | 1986-08-05 | 1986-08-05 | Glass ceramic multilayer circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6340397A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59178752A (en) * | 1983-03-30 | 1984-10-11 | Hitachi Ltd | Multilayer interconnection substrate |
| JPS59207851A (en) * | 1983-05-06 | 1984-11-26 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Dielectric glass in multilayer circuit and thick film circuit containing same |
| JPS6030196A (en) * | 1983-07-28 | 1985-02-15 | 富士通株式会社 | Method of producing multilayer circuit board |
-
1986
- 1986-08-05 JP JP18373386A patent/JPS6340397A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59178752A (en) * | 1983-03-30 | 1984-10-11 | Hitachi Ltd | Multilayer interconnection substrate |
| JPS59207851A (en) * | 1983-05-06 | 1984-11-26 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Dielectric glass in multilayer circuit and thick film circuit containing same |
| JPS6030196A (en) * | 1983-07-28 | 1985-02-15 | 富士通株式会社 | Method of producing multilayer circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0426798B2 (en) | 1992-05-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR930000881B1 (en) | Ceramic polylayer circuit panel and semiconductor module | |
| US4598167A (en) | Multilayered ceramic circuit board | |
| JPS6232695A (en) | Ceramics circuit board | |
| EP0472165A1 (en) | Low dielectric inorganic composition for multilayer ceramic package | |
| JP3426926B2 (en) | Wiring board and its mounting structure | |
| CA2050095A1 (en) | Dielectric composition containing cordierite and glass | |
| US4858077A (en) | Condenser-containing, ceramic multi-layer circuit board and semiconductor module and computer having the circuit board | |
| US5260119A (en) | Low dielectric inorganic composition for multilayer ceramic package | |
| JPS6340397A (en) | Glass ceramic multilayer circuit board | |
| JP4549029B2 (en) | Glass ceramic composition, glass ceramic sintered body, method for producing glass ceramic sintered body, and wiring board | |
| JPS63271994A (en) | Ceramic wiring substrate | |
| JP3426920B2 (en) | Wiring board | |
| JPH0283995A (en) | Ceramic multilayer circuit board and its applications | |
| JP3643264B2 (en) | Conductive paste and wiring board using the same | |
| JPS6327094A (en) | Manufacture of ceramic substrate for optical transmission | |
| JP3339999B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3193275B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JPS62124799A (en) | Glass ceramic multilayer substrate | |
| JP2001015930A (en) | Multilayer printed wiring board and manufacture thereof | |
| JPS6331198A (en) | Manufacture of heat-conductive ceramic multilayer board | |
| JPH02209799A (en) | Manufacture of multilayered circuit board | |
| JPH06279097A (en) | Production of sintered glass ceramic and sintered glass ceramic | |
| JPS62217697A (en) | Multilayer glass circuit board | |
| JPH0544190B2 (en) | ||
| JPH0250638B2 (en) |