JPH02209799A - Manufacture of multilayered circuit board - Google Patents

Abstract

PURPOSE:To decrease signal leakage and enable high-speed transmission by fitting up via holes in a board with copper paste, printing copper paste on the board for laminating a plurality of boards, aligning vias in the upper board with electron circuit patterns on the lower board, and pressurizing and baking said boards for integration. CONSTITUTION:Via holes made in a photosensitive glass board 1 are filled up with Cu paste to make vias 2 and the conductor lines 3 of electron circuits are formed thereon. After the many vias 2 are made in the photosensitive glass board 1, a spacer patterns 4 are printed on the periphery thereof by screen printing. Boards are accurately matched to connect the vias in the upper board to the conductor lines on the lower substrate and the boards 1, 1', and 1'' are laminated through air layers with the spacer patterns 4 are conductor lines 3 acting as spacers. An integrated circuit having the air layers between the substrates is formed by laminating said substrates while registering, mounting a weight on the top, and baking the laminated substrates in an N2 gas current.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a multilayer circuit board using a photosensitive glass substrate, the present invention aims to reduce signal leakage and realize high-speed transmission. filling the vias formed in the substrate with copper paste; printing the copper paste on the substrate to form fine electronic circuit patterns and spacer patterns; a step of laminating the substrates, aligning the vias of the upper substrate and the electronic circuit pattern of the lower substrate, and connecting the circuits to each other; a step of baking the plurality of substrates under pressure and integrating them; A method for manufacturing a multilayer circuit board includes:

[Industrial application field]

The present invention relates to a method for manufacturing a multilayer circuit board using a photosensitive glass substrate.

Due to the need to quickly process large amounts of information, information processing technology has advanced significantly, and the semiconductor devices that make up the main part of information processing equipment have become larger in capacity due to the miniaturization of unit elements, and the substrates on which they are mounted have become larger. is becoming increasingly multilayered.

In other words, VLSI, which has a much larger capacity than conventional ICs and LSIs, has been put into practical use, and advances in pansivation technology for semiconductor chips have made it possible to directly mount semiconductor chips on ceramic circuit boards. Ta.

A large number of semiconductor chips are densely mounted on a ceramic circuit board for use, but since the number of terminals on each semiconductor chip is large, the number of wiring patterns to be formed on the circuit board becomes enormous, and it is necessary to use multiple layers. A wiring structure is required.

Furthermore, due to multiplexing of information transmission, the repetition frequency for carrying signals is increasing, which naturally limits the materials for forming substrates and wiring patterns.

In other words, the thickness of the unit board constituting the multilayer wiring board is 2
It is only 0 to 30 μm, and therefore, it is necessary to increase the transmission frequency and suppress cross-talk between layers.

Furthermore, as the transmission frequency increases, it becomes a necessary condition to suppress the signal delay time as much as possible.

[Prior Art] In order to suppress crosstalk between the eyebrows, it is necessary to lower the dielectric constant ε of the substrate constituting the multilayer wiring board.

In other words, the capacitance C between the wiring patterns formed by sandwiching the substrate is: C=εA/4πd... (1) Here,
A is the area of the opposing patterns, and d is the thickness of the substrate.The thickness of d cannot be increased to reduce the size and voltage drop in through holes, so it is necessary to reduce the line capacitance. It is necessary to use a substrate with a small dielectric constant ε.

Also, the signal delay time τ is τ': 3.33 ε"" (n see/m)...
- It is given by (2), and from this equation, it is necessary to use a substrate with a small dielectric constant ε for high-speed signal transmission.

Naturally, in order to perform high-speed transmission, it is necessary to form the wiring pattern from a low-resistance metal material to minimize the amount of voltage drop.

For these reasons, conventionally, substrates were made using glass ceramics made of borosilicate glass, which has a small dielectric constant and a low firing temperature, and wiring patterns were made using gold (Au) or copper (Cu).
Multilayer wiring boards were made using materials with high conductivity, such as

Glass-ceramics made of borosilicate glass have a dielectric constant ε of approximately 5, the lowest among ceramics, and are excellent materials, but are insufficient for high-speed signal transmission, and have a higher dielectric constant. There was a need to put a substrate with a small ε into practical use.

In addition, mounting a large number of semiconductor integrated circuits on a circuit board made of glass ceramics or the like inevitably requires a multilayer structure, and the electronic circuits in each layer are connected with a large number of vias. The problem is how to make via holes for this purpose.

For example, holes are made in ceramic substrates by laser irradiation, but many holes are opened one after another.
It takes a lot of time and is not suitable for mass production.

Further, when drilling holes in a substrate by laser processing, polishing of the substrate is required because so-called "paris" are generated on the back side.

For this reason, it is necessary to put into practical use a hole-drilling method suitable for mass production.

[Problem to be solved by the invention]

As described above, high-speed transmission has conventionally been performed using a multilayer circuit board made of a borosilicate glass ceramic substrate and using a highly conductive metal material such as Au or Cu as a wiring pattern forming material.

However, as the signal transmission frequency increases, circuit boards with lower dielectric constants are required, and in order to mount semiconductor integrated circuits directly on the board, it is necessary to use a multilayer structure. The problem is how to easily form a via hole.

[Means to solve the problem]

The above challenges involve the process of drilling holes at the via formation positions on the photosensitive glass substrate, the process of filling the vias formed on this substrate with copper paste, and the process of printing the copper paste on this substrate to create a fine electronic circuit pattern. The process of stacking multiple boards, aligning the vias on the upper board and the electronic circuit pattern on the lower board, and connecting the circuits to each other. This problem can be solved by using a multilayer circuit board formed using a process of baking and integrating under pressure.

[Function] The present invention forms via holes on a photosensitive glass substrate using photo-etching technology, thereby making it possible to open a large number of via holes at once, and to eliminate the pattern that inevitably occurs when forming a pattern using a screen printing method. The periphery of the wiring pattern is covered with air by stacking the layers using the convex portions as they are.

In this way, the permittivity of the dielectric material between the wiring patterns is the same as the permittivity of glass plus the permittivity of air, so it can be reduced compared to the conventional method, thereby improving transmission characteristics. can.

Next, photosensitive glass substrates are commercially available from some companies, and are characterized by excellent selective etching properties. [For example, product name: Fotoc
eram) + Corning Inc.] The reason for this can be explained as follows.

Photosensitive glass is silicon dioxide (SiO□), lithium oxide (LizO), potassium oxide (KZO), alumina (ALO).
3) as the main component, and a trace amount of cerium oxide (Ce).
02) and oxidized jffl (AgzO).

In the case of photoceram, the content of CeO is 0.02% by weight, and the content of Ag and O is 0.006% by weight.

Ag" and Ce" are uniformly dispersed in glass, but when a part of the glass is irradiated with ultraviolet light, 8g"
+ Ce" -+ Ag' 10 Ce"
-The reaction (1) occurs and Ag ions are reduced, but when this glass is heated to a temperature between the transition temperature and the softening temperature, nAg' - (Ag)n -.
・As shown in (2), the reduced Ag particles aggregate to form crystalline particles (colloids), which act as crystal nuclei and L
Crystals of zO.SiO□ precipitate and become cloudy.

In addition to Ag, gold (A
u) and dong (Cu) are also used.

Then, hydrofluoric acid (HF) of crystallized Li2O・SiO□
The solubility in glass is several ten times higher than that of the base glass, so selective etching is possible.

〔Example〕

A photoceram with a thickness of 0.5 mm was used as the photosensitive glass substrate, and the via formation position of the LSI to be mounted was exposed by projection exposure to ultraviolet rays.

Here, the size of the LSI chip was 1 cm square, and vias with a diameter of 200 μm were formed in it, 20 i each in length and width.

After performing crystallization treatment on this substrate at 600°C for 1 hour to make the exposed area LizO-3iOz, 5%
A large number of vias were formed by treating the liver of the patient.

Next, place the Cu paste at the LSI chip mounting position, fill the vias with the Cu paste by sliding it with a rubber roller from above, and then wipe off the Cu paste adhering to the surface. An electronic circuit pattern and a spacer pattern were screen printed on top.

FIG. 2 is a sectional view showing a state in which a via hole made in a photosensitive glass substrate 1 is filled with Cu paste to form a via 2, and a conductor line 3 of an electronic circuit is formed thereon.

Moreover, FIG. 1(A) shows a state in which after forming a large number of pi and a 2 in this manner on the photosensitive glass substrate 1, a spacer pattern 4 is screen printed on the periphery.

Note that conductor lines constituting the electronic circuit are also printed on this board, but their description is omitted here.

Next, Figure (B) shows the state in which the boards are aligned and stacked, the vias of the upper board are connected to the conductor lines of the lower board, and each board l.

1" and 1" are spacer pattern 4 and conductor line 3, respectively.
are laminated with an air layer in between as a spacer.

In the case of this example, 20 substrates were stacked while being aligned, a 50g weight was placed on top, and N2
By baking in an air stream at 1000'C for 5 hours, an integrated circuit with an air layer interposed between each substrate was completed.

When the propagation delay time of the integrated circuit thus formed was measured, it showed a value of 5.3 ns/m, compared to the conventional 8
Compared to ns/m, it was possible to reduce it significantly.

In addition, by back-calculating from this value, the value of the apparent permittivity is 2.5
Met.

〔Effect of the invention〕

The use of photosensitive glass substrates facilitates the formation of vias, and the implementation of the present invention in which the substrates are laminated with an air layer interposed therebetween improves work efficiency and enables high-speed signal transmission.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a multilayer circuit board according to the present invention, and FIG. 2 is a sectional view of a photosensitive glass substrate to which the present invention is applied. In the figure, 1.1', 1'' is a photosensitive glass substrate, 2 is a via, 3 is a conductor line, and 4 is a spacer pattern.

Claims (1)

[Claims] A process of drilling a hole at a via formation position on a photosensitive glass substrate, a process of filling copper paste into the via formed on the substrate, and a process of printing a copper paste on the substrate to form a fine electronic circuit pattern and a spacer pattern. 1) stacking multiple substrates, aligning the vias on the upper substrate and the electronic circuit pattern on the lower substrate, and connecting the circuits to each other; and 2) firing the multiple substrates while pressurizing them. A method for manufacturing a multilayer circuit board, comprising the steps of: and integrating.