JPS6340394A - Hybrid integrated circuit board - Google Patents
Hybrid integrated circuit boardInfo
- Publication number
- JPS6340394A JPS6340394A JP18378386A JP18378386A JPS6340394A JP S6340394 A JPS6340394 A JP S6340394A JP 18378386 A JP18378386 A JP 18378386A JP 18378386 A JP18378386 A JP 18378386A JP S6340394 A JPS6340394 A JP S6340394A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit board
- hybrid integrated
- resistor
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 16
- 239000012212 insulator Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 5
- 238000007639 printing Methods 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、厚膜印刷方法により形成される混成集積回路
基板に関し、特に膜厚の均一な厚膜印刷基板に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a hybrid integrated circuit board formed by a thick film printing method, and particularly to a thick film printed board having a uniform film thickness.
（従来技術）
従来のこの種の混成集積回路基板の平面図を第３図に、
又第３図のＢ−Ｂ’断面図を第４図に示す。(Prior Art) A plan view of a conventional hybrid integrated circuit board of this type is shown in Fig. 3.
Further, a sectional view taken along line BB' in FIG. 3 is shown in FIG. 4.
第３図において、１は絶縁基板、２ａ、２ｂ、２ｃはそ
れぞれ抵抗体、３ａ、３ｂ、３ｃおよび４ ａ ＋４ｂ
、４Ｃはそれぞれ抵抗体２ａ、２ｂ、２ｃの電極用導
体である。これらの抵抗体２ａ、２ｂ、２ｅを絶縁基板
１上に形成するには、通常厚膜抵抗ペーストを印刷スク
リーンを用いて印刷スキージてより押し出して形成して
いた。In Fig. 3, 1 is an insulating substrate, 2a, 2b, 2c are resistors, 3a, 3b, 3c, and 4a + 4b.
, 4C are conductors for electrodes of the resistors 2a, 2b, and 2c, respectively. In order to form these resistors 2a, 2b, and 2e on the insulating substrate 1, a thick film resistor paste is usually extruded using a printing squeegee using a printing screen.
（発明が解決しようとする問題点）
上述の従来方法では、スクリーン印刷の際、絶縁基板１
の端部Ｅ１＊Ｅ鵞と中央部Ｍとでは基板１に印加される
印圧が異なり、端部Ｅｔ、Ｅｚは中央部Ｍより印圧が高
く、スクリーンと絶縁基板との距離がせまくなるため、
抵抗体の膜厚が端部で薄く、中央部で厚くなるという欠
点があつ念。(Problems to be Solved by the Invention) In the above-mentioned conventional method, during screen printing, the insulating substrate 1
The pressure applied to the substrate 1 is different between the ends E1*E and the center M, and the pressure applied to the ends Et and Ez is higher than the center M, and the distance between the screen and the insulating substrate becomes smaller. ,
One drawback is that the resistor film is thinner at the edges and thicker at the center.
（問題点を解決するための手段）
本発明の混成集積回路用基板は、絶縁基板上で形成され
た導体、抵抗体、絶縁体等の回路パターンと該絶縁基板
上の対向する２辺の端部に沿って設けられた絶縁体とを
有して構成されている。(Means for Solving the Problems) The hybrid integrated circuit board of the present invention comprises a circuit pattern of a conductor, a resistor, an insulator, etc. formed on an insulating substrate, and two opposite ends of the insulating substrate. and an insulator provided along the section.
（実施例） 次に、本発明について図面を参照して説明する。(Example) Next, the present invention will be explained with reference to the drawings.
第１図は本発明の１実施例の平面図であり、第２図は第
１図のＡ−Ａ’断面図である。、′Ａ１図および第２図
において、ＩＶｉ絶縁基板、２ａ 、 ２ｂ 、２ｃは
抵抗体、３ａ、３ｂ、３ｃおよび４ａ、４ｂ、４ｃは、
それぞれ抵抗体２ ａ ｒ ２ ｂ ｙ ２ ｅの電極
用導体、５ａ 、５ｂは、絶縁基板１の対向する２辺の
端部に沿って設けられた絶縁体である。絶縁基板１ｉ’
（おいて、絶縁体５ａ 、５ｂは基板１の対向する両端
部Ｅｌ 、 Ｅ鵞に設けられており、端部に形成される
抵抗体より基板の縁側（端部Ｅ１では抵抗体２Ｃの左辺
側、端部Ｅ２では抵抗体２ａの右辺側）ＶＣ設けられる
ことにより、抵抗体２ ａ ｖ ２ ｂ＋ ２Ｃ等をス
クリーン印刷する際、基板の端部Ｅ＋ 、Ｅ２と中央部
Ｍとではスクリーンと絶縁基板との距離が略等しくなり
（端部は絶縁体５ａ 、５ｂ’ＩＣよりスクリーンと基
板との距離が絶縁体５ａ 、５ｂがないときに比較して
長くなる）、基板端部の抵抗体２ａ 、２（！と中央部
の抵抗体２ｂとの膜厚が略等しくなる。FIG. 1 is a plan view of one embodiment of the present invention, and FIG. 2 is a sectional view taken along line AA' in FIG. , 'A1 and FIG. 2, the IVi insulating substrate, 2a, 2b, 2c are resistors, 3a, 3b, 3c and 4a, 4b, 4c are,
The electrode conductors 5a and 5b of the resistors 2 a r 2 b y 2 e are insulators provided along the ends of two opposing sides of the insulating substrate 1, respectively. Insulating substrate 1i'
(The insulators 5a and 5b are provided at opposite ends El and E of the substrate 1, and are located closer to the edge of the board than the resistor formed at the end (at the end E1, the left side of the resistor 2C) , the right side of the resistor 2a) is provided at the end E2, so that when screen printing the resistor 2 av 2 b+ 2C, etc., the screen and the insulating substrate are connected at the end E+, E2 and the center M of the board. (the distance between the screen and the substrate is longer than when the insulators 5a and 5b are not present at the ends), and the resistor 2a at the end of the board, The film thicknesses of 2(! and the resistor 2b at the center are approximately equal).
（発明の効果）
以上説明したように本発明は、絶縁基板上の対向する２
辺の端部に沿って絶縁体を設けることにより、抵抗体等
の膜厚が均一となり、抵抗値等の変動が極めて少ない混
成集積回路基板を提供できるという効果がある。(Effects of the Invention) As explained above, the present invention provides two
By providing an insulator along the edge of the side, the film thickness of the resistor, etc. becomes uniform, and there is an effect that it is possible to provide a hybrid integrated circuit board with extremely little variation in resistance value, etc.
第１図は本発明の１実施例に係る混成集積回路基板の平
面図、第２図Ｖｉ第１図のＡ−Ａ’断面図、第３図は従
来の混成集積回路基板の平面図、第４図は第３図のＢ−
Ｂ’断面図である。
１・・・絶縁基板、 ２ａ、２ｂ、２ｃ・・・抵抗
体、３ａ、３ｂ、３ｃ、４ａ、４ｂ、４ｃ −ｉａｉ用
導体、５ａ、５ｂ・・・絶縁体。1 is a plan view of a hybrid integrated circuit board according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line AA' in FIG. Figure 4 is B- in Figure 3.
It is a B' sectional view. 1... Insulating substrate, 2a, 2b, 2c... Resistor, 3a, 3b, 3c, 4a, 4b, 4c -iai conductor, 5a, 5b... Insulator.
Claims (1)
を形成した混成集積回路基板において、前記基板の対向
する２辺の端部に沿つて絶縁体を設けたことを特徴とす
る混成集積回路基板。A hybrid integrated circuit board in which a circuit pattern of a conductor, a resistor, an insulator, etc. is formed on an insulating substrate, characterized in that an insulator is provided along the ends of two opposing sides of the board. substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18378386A JPS6340394A (en) | 1986-08-05 | 1986-08-05 | Hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18378386A JPS6340394A (en) | 1986-08-05 | 1986-08-05 | Hybrid integrated circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6340394A true JPS6340394A (en) | 1988-02-20 |
Family
ID=16141860
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18378386A Pending JPS6340394A (en) | 1986-08-05 | 1986-08-05 | Hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6340394A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01316991A (en) * | 1988-06-17 | 1989-12-21 | Nippon Chemicon Corp | Manufacture of thick film integrated circuit |
-
1986
- 1986-08-05 JP JP18378386A patent/JPS6340394A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01316991A (en) * | 1988-06-17 | 1989-12-21 | Nippon Chemicon Corp | Manufacture of thick film integrated circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4087779A (en) | Printed circuit and method of making | |
| JPS595935Y2 (en) | thick film printed circuit | |
| JPS6340394A (en) | Hybrid integrated circuit board | |
| JPS59112992U (en) | Printed board | |
| JPH0224395B2 (en) | ||
| JPS6342536Y2 (en) | ||
| JP3649668B2 (en) | Trimming method for chip network resistor | |
| JPS61284012A (en) | Contact surface of switchgear | |
| GB1583684A (en) | Electrical layer resistor and a method for its manufacture | |
| JPH0287588A (en) | Formation of resistor on thick-film wiring board | |
| JPS6037702A (en) | Film resistor | |
| JPH0767001B2 (en) | Substrate for electronic parts | |
| JPS6365601A (en) | Manufacture of network resistor | |
| JPS58158902A (en) | Printed resistance unit | |
| JPS60143687A (en) | Method of forming solder | |
| JPS59166403U (en) | thick film resistor | |
| JPS61285701A (en) | Formation of thick film resistor | |
| JPH04121708U (en) | Chip R Network | |
| JPS63168074A (en) | Method of forming resistor on electronic circuit substrate | |
| JPH0714668U (en) | Circuit board device | |
| JPH0210792A (en) | Printed board | |
| JPS62222692A (en) | Formation of thick film printed circuit | |
| JPS58159301A (en) | Printed resistance unit | |
| JPS6347905A (en) | Method of forming printed resistance unit | |
| JPS62176191A (en) | Pads for soldering parts to thick film hybrid integrated circuit |