JPS6340368B2 - - Google Patents

Info

Publication number
JPS6340368B2
JPS6340368B2 JP55116069A JP11606980A JPS6340368B2 JP S6340368 B2 JPS6340368 B2 JP S6340368B2 JP 55116069 A JP55116069 A JP 55116069A JP 11606980 A JP11606980 A JP 11606980A JP S6340368 B2 JPS6340368 B2 JP S6340368B2
Authority
JP
Japan
Prior art keywords
signal
video
phase
loop
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55116069A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5741024A (en
Inventor
Shigehiro Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP55116069A priority Critical patent/JPS5741024A/ja
Publication of JPS5741024A publication Critical patent/JPS5741024A/ja
Publication of JPS6340368B2 publication Critical patent/JPS6340368B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth

Landscapes

  • Television Receiver Circuits (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP55116069A 1980-08-23 1980-08-23 Automatic phase controlling circuit Granted JPS5741024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55116069A JPS5741024A (en) 1980-08-23 1980-08-23 Automatic phase controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55116069A JPS5741024A (en) 1980-08-23 1980-08-23 Automatic phase controlling circuit

Publications (2)

Publication Number Publication Date
JPS5741024A JPS5741024A (en) 1982-03-06
JPS6340368B2 true JPS6340368B2 (enrdf_load_stackoverflow) 1988-08-10

Family

ID=14677933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55116069A Granted JPS5741024A (en) 1980-08-23 1980-08-23 Automatic phase controlling circuit

Country Status (1)

Country Link
JP (1) JPS5741024A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5252488U (enrdf_load_stackoverflow) * 1975-10-14 1977-04-14
JPS53127215A (en) * 1977-04-13 1978-11-07 Torio Kk Synthesizer tuner

Also Published As

Publication number Publication date
JPS5741024A (en) 1982-03-06

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