JPS6338874B2 - - Google Patents
Info
- Publication number
- JPS6338874B2 JPS6338874B2 JP57061765A JP6176582A JPS6338874B2 JP S6338874 B2 JPS6338874 B2 JP S6338874B2 JP 57061765 A JP57061765 A JP 57061765A JP 6176582 A JP6176582 A JP 6176582A JP S6338874 B2 JPS6338874 B2 JP S6338874B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- semiconductor device
- insulating material
- stainless steel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 53
- 239000011810 insulating material Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- 230000003746 surface roughness Effects 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 9
- 239000013078 crystal Substances 0.000 claims description 3
- 239000002952 polymeric resin Substances 0.000 claims description 3
- 229920003002 synthetic resin Polymers 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims 7
- 239000010408 film Substances 0.000 description 34
- 239000011347 resin Substances 0.000 description 33
- 229920005989 resin Polymers 0.000 description 33
- 229910001220 stainless steel Inorganic materials 0.000 description 22
- 239000010935 stainless steel Substances 0.000 description 22
- 239000010409 thin film Substances 0.000 description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 description 12
- 238000000034 method Methods 0.000 description 7
- 238000000576 coating method Methods 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 238000005096 rolling process Methods 0.000 description 2
- 231100000241 scar Toxicity 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 208000032544 Cicatrix Diseases 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004962 Polyamide-imide Substances 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- 150000007529 inorganic bases Chemical class 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000007530 organic bases Chemical class 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002312 polyamide-imide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 230000037387 scars Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000005028 tinplate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
- H01L31/03921—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Description
【発明の詳細な説明】
本発明は非単結晶薄膜太陽電池に関するもので
ある。更に詳しくは、耐熱性のある無機質基板ま
たは有機質基板の母体基板上に、可撓性で耐熱性
に富む絶縁材料をたとえば塗布法により形成し、
これを新たな基板として作製した非単結晶薄膜太
陽電池に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a non-single crystal thin film solar cell. More specifically, a flexible and heat-resistant insulating material is formed on a heat-resistant inorganic or organic base substrate by, for example, a coating method;
The present invention relates to a non-single crystal thin film solar cell fabricated using this as a new substrate.
従来、薄膜太陽電池は、スパツター蒸着法やプ
ラズマグロー放電法によりアモルフアスシリコン
薄膜を、ステンレス鋼、ガラス板等を使用した基
板上に生成させていた。太陽電池用の基板とし
て、特にステンレス鋼等の導電性の材料を用いる
場合は、その材料が圧延、加工、成形等の工程を
経て得られるため基板材料の表面に圧延、加工、
成形した傷跡が残つている。そのため、傷の深さ
が形成する薄膜の厚さよりも大きい場合は、太陽
電池の短絡原因の一因となつていた。したがつ
て、ステンレス鋼の基板表面を鏡面に又は平坦に
するような鏡面仕上げ技術が必要であつた。そし
て、同じくステンレス鋼等の導電性の材料を基板
にした場合は、基板自体を下部電極として使用で
きるが同一基板面上での複数個の光発電区域の直
列接続が不可能であつた。 Conventionally, thin-film solar cells have been produced by forming an amorphous silicon thin film on a substrate made of stainless steel, glass plate, or the like using a sputter deposition method or a plasma glow discharge method. When using a conductive material such as stainless steel as a substrate for a solar cell, the material is obtained through processes such as rolling, processing, and forming, so the surface of the substrate material is coated with rolling, processing, and
There are still scars from the molding. Therefore, if the depth of the scratch is greater than the thickness of the formed thin film, it may be a cause of short circuit in the solar cell. Therefore, there has been a need for a mirror finishing technique that makes the surface of the stainless steel substrate mirror-like or flat. Similarly, when a conductive material such as stainless steel is used as the substrate, the substrate itself can be used as the lower electrode, but it is impossible to connect a plurality of photovoltaic areas in series on the same substrate surface.
本発明は、鏡面仕上げ工程を必要とせず基板表
面の傷跡や凹凸のある状態でも、可撓性で耐熱性
に富む電気的絶縁性のある絶縁材料層を基板上に
形成し、この絶縁材料層により平坦な面を得るこ
とに特徴がある。この絶縁材料としては耐熱性の
高分子樹脂が最も好ましい。具体的にはたとえば
ポリイミド、ポリアミド、ポリアミド・イミド等
の樹脂がある。また、この平坦化のための樹脂は
電気的絶縁性を有するので、金属基板を用いてい
るにもかかわらず同一基板面上での複数個の光発
電区域の並列接続のみならず直列接続が容易であ
る。 The present invention forms an insulating material layer that is flexible, heat resistant, and electrically insulating on a substrate even when there are scratches or unevenness on the surface of the substrate without requiring a mirror finishing process. It is characterized by obtaining a flat surface. The most preferred insulating material is a heat-resistant polymer resin. Specific examples include resins such as polyimide, polyamide, and polyamide/imide. In addition, since this flattening resin has electrical insulating properties, it is easy to connect multiple photovoltaic areas not only in parallel but also in series on the same substrate surface, even though a metal substrate is used. It is.
以下、実施例を用いて本発明を説明する。 The present invention will be explained below using examples.
第１図は、ポリイミド系の樹脂であるポリイミ
ドイソインドロキナゾリンジオン
（Polyimideisoindroquinazolinedione.PI樹脂と
略す）を圧延、加工、成形されたステンレス板表
面に塗布したときの表面状態を示したものであ
る。曲線は表面のあらさ測定器のトレースの結果
である。表面荒さ最大4μｍを有するステンレス
板の表面１に、最大表面荒さと同じ4μｍの膜厚
のPI樹脂膜を塗布法により形成したときのステ
ンレス板上のPI樹脂膜の表面状態が２である。
３は同じく１のステンレス板上にPI樹脂膜を10μ
ｍ形成したときの表面状態である。ステンレス板
の表面荒さ１と同程度のPI樹脂膜２を塗布した
ものでは、基板表面にまだ突起がみられたが、３
では表面状態も平らになつている。ステンレス板
の上にPI樹脂膜が塗布形成された３の表面状態
を有する基板上に、グロー放電法によりアモルフ
アスシリコン薄膜太陽電池を作成した結果、短絡
は生じなかつた。 FIG. 1 shows the surface condition when a polyimide-based resin, polyimideisoindroquinazolinedione (abbreviated as PI resin), is applied to the surface of a rolled, processed, and formed stainless steel plate. The curve is the result of a surface roughness meter trace. When a PI resin film with a thickness of 4 μm, which is the same as the maximum surface roughness, is formed by coating on surface 1 of a stainless steel plate having a maximum surface roughness of 4 μm, the surface state of the PI resin film on the stainless steel plate is 2.
3 is the same as 1 with 10μ of PI resin film on the stainless steel plate.
This is the surface condition when the film was formed. For the one coated with PI resin film 2, which has the same roughness as the surface roughness 1 of the stainless steel plate, protrusions were still seen on the substrate surface, but 3
The surface condition is also flat. An amorphous silicon thin film solar cell was fabricated by the glow discharge method on a substrate having surface condition 3, in which a PI resin film was coated on a stainless steel plate, and no short circuit occurred.
この短絡を防止するPI樹脂膜の膜厚さは、下
地となるステンレス板の最大表面荒さの２倍以上
であれば充分である。PI樹脂膜を塗布しておら
ず且表面荒さ0.05μｍ以下の傷を有するステンレ
ス板をそのまま基板として太陽電池に使用した場
合は、その傷跡が短絡を生じさせる原因になると
はかぎらないがこうした平坦度を得るために研磨
が必要である。更に傷跡が0.05μｍ以上の場合は
傷の深さの２倍以上の膜厚さを有するPI樹脂膜
を塗布形成したものを基板として用いた方が確実
に短絡防止ができる。また、ステンレス板の表面
荒さが最大100μｍ以上のものを使用する場合は、
PI樹脂膜は膜厚250μｍ以上が好ましい。250μｍ
以上のPI樹脂膜を１回の塗布法により形成する
ことは、PI樹脂膜にひび割れが生じ平坦な膜を
形成するのが困難である。したがつて、PI樹脂
膜の形成膜厚が厚くなると重ね塗りの工夫が必要
である。この重ね塗りの場合は、PI樹脂膜の膜
厚さが300μｍ位いまでは膜にひび割れが生じる
ことなく平坦な表面を形成できる。 It is sufficient that the thickness of the PI resin film to prevent this short circuit is at least twice the maximum surface roughness of the underlying stainless steel plate. If a stainless steel plate that has not been coated with a PI resin film and has scratches with a surface roughness of 0.05 μm or less is used as a substrate in a solar cell, the scratches may not necessarily cause a short circuit, but such flatness may Polishing is required to obtain this. Furthermore, if the scar is 0.05 μm or more, short circuits can be more reliably prevented by using a substrate coated with a PI resin film having a thickness twice or more the depth of the scratch. In addition, when using a stainless steel plate with a maximum surface roughness of 100 μm or more,
The thickness of the PI resin film is preferably 250 μm or more. 250μm
Forming the above PI resin film by one coating method causes cracks in the PI resin film, making it difficult to form a flat film. Therefore, as the thickness of the PI resin film increases, it is necessary to devise ways to apply multiple coats. In this case of multiple coatings, a flat surface can be formed without cracking the PI resin film up to a thickness of about 300 μm.
第２図は、PI樹脂の絶縁材料薄膜を塗布形成
したものを基板として作成したアモルフアスシリ
コン薄膜太陽電池の構造を示す。すなわち、鏡面
でない最大表面荒さ10μｍの表面状態を有するス
テンレス板４の上に、塗布法により膜厚さ25μｍ
のPI樹脂膜５を形成する。そして、PI樹脂膜５
の上に下部電極６となるアルミニウム又はクロム
を蒸着し、さらに下部電極６の上にグロー放電法
により1000Åの膜厚を有するｎ型のアモルフアス
シリコン層７、6000Åのｉ型のアモルフアスシリ
コン層８および100Åのｐ型のアモルフアスシリ
コン層９をそれぞれ形成し、最後に透明電極１０
としてEB（Electrom Beam）蒸着法によりITO
（In2O3−SnO2）膜1000Åを形成して太陽電池と
する。 Figure 2 shows the structure of an amorphous silicon thin film solar cell fabricated using a substrate coated with a PI resin insulating material thin film. That is, a film with a thickness of 25 μm is applied by a coating method onto a stainless steel plate 4 having a non-mirror surface with a maximum surface roughness of 10 μm.
PI resin film 5 is formed. And PI resin film 5
Aluminum or chromium, which will become the lower electrode 6, is vapor-deposited on top of the lower electrode 6, and an n-type amorphous silicon layer 7 with a thickness of 1000 Å and an i-type amorphous silicon layer with a thickness of 6000 Å are further formed on the lower electrode 6 by a glow discharge method. 8 and 100 Å p-type amorphous silicon layers 9 are formed, respectively, and finally a transparent electrode 10 is formed.
ITO by EB (Electrom Beam) evaporation method as
A solar cell is formed by forming a (In 2 O 3 −SnO 2 ) film of 1000 Å.
上述の例は、PI樹脂膜を塗布形成する母体基
板として良導体のステンレス板を使用したが、他
の基板として鉄板、ニツケル板、モリブデン板、
ブリツキ板、トタン板等の良導体、あるいはセラ
ミツクなどの絶縁体をも使用できる。そして、こ
れらの基板材料の表面に凹凸がたとえば100μｍ
存在してもPI樹脂膜を塗布形成することにより、
いずれも平坦な基板表面が得られる。さらに、
PI樹脂膜が太陽電池の動作に悪影響を及ぼす母
体基板からの不純物拡散を防止することができる
などの効果もあり、太陽電池用の基板材料の範囲
が広がることが約束されるものである。 In the above example, a stainless steel plate with good conductivity was used as the base substrate on which the PI resin film was applied, but other substrates such as iron plate, nickel plate, molybdenum plate,
A good conductor such as a tin plate or a galvanized iron plate, or an insulator such as ceramic can also be used. The surface of these substrate materials has irregularities of, for example, 100 μm.
By applying and forming a PI resin film even if it exists,
In either case, a flat substrate surface can be obtained. moreover,
The PI resin film also has the effect of preventing impurity diffusion from the host substrate, which has a negative effect on the operation of solar cells, and promises to expand the range of substrate materials for solar cells.
第３図は、良導体を基板材料にして作成した従
来の薄膜太陽電池の構造である。すなわち、下部
電極としての鏡面状態のステンレス基板１１の上
に、グロー放電法により1000Åのｎ型アモルフア
スシリコン層７、6000Åのｉ型のアモルフアスシ
リコン層８および100Åのｐ型のアモルフアスシ
リコン層９をそれぞれ形成し、最後に透明電極と
して1000ÅのITO膜１０を形成して太陽電池とし
たものである。この構造においては、同一基板上
で複数個の光発電区域を設け、並列あるいはまた
は直列接続を得ようとした場合、良導体の基板材
料を光発電区域の下部電極として使用しているた
め同一基板面上での直列接続が出来なかつた。し
かし、本発明を用いることにより、良導体の母体
基板上にPI樹脂膜を塗布したものが、ガラス基
板を用いた場合と同等な取扱いが可能となる。 FIG. 3 shows the structure of a conventional thin film solar cell made using a good conductor as a substrate material. That is, a 1000 Å n-type amorphous silicon layer 7, a 6000 Å i-type amorphous silicon layer 8, and a 100 Å p-type amorphous silicon layer are formed on a mirror-like stainless steel substrate 11 serving as a lower electrode by a glow discharge method. 9 are formed respectively, and finally an ITO film 10 of 1000 Å is formed as a transparent electrode to form a solar cell. In this structure, if multiple photovoltaic areas are provided on the same substrate and a parallel or series connection is to be achieved, the same substrate surface is used because a good conductor substrate material is used as the lower electrode of the photovoltaic areas. I couldn't connect them in series above. However, by using the present invention, it becomes possible to handle a substrate made of a good conductor with a PI resin film coated on it in the same way as a glass substrate.
第４図は、母体基板にステンレス板１２の良導
体を用い、この基板上で直列接続を行わせ作成し
た薄膜太陽電池である。すなわち、表面荒さ7μ
ｍを有するステンレス板１２に20μｍのPI樹脂膜
１３を形成する。次に、該PI樹脂膜１３上に下
部電極１４を複数個形成する。そして、下部電極
１４の上に接合を有するアモルフアスシリコン膜
１５を形成するが、この場合下部電極１４が一部
露出するようにアモルフアスシリコン膜１５を形
成する。最後に、膜１５の上に透明電極１６を形
成するが、このとき透明電極１６と一部露出した
下部電極１４とが電気的に直列に接続されるよう
に形成し、複数個の光発電区域を直列に接続した
太陽電池が良導体基板材料１２上に得られる。 FIG. 4 shows a thin film solar cell prepared by using a good conductor of a stainless steel plate 12 as a base substrate and making series connections on this substrate. i.e. surface roughness 7μ
A PI resin film 13 of 20 μm is formed on a stainless steel plate 12 having a diameter of 20 μm. Next, a plurality of lower electrodes 14 are formed on the PI resin film 13. Then, an amorphous silicon film 15 having a junction is formed on the lower electrode 14, and in this case, the amorphous silicon film 15 is formed so that the lower electrode 14 is partially exposed. Finally, a transparent electrode 16 is formed on the membrane 15, and at this time, the transparent electrode 16 and the partially exposed lower electrode 14 are formed so as to be electrically connected in series, and a plurality of photovoltaic areas are formed. A solar cell is obtained on the good conductive substrate material 12 by connecting the two in series.
以上述べたように、可撓性で耐熱性のある電気
的絶縁材料の一つであるPI樹脂膜を、母体基板
表面に塗布し、該PI樹脂膜上に形成された薄膜
太陽電池は、従来の太陽電池に比較し、母体基板
表面の鏡面仕上技術が不必要である。そして、
PI樹脂膜が母体基板からの不純物拡散防止効果
に優れていることから母体基板材料の範囲が広が
ることが約束される。さらに、母体基板材料に良
導体を用いた場合、従来は同一基板上での光発電
区域の直列接続が不可能であつたが、絶縁材料を
光発電区域の下部電極と母体基板との間に設ける
ことにより光発電区域の並列接続のみならず直列
接続も実現できる。 As mentioned above, thin-film solar cells formed on the PI resin film by applying a PI resin film, which is a flexible and heat-resistant electrical insulating material, to the surface of the base substrate are conventionally Compared to other solar cells, mirror finishing technology for the surface of the base substrate is unnecessary. and,
Since the PI resin film has an excellent effect of preventing impurity diffusion from the base substrate, it promises to expand the range of base substrate materials. Furthermore, when a good conductor is used as the base substrate material, it has conventionally been impossible to connect photovoltaic areas in series on the same substrate, but an insulating material is provided between the lower electrode of the photovoltaic area and the base substrate. This makes it possible to realize parallel as well as series connections of photovoltaic areas.
なお、以上の具体例ではPI樹脂の例を述べた
が、他の耐熱性高分子樹脂、たとえばポリイミ
ド、ポリアミド、ポリイミド・アミド樹脂でも同
等の効果を得ることができる。 Although PI resin was used as an example in the above specific example, similar effects can be obtained with other heat-resistant polymer resins, such as polyimide, polyamide, and polyimide/amide resins.
第１図は、ステンレス基板と該基板表面にポリ
イミド系の樹脂を塗布したときの基板の表面状態
を示す図、第２図は、本発明の実施例における薄
膜太陽電池の断面図、第３図は、従来の薄膜太陽
電池の断面図、第４図は、本発明の別の実施例を
示す薄膜太陽電池の断面図である。
１……凹凸のあるステンレス基板表面状態、
２，３……ステンレス基板上のPI樹脂膜の表面
状態、４……凹凸のあるステンレス基板、５……
PI樹脂膜、６……下部電極、７，８，９……ア
モルフアスシリコン膜、１０……透明電極。
Fig. 1 is a diagram showing a stainless steel substrate and the surface state of the substrate when a polyimide resin is applied to the surface of the substrate, Fig. 2 is a cross-sectional view of a thin film solar cell in an embodiment of the present invention, and Fig. 3 4 is a sectional view of a conventional thin film solar cell, and FIG. 4 is a sectional view of a thin film solar cell showing another embodiment of the present invention. 1...Stainless steel substrate surface condition with unevenness,
2, 3...Surface condition of PI resin film on stainless steel substrate, 4...Stainless steel substrate with unevenness, 5...
PI resin film, 6... lower electrode, 7, 8, 9... amorphous silicon film, 10... transparent electrode.
Claims (1)
有し上記基板の最大表面荒さのほぼ２倍以上の層
厚を有する絶縁材料の層を形成し、この絶縁材料
の層上に少くとも一層のPN接合又はPIN接合を
有する非単結晶層と、集電電極とを各々有する複
数の光発電区域を構成し、上記各区域の集電手段
は各区域における光発電区域が直列及び又は並列
関係になるべく互いに電気的に接続されることを
特徴とする半導体装置。 ２ 前記絶縁材料の層は塗布性なることを特徴と
する特許請求の範囲第１項記載の半導体装置。 ３ 前記絶縁材料の層は耐熱性高分子樹脂層なる
ことを特徴とする特許請求の範囲第１項記載の半
導体装置。 ４ 特許請求の範囲第１項記載の半導体装置にお
いて、前記良導電性基板として、該基板表面の荒
さが0.05μｍ以上で100μｍ以下である基板を用い
たことを特徴とする半導体装置。 ５ 特許請求の範囲第１項記載の半導体装置にお
いて、絶縁材料の層が被着形成された基板上に複
数の光発電区域を構成し、該区域の各々は接合を
有する非単結晶層と集電電極とを少なくとも含
み、上記各区域の集電手段は各区域における光発
電区域が直列及び又は並列関係になるべく互いに
電気的に接続されることを特徴とする半導体装
置。 ６ 特許請求の範囲第１項、第２項又は第５項記
載の半導体装置において、基板材料が電気的に良
導体なることを特徴とする半導体装置。[Scope of Claims] 1. A layer of a flexible and heat-resistant insulating material having a layer thickness approximately twice or more than the maximum surface roughness of the substrate is formed on a predetermined highly conductive substrate, and A plurality of photovoltaic areas each having a non-single crystal layer having at least one PN junction or PIN junction on a layer of an insulating material and a current collecting electrode are constituted, and the current collecting means for each area is configured to A semiconductor device characterized in that the photovoltaic sections are electrically connected to each other preferably in a series and/or parallel relationship. 2. The semiconductor device according to claim 1, wherein the layer of insulating material is coatable. 3. The semiconductor device according to claim 1, wherein the layer of insulating material is a heat-resistant polymer resin layer. 4. The semiconductor device according to claim 1, wherein the highly conductive substrate is a substrate whose surface has a roughness of 0.05 μm or more and 100 μm or less. 5. The semiconductor device according to claim 1, wherein a plurality of photovoltaic areas are formed on a substrate on which a layer of insulating material is deposited, each of the areas comprising a non-monocrystalline layer having a junction. 1. A semiconductor device, characterized in that the current collecting means in each section is electrically connected to each other in series and/or parallel relationship so that the photovoltaic sections in each section are preferably connected in series and/or in parallel. 6. A semiconductor device according to claim 1, 2, or 5, wherein the substrate material is an electrically good conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57061765A JPS58180069A (en) | 1982-04-15 | 1982-04-15 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57061765A JPS58180069A (en) | 1982-04-15 | 1982-04-15 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58180069A JPS58180069A (en) | 1983-10-21 |
| JPS6338874B2 true JPS6338874B2 (en) | 1988-08-02 |
Family
ID=13180541
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57061765A Granted JPS58180069A (en) | 1982-04-15 | 1982-04-15 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58180069A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010287715A (en) * | 2009-06-11 | 2010-12-24 | Mitsubishi Electric Corp | Thin film solar cell and method of manufacturing the same |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IN162671B (en) * | 1984-03-05 | 1988-06-25 | Energy Conversion Devices Inc | |
| JPS6115763U (en) * | 1984-07-02 | 1986-01-29 | 太陽誘電株式会社 | Thin film device using mica molded substrate |
| JP2784841B2 (en) * | 1990-08-09 | 1998-08-06 | キヤノン株式会社 | Substrates for solar cells |
| JP2908067B2 (en) * | 1991-05-09 | 1999-06-21 | キヤノン株式会社 | Substrate for solar cell and solar cell |
| FR2690279B1 (en) * | 1992-04-15 | 1997-10-03 | Picogiga Sa | MULTISPECTRAL PHOTOVOLTAUIC COMPONENT. |
| US7354462B2 (en) | 2002-10-04 | 2008-04-08 | Chevron U.S.A. Inc. | Systems and methods of improving diesel fuel performance in cold climates |
| KR101608953B1 (en) * | 2007-11-09 | 2016-04-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Photoelectric conversion device and method for manufacturing the same |
| US20090139558A1 (en) * | 2007-11-29 | 2009-06-04 | Shunpei Yamazaki | Photoelectric conversion device and manufacturing method thereof |
-
1982
- 1982-04-15 JP JP57061765A patent/JPS58180069A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010287715A (en) * | 2009-06-11 | 2010-12-24 | Mitsubishi Electric Corp | Thin film solar cell and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58180069A (en) | 1983-10-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4443651A (en) | Series connected solar cells on a single substrate | |
| KR100325952B1 (en) | Photovoltaic devices and how to manufacture them | |
| US4428110A (en) | Method of making an array of series connected solar cells on a single substrate | |
| US4443652A (en) | Electrically interconnected large area photovoltaic cells and method of producing said cells | |
| KR900008504B1 (en) | Process for producing continous insulated metallic substrate and apparatus therefor | |
| GB2095908A (en) | Series connected solar cells on a single substrate | |
| JPS5999780A (en) | Large area photocell and method of producing same | |
| JPH0744288B2 (en) | Thin-film photovoltage solar cell | |
| US4577393A (en) | Process for the production of a solar cell | |
| JPH06163958A (en) | Semiconductor device and its manufacture | |
| JPS6338874B2 (en) | ||
| JP3287754B2 (en) | Method for forming metal electrode of solar cell | |
| US5034795A (en) | Electrically insulating substrate | |
| JPH06318724A (en) | Electrode and photovoltaic element | |
| US4360702A (en) | Copper oxide/N-silicon heterojunction photovoltaic device | |
| US6544877B1 (en) | Method of producing thin film of zinc oxide, process for manufacturing photovoltaic element using its method, and photovoltaic element | |
| JPS596074B2 (en) | amorphous silicon solar cell | |
| JPH0864850A (en) | Thin film solar battery and fabrication thereof | |
| JPS622713B2 (en) | ||
| JPS639755B2 (en) | ||
| JPH0542834B2 (en) | ||
| JPH08288529A (en) | Photoelectric conversion device and manufacture thereof | |
| JPS5943101B2 (en) | Amorphous semiconductor solar cell | |
| JPH0651350A (en) | Display device | |
| JP2002094093A (en) | Solar cell device |